© Semiconductor Components Industries, LLC, 2017
January, 2018 − Rev. 2 1Publication Order Number:
FDBL86066−F085/D
FDBL86066-F085
N‐Channel POWERTRENCH)
MOSFET
100 V, 240 A, 4.1 mW
Features
Typical RDS(on) = 3.3 mW at VGS = 10 V, ID = 80 A
Typical Qg(tot) = 47 nC at VGS = 10 V, ID = 80 A
UIS Capability
Qualified to AEC Q101
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
Automotive Engine Control
PowerTrain Management
Solenoid and Motor Drivers
Electrical Power Steering
Integrated Starter/Alternator
Distributed Power Architectures and VRM
Primary Switch for 12 V Systems
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol Parameter Value Unit
VDSS Drain-to-Source Voltage 100 V
VGS Gate-to-Source Voltage ±20 V
IDDrain Current − Continuous,
(VGS = 10 V) TC = 25°C (Note 1) 185 A
Pulsed Drain Current, TC = 25°C(See Figure 4) A
EAS Single Pulse Avalanche Energy
(Note 2) 93.6 mJ
PDPower Dissipation 300 W
Derate Above 25°C 2 W/°C
TJ, TSTG Operating and Storage
Temperature −55 to +175 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be af fected.
1. Current is limited by silicon.
2. Starting TJ = 25°C, L = 30 mH, IAS = −79 A, VDD = 100 V during inductor
charging and VDD = 0 V during time in avalanche.
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H−PSOF8L
CASE 100CU
See detailed ordering and shipping information on page 7 o
f
this data sheet.
ORDERING INFORMATION
N-CHANNEL MOSFET
MARKING DIAGRAM
$Y&Z&3&K
FDBL
86066
$Y = ON Semiconductor Logo
&Z = Assembly Plant Code
&3 = Numeric Date Code
&K = Lot Code
FDBL86066 = Specific Device Code
VDSS RDS(ON) MAX ID MAX
100 V 4.1 mW @ 10 V 240 A
D
S
G
FDBL86066−F085
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2
THERMAL CHARACTERISTICS
Symbol Parameter Value Unit
RqJC Thermal Resistance, Junction to Case 0.5 °C/W
RqJA Thermal Resistance, Junction to Ambient (Note 3) 43
3. RqJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. RqJC is guaranteed by design, while RqJA is determined by the board design. The maximum rating
presented here is based on mounting on a 1 in2 pad of 2oz copper.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol Parameter Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
BVDSS Drain-to-Source Breakdown Voltage ID = 250 mA, VGS = 0 V 100 V
IDSS Drain-to-Source Leakage Current VDS = 100 V, VGS = 0 V
TJ = 25°C
TJ = 175°C (Note 4)
1
1
mA
IGSS Gate-to-Source Leakage Current VGS = ±20 V ±100 nA
ON CHARACTERISTICS
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA2 2.9 4.0 V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 80 A
TJ = 25°C
TJ = 175°C (Note 4)
3.3
7.3 4.1
8.8
mW
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 50 V, VGS = 0 V, f = 1 MHz 3240 pF
Coss Output Capacitance 1950 pF
Crss Reverse Transfer Capacitance 26 pF
RgGate Resistance VGS = 0.5 V, f = 1 MHz 0.5 W
Qg(tot) Total Gate Charge VGS = 0 V to 10 V, VDD = 50 V, ID = 80 A 47 69 nC
Qg(th) Threshold Gate Charge VGS = 0 V to 2 V, VDD = 50 V, ID = 80 A 6 nC
Qgs Gate to Source Charge VDD = 50 V, ID = 80 A 15 nC
Qgd Gate to Drain “Miller” Charge VDD = 50 V, ID = 80 A 10 nC
SWITCHING CHARACTERISTICS
ton Turn-On Time VDD = 50 V, ID = 80 A, VGS = 10 V,
RGEN = 6 W 35 ns
td(on) Turn-On Delay 18 ns
trRise Time 9 ns
td(off) Turn-Off Delay 36 ns
tfFall Time 13 ns
toff Turn-Off Time 68 ns
DRAIN-SOURCE DIODE CHARACTERISTICS
VSD Source to Drain Diode Forward
Voltage ISD = 80 A, VGS = 0 V 0.9 1.25 V
ISD = 40 A, VGS = 0 V 0.85 1.2
trr Reverse Recovery Time IF = 80 A, dISD/dt = 300 A/ms 36 54 ns
Qrr Reverse Recovery Charge 84 126 nC
trr Reverse Recovery Time IF = 80 A, dISD/dt = 1000 A/ms 32 48 ns
Qrr Reverse Recovery Charge 243 365 nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production.
FDBL86066−F085
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TYPICAL CHARACTERISTICS
Figure 1. Normalized Power Dissipation vs. Case
Temperature Figure 2. Maximum Continuous Drain Current vs.
Case Temperature
Figure 3. Normalized Maximum Transient Thermal Impedance
Figure 4. Peak Current Capability
0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
POWER DISSIPATION MULTIPLIER
TC, CASE TEMPERATURE(oC)
25 50 75 100 125 150 175 25
0
40
80
120
160
200 CURRENT LIMITED
BY SILICON VGS = 10 V
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE(oC)
50 75 100 125 150 175
10−5 10−4 10−3 10−2 10−1 10 10
0.01
0.1
1
SINGLE PULSE
D = 0.50
0.20
0.10
0.05
0.02
0.01
NORMALIZED THERMAL
IMPEDANCE, ZqJC
t, RECTANGULAR PULSE DURATION(s)
DUTY CYCLE − DESCENDING ORDE R
2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZqJC x RqJC + TC
PDM
t1t2
10−5 10−4 10−3 10−2 10−1 10 10
10
100
1000 VGS = 10 V
SINGLE PULSE
IDM,PEAK CURRENT (A)
t, RECTANGULAR PULSE DURATION(s)
TC = 25 oC
I = I 25 175 − TC
150
FOR TEMPERATURES
ABOVE 25 oC DERATE PEAK
CURRENT AS FOLLOWS:
10
01
FDBL86066−F085
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TYPICAL CHARACTERISTICS
Figure 5. Forward Bias Safe Operating Area Figure 6. Unclamped Inductive Switching Capability
Figure 7. Transfer Characteristics Figure 8. Forward Diode Characteristics
Figure 9. Saturation Characteristics Figure 10. Saturation Characteristics
0.0001
1
10
100
1000
STARTING T J = 150oC
STARTING TJ = 25 oC
IAS, AVALANCHE CURRENT (A)
tAV, TIME IN AVALANCHE (ms)
tAV = (L)(I AS )/(1.3*RATED BV DSS − VDD )
If R = 0
If R
0
0
tAV = (L/R)ln[(I AS *R)/(1.3*RATED BV DSS − VDD ) + 1]
0.001 0.01 0.1 1 10 100 1000
1
0
40
80
120
160
200
240
TJ = −55oC
TJ = 2 5oC
TJ = 175oC
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
VDD = 10 V
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
234567 0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
10
100
300
TJ = −55
oC
TJ = 25 oC
TJ= 175 oC
VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
0
0
60
120
180
240
300 VGS
15V Top
10V
8V
7V
6V
5.5V
5V Botto m
250 ms PULSE WIDTH
Tj=175oC
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
123450
0
100
200
300
VGS
15V Top
10V
8V
7V
6V
5.5V
5V Bottom
250 ms PULSE WIDTH
Tj=25oC
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
12345
1 10 100 300
0.1
1
10
100
1000
100us
1ms
10ms
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
OPERATION IN THIS
AREA MAY BE
LIMITED BY r DS(on)
SINGLE PULSE
TJ = MAX RATED
TC = 25oC100ms
FDBL86066−F085
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5
TYPICAL CHARACTERISTICS
Figure 11. RDS(on) vs. Gate Voltage Figure 12. Normalized RDS(on) vs. Junction
Temperature
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
Figure 15. Capacitance vs. Drain to Source
Voltage Figure 16. Gate Charge vs. Gate to Source
Voltage
45678910
0
5
10
15
20
25
30
ID = 80 A
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
rDS(on), DRAIN TO SOURCE
ON−RESISTANCE (mW)
VGS, GATE TO SOURCE VOLTAGE (V)
TJ = 25oC
TJ = 175oC
−80
0.4
0.8
1.2
1.6
2.0
2.4
2.8 PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
ID = 80 A
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
TJ, JUNCTION TEMPERATURE (oC)
−40 0 40 80 120 160 200
0.4
0.6
0.8
1.0
1.2 VGS = VDS
ID = 250 mA
NORMALIZED GATE
THRESHOLD VOLTAGE
TJ, JUNCTION TEMPERATURE ( oC)
−80 40 0 40 80 120 160 200 0.90
0.95
1.00
1.05
1.10 ID = 1 mA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
−80 40 0 40 80 120 160 200
0.1 1 10 100
1
10
100
1000
10000
f = 1 MHz
VGS = 0 V Crss
Coss
Ciss
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
0
2
4
6
8
10
VDD = 50 V
VDD = 40 V
ID = 80 A
VDD = 60 V
Qg, GATE CHARGE(nC)
VGS, GATE TO SOURCE VOLTAGE(V)
10 20 30 40 50
FDBL86066−F085
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PACKAGE DIMENSIONS
H−PSOF8L 11.68x9.80
CASE 100CU
ISSUE O
FDBL86066−F085
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7
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking Package Reel Size Tape Width Quantity
FDBL86066−F085 FDBL86066 H−PSOF8L
(Pb-Free / Halogen Free) 1324 mm 2000 Units
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