Enpirion® Power Evaluation Board User Guide
EP5358xUI PowerSoC
Enpirion EP5358xUI DC/D C Conver ter
Module Eval uati on Board
Introduction
Thank you for c hoosing Altera E npirion power produc ts !
This application note describes how to test the EP5358xUI (EP5358LUI,
EP5358HUI) converters using Altera’s Enpirion 2.5mmx2.25mm Module EVAL
BOARD shown in Fig. 1. In addition to this document you will also need the
device datasheet for a thor ough evaluation of the power c onverter m odule.
The EP5358xUI converters are par t of a new c las s of D C/DC c onverter pr oduc ts,
a c om plete pow er s ys tem on c hip ( Pow erSoC ):
• These devices are complete modules including magnetics, and require
only c eram ic input and output c apac itors .
• The evaluation board is designed to offer a wide range of engineering
evaluation capabilities. This includes the base configuration of an 0603
input c apac itor and an 0805 output c apac itor .
• Pads are available to add up to one additional input capacitor and up to
one additional output capacitor for evaluation of performance over a wide
range of input/output capacitor combinations.
• Pads are available to populate an external resistor divider to enable output
voltage programming of values not available using the VID. The pads are
labeled R1 and R2. Pads are also available for placing an optional feed-
forward capacitor (labeled C9) across resistor R1. NOTE: The External
voltage divider option is available only with EP5358LUI.
• Jum pers are provided for eas y progr am m ing of the following s ignals :
o Enable
o VS0-VS2 output voltage selection pins
• Test points are provided as well as clip leads for input and output
connections
• The board comes with input decoupling, and input reverse polarity
protection to safeguard the devic e from c om m on s etup m is haps .
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Enpirion® Power Evaluation Board User Guide
EP5358xUI PowerSoC
Quick Start Guide
STEP 1: Before applying power to the board, set the “ENABLE”
jumper to the Disable Position. Set VS0, VS1 and VS2 pins for the
des ired output s etting.
CAUTION: the signal pins, ENA, VS0, VS1 and VS2 must
be c onnec ted to a logic “high”, jum per to the left, or a logic “low”, jum per to
the right. It may not be left floating as the pin state would then be in an
indeterminate state.
STEP 2: Connect a power supply to the input test points, TP8 (VIN) and TP5
(GND) as indicated in Figure 1. The same test points can also be used to
m eas ure the input voltage.
CAUTION: be mindful of the polarity and the voltage magnitude. If VIN is
greater than 6V, the board may get damaged. If the input voltage polarity
is w rong, diode D1 w ill c onduc t, and draw exc es s ive input c ur rent.
STEP 3: Set the output voltage select pins for the desired output voltage. Refer
to Tables 1 and 2 to deter m ine the s etting.
CAUTION: the external resistor divider is not populated
in the standard board configuration. Choosing the “EXT”
option for the EP5358LUI without the external resistors
R1 and R2 w ill res ult in unpredic table behavior.
STEP 4: Connect the load to the output connectors TP7 (VOUT) and TP6
(GND), as indicated in Figure 1.The same test points are also used to measure
the DC output voltage.
STEP 5: Move the ENABLE jumper to the enabled position, and power up the
board. The EP5358xUI s hould now be operational.
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Enpirion® Power Evaluation Board User Guide
EP5358xUI PowerSoC
Output Voltage Select
The EP5358xUI utiliz es a 3 pin output voltage s elec t s c hem e. The output voltage
is programmed by setting the VSx jumpers to either a logic “1” or a logic “0” as
des c ribed in the Q uic k Start s ec tion
Tables 1 and 2 show the logic table for VOUT selection. There are seven preset
output voltage levels and an externally programmable option for the EP5358LQI.
The EP5358HQI has eight preset output voltage levels and no external
programming capability.
Table 1: EP5358LUI Output Voltage Selec t Logic Table
VS2
VS1
VS0
VOUT
0
0
0
1.50
0
0
1
1.45
0
1
0
1.20
0
1
1
1.15
1
0
0
1.10
1
0
1
1.05
1
1
0
0.8
1
1
1
EXT
Table 2: EP5358HUI Output Voltage Se le ct Logic Table
VS2
VS1
VS0
VOUT
0
0
0
3.3
0
0
1
3.0
0
1
0
2.9
0
1
1
2.6
1
0
0
2.5
1
0
1
2.2
1
1
0
2.1
1
1
1
1.8
Page 4 of 10
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Enpirion® Power Evaluation Board User Guide
EP5358xUI PowerSoC
Test Recommend atio ns
Recommendations
To guarantee measurement accuracy, the following precautions should be
observed:
1. Make all input and output voltage m eas urem ents at the board us ing the
tes t points provided. This w ill elim inate voltage drop ac ros s the line and
load cables that can produce inaccurate measurements – especially
efficiency.
2. Measure input and output current with series ammeters or accurate
shunt resistors. This is especially important when measuring efficiency.
3. Use a balanced impedance probe tip as shown in Figure 2, and
through-hole test point pair TP2 to measure the output voltage ripple to
avoid noise coupling into the probe ground lead and for load transient
res pons e m eas urem ents .
Using The External Voltage Divider
The EP5358xUI evaluation board is designed to provide a great deal of flexibility
in evaluating the perfor m anc e of Altera’s Enpirion DC/DC module.
Pre-tinned pads are provided to place 0805 sized 1% resistors on the board to
implement an external resistor divider for the EP5358LUI to choose an output
voltage other than one of the seven pre-set voltages available on the VID. See
Figure 3 for the bas ic c irc uit.
Figure 2: Balanced-impe dance oscilloscope probe . Wrap bare wir e
around the gr ound shaft and bring the wir e close to the pr obe tip.
This minimizes probe loop inductance and stray noise pickup by
the probe.
Page 5 of 10
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Enpirion® Power Evaluation Board User Guide
EP5358xUI PowerSoC
V
IN V
Sense
V
S0
V
S2
EP5358LUI
10µF
0805
4.7µF
0603
VOUT
V
OUT
AGND
ENABLE
R1
R2
V
FB
V
S1
PGND
AVIN
PVIN
Figure 3. External divi der schemat ic for the EP5358LUI.
The output voltage is s elec ted by the follow ing form ula:
( )
2
1
16.0
R
R
OUT
VV +=
R1 must be chosen as 237kΩ to maintain control loop stability. Then R2 is given
as:
Ω
−
=6.0
102.142 3
2OUT
Vx
R
The external voltage divider option is chosen by s etting the jum pers VS0 – VS2
to a logic “ high”.
Note: The VSENSE pin should be tied to the Output pin even in external feedback
mode to access the internal phase lead capacitor that is situated between the
VSENSE and VFB pads. This phase lead capacitor is integral to the loop
c om pens ation and the pow er s upply s tability.
Dynamically Adjustable Output
The EP5358xUI is designed to allow for dynamic switching between the
predefined voltage levels by toggling the VID pins. The inter-voltage slew rate is
optimized to prevent excess undershoot or overshoot as the output voltage levels
transition. The slew rate is defined in the datas heet .
This feature can be tested by connecting the VSx jumper center pins to logic
driver to toggle between the various VOUT states.
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Enpirion® Power Evaluation Board User Guide
EP5358xUI PowerSoC
Note: Dynamic switching between a predefined output and an externally
programmed output is not allowed. This could result excess current flow and
dam age the devic e.
Input and Output Capacitors
Input Filter C apacitor
For ILOAD ≤ 500m A, C IN = 2.2uF
For ILOAD > 500mA CIN = 4.7uF.
0402 capacitor case size is acceptable.
The input capacitor must use a X5R or X7R or equivalent dielectric formulation.
Y5V or equivalent dielectric formulations lose capacitance with frequency, bias,
and with temperature, and are not suitable for switch-mode DC-DC converter
input filter applications.
Output Filter Capacitor
F o r VIN ≤ 4.3V, COUT_MIN = 10uF 0603 MLCC.
For VIN > 4.3V , COUT_MIN = 10uF 0805 MLCC.
Ripple performance can be improved by using 2x10µF 0603 MLCC capacitors
(for any allow ed VIN) .
The maximum output filter capacitance next to the output pins of the device is
60µF low ES R MLC C c apac itanc e. VOUT has to be s ens ed at the las t output filter
c apac itor next to the EP5358xUI.
Additional bulk capacitance for decoupling and bypass can be placed at the load
as long as there is sufficient separation between the VOUT Sense point and the
bulk capacitance.
Excess total capacitance on the output (Output Filter + Bulk) can cause an over-
current condition at startup. Refer to the section on Soft-Start for the maximum
total c apac itanc e on the output.
The output capacitor must use a X5R or X7R or equivalent dielectric formulation.
Y5V or equivalent dielectric formulations lose capacitance with frequency, bias,
and temperature and are not suitable for switch-mode DC-DC converter output
filter applications.
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Enpirion® Power Evaluation Board User Guide
EP5358xUI PowerSoC
Board, BOM, Schematic
Fi gure 4. P hoto of EV B.
T able 3. EVB Bill of M ate rials.
Item Descr iption
Qty
Ref Des
Item Type
Function
4.7UF 10V X5R 0603 CAPACITOR CERAMIC
1
C2
Capacitor
Input Capacitor
CAP, 10UF 0805 X7R 10% 10V CERAMIC
2
C3
Capacitor
Output Capacitor
EP5358xUI 2.5MM X 2.25MM
1
U1
Device-GTP
Enpirion EP5358xUI
CAP 47UF 16V ELECT FC SMD
1
C8
Capacitor
Board Input Decoupling Capacitor
S2A DIODE
1
D1
Diode
Reverse Polarity Protection
CAP, 10UF 0805 X7R 10% 10V CERAMIC
1
C10
Capacitor
Connector Decoupling
MULTILAYER SMD FERRITE BEAD 4000MA 0805
1
FB1
Ferrite Bead
Connector Decoupling
CONNECTOR, CUSTOM, VERTI CAL HEADER, SMT
1
J1
Connector/Contact
Jumper/Connector Array
COM PONENT NOT USED ** DO NOT INS TALL **
8
C1,C4,C5,C9,R1,R2,R3,U2
Not Used
TEST POINT SURFACE MOUNT
4
TP5,TP6,TP7,TP8
Connector/Contact
Test Point
RESISTOR ZERO OHM 1/10W 5% 0402 SMD
1
R4
Resistor
Zero Ohm Jumper
Page 8 of 10
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Enpirion® Power Evaluation Board User Guide
EP5358xUI PowerSoC
Contact Information
Altera Corporation
101 Innovation D rive
San Jos e, CA 95134
Phone: 408-544-7000
www.altera.com
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