LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 LP2953QML Adjustable Micropower Low-Dropout Voltage Regulators Check for Samples: LP2953QML, LP2953QML-SP FEATURES DESCRIPTION * * * * * * * * * * The LP2953A is a micropower voltage regulator with very low quiescent current (130 A typical at 1 mA load) and very low dropout voltage (typ. 60 mV at light load and 470 mV at 250 mA load current). It is ideally suited for battery-powered systems. Furthermore, the quiescent current increases only slightly at dropout, which prolongs battery life. 1 2 Output Voltage Adjusts from 1.23V to 29V Ensured 250 mA Output Current Extremely Low Quiescent Current Low Dropout Voltage Extremely Tight Line and Load Regulation Very Low Temperature Coefficient Current and Thermal Limiting Reverse Battery Protection 50 mA (Typical) Output Pulldown Crowbar Auxiliary Comparator Included with CMOS/TTL Compatible Output Levels. Can be used for Fault Detection, Low Input Line Detection, etc. APPLICATIONS * * * * High-Efficiency Linear Regulator Regulator with Under-Voltage Shutdown Low Dropout Battery-Powered Regulator Snap-ON/Snap-OFF Regulator The LP2953A retains all the desirable characteristics of the LP2951, but offers increased output current, additional features, and an improved shutdown function. The internal crowbar pulls the output down quickly when the shutdown is activated. The error flag goes low if the output voltage drops out of regulation. Reverse battery protection is provided. The internal voltage reference is made available for external use, providing a low-T.C. reference with very good line and load regulation. Connection Diagram Note: Pins 1, 8, 9, 16 must be shorted together on customer PC board application Figure 1. 16-Pin CFP Package 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2010-2013, Texas Instruments Incorporated LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com Schematic Diagram 2 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 Block Diagram Figure 2. LP2953 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP Submit Documentation Feedback 3 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com Absolute Maximum Ratings (1) Storage Temperature Range -65C TA +150C Operating Temperature Range -55C TA +125C Maximum Junction Temperature +150C Lead Temp. (Soldering, 5 seconds) Power Dissipation 260C (2) Internally Limited -20V to +30V Input Supply Voltage Feedback Input Voltage (3) Comparator Input Voltage -0.3V to +5V (4) -0.3V to +30V Shutdown Input Voltage (4) -0.3V to +30V Comparator Output Voltage (4) -0.3V to +30V 16LD CFP "WG" (device 01) (Still Air) JA Thermal Resistance 16LD CFP "GW" (device 02) (Still Air) 16LD CFP "GW" (device 02) (500LF/Min Air flow) JC Package Weight (Typical) 16LD CFP "WG" (device 01) (500LF/Min Air flow) 16LD CFP "WG" (device 01) (5) 16LD CFP "GW" (device 02) (2) (3) (4) (5) (6) 4 81C/W 140C/W 90C/W 7C/W 15C/W 16LD CFP "WG" (device 01) 360mg 16LD CFP "GW" (device 02) 410mg ESD Rating (6) (1) 134C/W 2 KV Abs. Max Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see Electrical Characteristics. The specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), JA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/JA or the number given in the Absolute Maximum Ratings, whichever is lower. When used in dual-supply systems where the regulator load is returned to a negative supply, the output voltage must be diode-clamped to ground. May exceed the input supply voltage. The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through, the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using JA, rather than JC, thermal resistance. It must not be assumed that the device leads will provide substantial heat transfer out the package, since the thermal resistance of the leadframe material is very poor, relative to the material of the package base. The stated JC thermal resistance is for the package material only, and does not account for the additional thermal resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device. Human body model, 1.5 K in series with 100 pF. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 Quality Conformance Inspection Table 1. Mil-Std-883, Method 5005 - Group A Subgroup Description 1 Static tests at Temp (C) +25 2 Static tests at +125 3 Static tests at -55 4 Dynamic tests at +25 5 Dynamic tests at +125 6 Dynamic tests at -55 7 Functional tests at +25 8A Functional tests at +125 8B Functional tests at -55 9 Switching tests at +25 10 Switching tests at +125 11 Switching tests at -55 12 Settling time at +25 13 Settling time at +125 14 Settling time at -55 LP2953A Electrical Characteristics DC Parameters The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2F, VO = 5V Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin. Parameter VO Output Voltage VO / VO Output Voltage Line Regulation Test Conditions Notes 1mA IL 250mA VI = 6V to 30V IL = 1mA to 250mA VO / VO Output Voltage Load Regulation IL = 0.1mA to 1mA VI - VO (1) IL = 1mA See (1) IL = 50mA See (1) Dropout Voltage IL = 100mA See (1) IL = 250mA See (1) Subgroups Min Max Units 4.975 5.025 V 1 4.94 5.06 V 2, 3 4.93 5.07 V 1, 2, 3 0.1 % 1 0.2 % 2, 3 0.16 % 1 0.2 % 2, 3 0.16 % 1 0.2 % 2, 3 100 mV 1 150 mV 2, 3 300 mV 1 420 mV 2, 3 400 mV 1 520 mV 2, 3 600 mV 1 800 mV 2, 3 Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below the value measured with a 1V differential. At very low values of programmed output voltage, the input voltage minimum of 2V (2.3V over temperature) must be observed. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP Submit Documentation Feedback 5 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com LP2953A Electrical Characteristics DC Parameters (continued) The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2F, VO = 5V Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin. Parameter IGnd Test Conditions Notes IL = 1mA See (2) IL = 50mA See (2) IL = 100mA See (2) IL = 250mA See (2) Min Ground Pin Current IGnd Ground Pin Current at Dropout IGnd Ground Pin Current at Shutdown ILimit Current Limit VO / PD Thermal Regulation VRef Reference Voltage VRef / VRef Reference Voltage Line Regulation VI = 4.5V, IL = 100A See (2) See (2) (3) VO = 0V See (4) See (5) IB FB Feedback Pin Bias Current IO Output "Off" Pulldown Current (2) (3) (4) (5) (6) 6 Sink 170 A 1 200 A 2, 3 2.0 mA 1 2.5 mA 2, 3 6.0 mA 1 8.0 mA 2, 3 28 mA 1 2, 3 33 mA 210 A 1 240 A 2, 3 140 A 1 500 mA 1 530 mA 2, 3 1 0.2 %/W 1.245 V 1 1.205 1.255 V 2, 3 0.1 % 1 0.2 % 2, 3 0.1 % 1 0.2 % 2, 3 0.4 % 1 0.6 % 2, 3 40 nA 1 nA 2, 3 VI = 6V to 30V Reference Voltage Load Regulation Units 1.215 VI = 2.5V to 6V VRef / VRef IRef = 0 to 200A 60 See (6) Subgroups Max 30 mA 1 20 mA 2, 3 Ground pin current is the regulator quiescent current. The total current drawn from the source is the sum of the ground pin current, output load current, and current through the external resistive divider (if used). VShutdown 1.1V, VO = VO(Nom). Thermal regulation is the change in output voltage at a time T after a change in power dissipation, excluding load or line regulation effects. Specifications are for a 200 mA load pulse at VI = VO(Nom)+15V (3W pulse) for T = 10 mS. VRef VO (VI - 1V), 2.3V VI 30V, 100 A IL 250 mA. VShutdown 1.1V, VO = VO(Nom). Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 LP2953A Electrical Characteristics Dropout Detection Comparator Parameters The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2F, VO = 5V Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin. Parameter Test Conditions IOH Output "High" Leakage VOH = 30V VOL Output "Low" Voltage VI = 4V, IO Comp = 400A VTh Max Upper Threshold Voltage VTh Min (1) Notes Min See (1) See (1) Lower Threshold Voltage Subgroups Max Units 1.0 A 1 2.0 A 2, 3 250 mV 1 400 mV 2, 3 -320 -150 mV 1 -380 -130 mV 2 -380 -120 mV 3 -450 -280 mV 1 -640 -180 mV 2 -640 -155 mV 3 Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal VRef measured at VI = VO(Nom) + 1V. To express these thresholds in terms of output voltage change, multiply by the Error amplifier gain, which is VO/ VRef = (R1 + R2)/R2 (refer to Figure 31). LP2953A Electrical Characteristics SHUTDOWN Input Parameters The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2F, VO = 5V Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin. Parameter VIO IIB Input Offset Voltage Input Bias Current Test Conditions Notes Referred to VRef VI Comp = 0 to 5V Min Max Units Subgroups -7.5 7.5 mV 1 -10 10 mV 2 -12 12 mV 3 -30 30 nA 1 -50 50 nA 2 -75 75 nA 3 LP2953A Electrical Characteristics Auxillary Comparator Parameters The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2F, VO = 5V Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin. Parameter VIO IIB Input Offset Voltage Input Bias Current Test Conditions Notes Referred to VRef VI Comp = 0 to 5V Min Max Units Subgroups -7.5 7.5 mV 1 -10 10 mV 2 -12 12 mV 3 -30 30 nA 1 -50 50 nA 2 -75 IOH VOL Output "High" Leakage Output "Low" Voltage VOH = 30V, VI Comp = 1.3V VI Comp = 1.1V, IO Comp = 400A Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP 75 nA 3 1.0 A 1 2.0 A 2 2.2 A 3 250 mV 1 400 mV 2 420 mV 3 Submit Documentation Feedback 7 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com LP2953A Electrical Characteristics DC Drift Parameters The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2F, VO = 5V Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin. calculations performed on QMLV devices at group B , subgroup 5. Min Max Units Subgroups IL = 1mA -12 12 % 1 IL = 50mA -12 12 % 1 IL = 100mA -12 12 % 1 IL = 250mA -12 12 % 1 IL = 1mA, 5A or 10% whichever is greater -5.0 5.0 A 1 IL = 50mA, 5A or 10% whichever is greater -5.0 5.0 A 1 IL = 100mA, 5A or 10% whichever is greater -5.0 5.0 A 1 IL = 250mA, 5A or 10% whichever is greater -5.0 5.0 A 1 Parameter VI - VO IGnd Dropout Voltage Ground Pin Current Test Conditions Notes IGnd Ground Pin Current at Dropout VI = 4.5V, IL = 100A, 5A or 10% whichever is greater -5.0 5.0 A 1 IGnd Ground Pin Current at Shutdown 5A or 10% whichever is greater -5.0 5.0 A 1 VIO Input Offset Voltage Referred to VRefSHUTDOWN Input -1.0 1.0 mV 1 Referred to VRef Auxillary Comparator -1.0 1.0 mV 1 VI Comp = 0 to 5V SHUTDOWN Input -5.0 5.0 nA 1 VI Comp = 0 to 5V Auxillary Comparator -5.0 5.0 nA 1 IIB 8 Input Bias Current Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 Typical Performance Characteristics Unless otherwise specified: VI = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VO = 5V. Quiescent Current Quiescent Current Figure 3. Figure 4. Ground Pin Current vs Load Ground Pin Current Figure 5. Figure 6. Ground Pin Current Output Noise Voltage Figure 7. Figure 8. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP Submit Documentation Feedback 9 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: VI = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VO = 5V. 10 Ripple Rejection Ripple Rejection Figure 9. Figure 10. Ripple Rejection Line Transient Response Figure 11. Figure 12. Line Transient Response Output Impedance Figure 13. Figure 14. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified: VI = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VO = 5V. Load Transient Response Load Transient Response Figure 15. Figure 16. Dropout Characteristics Enable Transient Figure 17. Figure 18. Enable Transient Short-Circuit Output Current and Maximum Output Current Figure 19. Figure 20. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP Submit Documentation Feedback 11 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: VI = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VO = 5V. 12 Feedback Bias Current Feedback Pin Current Figure 21. Figure 22. Error Output Comparator Sink Current Figure 23. Figure 24. Divider Resistance Dropout Detection Comparator Threshold Voltages Figure 25. Figure 26. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified: VI = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VO = 5V. Thermal Regulation Minimum Operating Voltage Figure 27. Figure 28. Dropout Voltage Figure 29. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP Submit Documentation Feedback 13 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com APPLICATION HINTS Ground Pins For the LP2953 16-Pin Ceramic SOIC, Pins 1, 8, 9, 16 MUST BE SHORTED TOGETHER ON CUSTOMER'S P.C. BOARD APPLICATION. Heatsink Requirements The maximum allowable power dissipation for the LP2953 is limited by the maximum junction temperature (+150C) and the two parameters that determine how quickly heat flows away from the die: the ambient temperature and the junction-to-ambient thermal resistance of the part. The military parts which are manufactured in ceramic DIP packages contain a KOVAR lead frame (unlike the industrial parts, which have a copper lead frame). The KOVAR material is necessary to attain the hermetic seal required in military applications. The KOVAR lead frame does not conduct heat as well as copper, which means that the PC board copper can not be used to significantly reduce the overall junction-to-ambient thermal resistance. The power dissipation calculations are done using a fixed value for (J-A), the junction-to-ambient thermal resistance, of 134C/W and can not be changed by adding copper foil patterns to the PC board. This leads to an important fact: The maximum allowable power dissipation in any application using the LP2953 is dependent only on the ambient temperature: (1) External Capacitors A 2.2 F (or greater) capacitor is required between the output pin and ground to assure stability when the output is set to 5V. Without this capacitor, the part will oscillate. Most type of tantalum or aluminum electrolytics will work here. Film types will work, but are more expensive. Many aluminum electrolytics contain electrolytes which freeze at -30C, which requires the use of solid tantalums below -25C. The important parameters of the capacitor are an ESR of about 5 or less and a resonant frequency above 500 kHz (the ESR may increase by a factor of 20 or 30 as the temperature is reduced from 25C to -30C). The value of this capacitor may be increased without limit. At lower values of output current, less output capacitance is required for stability. The capacitor can be reduced to 0.68 F for currents below 10 mA or 0.22 F for currents below 1 mA. Programming the output for voltages below 5V runs the error amplifier at lower gains requiring more output capacitance for stability. At 3.3V output, a minimum of 4.7 F is required. For the worst-case condition of 1.23V output and 250 mA of load current, a 6.8 F (or larger) capacitor should be used. A 1 F capacitor should be placed from the input pin to ground if there is more than 10 inches of wire between the input and the AC filter capacitor or if a battery input is used. Stray capacitance to the Feedback terminal can cause instability. This problem is most likely to appear when using high value external resistors to set the output voltage. Adding a 100 pF capacitor between the Output and Feedback pins and increasing the output capacitance to 6.8 F (or greater) will cure the problem. Minimum Load When setting the output voltage using an external resistive divider, a minimum current of 1 A is recommended through the resistors to provide a minimum load. It should be noted that a minimum load current is specified in several of the electrical characteristic test conditions, so this value must be used to obtain correlation on these tested limits. 14 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 Figure 30. Power Derating Curve for LP2953 Programming the Output Voltage The regulator may be pin-strapped for 5V operation using its internal resistive divider by tying the Output and Sense pins together and also tying the Feedback and 5V Tap pins together. Alternatively, it may be programmed for any voltage between the 1.23V reference and the 30V maximum rating using an external pair of resistors (see Figure 31). The complete equation for the output voltage is: (2) where VREF is the 1.23V reference and IFB is the Feedback pin bias current (-20 nA typical). The minimum recommended load current of 1 A sets an upper limit of 1.2 M on the value of R2 in cases where the regulator must work with no load (see Minimum Load). IFB will produce a typical 2% error in VO which can be eliminated at room temperature by trimming R1. For better accuracy, choosing R2 = 100 k will reduce this error to 0.17% while increasing the resistor program current to 12 A. Since the typical quiescent current is 120 A, this added current is negligible. * See Application Hints ** Drive with TTL-low to shut down Figure 31. Adjustable Regulator Dropout Voltage The dropout voltage of the regulator is defined as the minimum input-to-output voltage differential required for the output voltage to stay within 100 mV of the output voltage measured with a 1V differential. The dropout voltage is independent of the programmed output voltage. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP Submit Documentation Feedback 15 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com Dropout Detection Comparator This comparator produces a logic "LOW" whenever the output falls out of regulation by more than about 5%. This figure results from the comparator's built-in offset of 60 mV divided by the 1.23V reference (refer to Block Diagram). The 5% low trip level remains constant regardless of the programmed output voltage. An out-ofregulation condition can result from low input voltage, current limiting, or thermal limiting. Figure 32 gives a timing diagram showing the relationship between the output voltage, the ERROR output, and input voltage as the input voltage is ramped up and down to a regulator programmed for 5V output. The ERROR signal becomes low at about 1.3V input. It goes high at about 5V input, where the output equals 4.75V. Since the dropout voltage is load dependent, the input voltage trip points will vary with load current. The output voltage trip point does not vary. The comparator has an open-collector output which requires an external pull-up resistor. This resistor may be connected to the regulator output or some other supply voltage. Using the regulator output prevents an invalid "HIGH" on the comparator output which occurs if it is pulled up to an external voltage while the regulator input voltage is reduced below 1.3V. In selecting a value for the pull-up resistor, note that while the output can sink 400 A, this current adds to battery drain. Suggested values range from 100 k to 1 M. This resistor is not required if the output is unused. When VIN 1.3V, the error flag pin becomes a high impedance, allowing the error flag voltage to rise to its pullup voltage. Using VOUT as the pull-up voltage (rather than an external 5V source) will keep the error flag voltage below 1.2V (typical) in this condition. The user may wish to divide down the error flag voltage using equal-value resistors (10 k suggested) to ensure a low-level logic signal during any fault condition, while still allowing a valid high logic level during normal operation. * In shutdown mode, ERROR will go high if it has been pulled up to an external supply. To avoid this invalid response, pull up to regulator output. ** Exact value depends on dropout voltage. (See Application Hints) Figure 32. ERROR Output Timing Output Isolation The regulator output can be left connected to an active voltage source (such as a battery) with the regulator input power shut off, as long as the regulator ground pin is connected to ground. If the ground pin is left floating, damage to the regulator can occur if the output is pulled up by an external voltage source. Reducing Output Noise In reference applications it may be advantageous to reduce the AC noise present on the output. One method is to reduce regulator bandwidth by increasing output capacitance. This is relatively inefficient, since large increases in capacitance are required to get significant improvement. Noise can be reduced more effectively by a bypass capacitor placed across R1 (refer to Figure 31). The formula for selecting the capacitor to be used is: (3) 16 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 This gives a value of about 0.1 F. When this is used, the output capacitor must be 6.8 F (or greater) to maintain stability. The 0.1 F capacitor reduces the high frequency gain of the circuit to unity, lowering the output noise from 260 V to 80 V using a 10 Hz to 100 kHz bandwidth. Also, noise is no longer proportional to the output voltage, so improvements are more pronounced at high output voltages. Auxiliary Comparator The LP2953 contains an auxiliary comparator whose inverting input is connected to the 1.23V reference. The auxiliary comparator has an open-collector output whose electrical characteristics are similar to the dropout detection comparator. The non-inverting input and output are brought out for external connections. SHUTDOWN Input A logic-level signal will shut off the regulator output when a "LOW" (<1.2V) is applied to the Shutdown input. To prevent possible mis-operation, the Shutdown input must be actively terminated. If the input is driven from open-collector logic, a pull-up resistor (20 k to 100 k recommended) should be connected from the Shutdown input to the regulator input. If the Shutdown input is driven from a source that actively pulls high and low (like an op-amp), the pull-up resistor is not required, but may be used. If the shutdown function is not to be used, the cost of the pull-up resistor can be saved by simply tying the Shutdown input directly to the regulator input. IMPORTANT: Since the Absolute Maximum Ratings state that the Shutdown input can not go more than 0.3V below ground, the reverse-battery protection feature which protects the regulator input is sacrificed if the Shutdown input is tied directly to the regulator input. If reverse-battery protection is required in an application, the pull-up resistor between the Shutdown input and the regulator input must be used. Typical Applications Figure 33. Basic 5V Regulator Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP Submit Documentation Feedback 17 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com * Output voltage equals +VIN minum dropout voltage, which varies with output current. Current limits at a maximum of 380 mA (typical). ** Select R1 so that the comparator input voltage is 1.23V at the output voltage which corresponds to the desired fault current value. Figure 34. 5V Current Limiter with Load Fault Indicator Figure 35. Low T.C. Current Sink * Connect to Logic or P control inputs. LOW BATT flag warns the user that the battery has discharged down to about 5.8V, giving the user time to recharge the battery or power down some hardware with high power requirements. The output is still in regulation at this time. OUT OF REGULATION flag indicates when the battery is almost completely discharged, and can be used to initiate a power-down sequence. Figure 36. 5V Regulator with Error Flags for LOW BATTERY and OUT OF REGULATION 18 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 The circuit switches to the NI-CAD backup battery when the main battery voltage drops below about 5.6V, and returns to the main battery when its voltage is recharged to about 6V. The 5V MAIN output powers circuitry which requires no backup, and the 5V MEMORY output powers critical circuitry which can not be allowed to lose power. * The BATTERY LOW flag goes low whenever the circuit switches to the NI-CAD backup battery. Figure 37. 5V Battery Powered Supply with Backup and Low Battery Flag Figure 38. 5V Regulator with Timed Power-On Reset * RT = 1 MEG, CT = 0.1 F Figure 39. Timing Diagram for Timed Power-On Reset Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP Submit Documentation Feedback 19 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com * Connect to Logic or P control inputs. OUTPUT has SNAP-ON/SNAP-OFF feature. LOW BATT flag warns the user that the battery has discharged down to about 5.8V, giving the user time to recharge the battery or shut down hardware with high power requirements. The output is still in regulation at this time. OUT OF REGULATION flag goes low if the output goes below about 4.7V, which could occur from a load fault. OUTPUT has SNAP-ON/SNAP-OFF feature. Regulator snaps ON at about 5.7V input, and OFF at about 5.6V. Figure 40. 5V Regulator with Error Flags for LOW BATTERY and OUT OF REGULATION with SNAP-ON/SNAP-OFF Output Figure 41. 5V Regulator with Timed Power-On Reset, Snap-On/Snap-Off Feature and Hysteresis Td = (0.28) RC = 28 ms for components shown. Figure 42. Timing Diagram 20 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP LP2953QML, LP2953QML-SP www.ti.com SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 REVISION HISTORY SECTION Released Revision Section Changes 11/30/2010 A New Release, Corporate format 1 MDS data sheet converted into one Corp. data sheet format. MNLP2953AM-X Rev 1A1 will be archived. 09/01/2011 B Ordering Information, Absolute Maximum Ratings Ordering Information -- entered new 'GW' devices. Absolute Maximum Ratings -- added new Theta JA and Theta JC numbers. LP2953QML Rev A will be archived. 09/20/2012 C Connection Diagrams, Application Notes Connection Diagrams and Applications Notes : Added: * Pins 1, 8, 9, 16 MUST BE SHORTED TOGETHER ON CUSTOMER'S P.C. BOARD APPLICATION. Rev B will be archived. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP Submit Documentation Feedback 21 LP2953QML, LP2953QML-SP SNVS395C - NOVEMBER 2010 - REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision B (April 2013) to Revision C * 22 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 17 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: LP2953QML LP2953QML-SP PACKAGE OPTION ADDENDUM www.ti.com 22-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) (3) Top-Side Markings (4) 5962-9233602QXA ACTIVE CFP NAC 16 42 TBD Call TI Call TI -55 to 125 LP2953AMGW /883 Q 5962-92336 02QXA ACO 02QXA >T 5962-9233602VXA ACTIVE CFP NAC 16 42 TBD Call TI Call TI -55 to 125 LP2953AMGWQMLV Q 5962-92336 02VXA ACO 02VXA >T LP2953AMGW-QMLV ACTIVE CFP NAC 16 42 TBD Call TI Call TI -55 to 125 LP2953AMGWQMLV Q 5962-92336 02VXA ACO 02VXA >T LP2953AMGW/883 ACTIVE CFP NAC 16 42 TBD Call TI Call TI -55 to 125 LP2953AMGW /883 Q 5962-92336 02QXA ACO 02QXA >T (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com (3) 22-Apr-2013 MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. 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