6ES5944-7UB11 - Siemens - Product.Network

1

SIMATIC S5

S5-115U

Programmable Controller

CPU 941/942/943/944

Reference Guide

Order No.

6ES5 997-7LA21

Index
Page
Explanations of the Operations List 1
Explanations of the Operands 2
Basic Operations
Boolean Logic Operations 6
Set/Reset Operations 6
Load Operations 8
Transfer Operations 12
Timer Operations 14
Counter Operations 16
Arithmetic Operations 16
Comparison Operations 16
Block Call Operations 18
Return Operations 20
”No” Operations 22
Stop Operations 22
Display Generation Operations 22
Supplementary Operations
Boolean Logic Operations 24
Bit Operations 24
Set/Reset Operations 26
Timer and Counter Operations 28
Load and Transfer Operations 30
Conversion Operations 32
Shift Operations 32
Jump Operations 32
Other Operations 34
System Operations
Set Operations 38
Load and Transfer Operations 38
Jump Operations 40
Arithmetic Operations 40
Other Operations 40
Machine Code Listing 42
Alphabetical Index of Operations 50
Integral Blocks
Integral Organization Blocks 52
Integral Function Blocks 55
Integral Data Block 1 56
Evaluation of CC 1 and CC 0 60

Explanation of the

Operations List

Abbreviation Explanation

ACCUM 1 Accumulator 1 (When accumulator 1 is

loaded, any existing contents are shifted

into accumulator 2.)

ACCUM 2 Accumulator 2

CC0/CC1 Condition code 0/Condition code 1

CSF STEP 5 control system flowchart method of

representation

Formal

operand Expression with a maximum of 4 characters.

The first character must be a letter of the

alphabet.

LAD STEP 5 ladder diagram method of represent.

OV Overflow. This condition code bit is set if,

e.g., a numerical range is exceeded during

arithmetic operations.

PII Process image input

PIQ Process image output

RLO Result of logic operation

RLO Y

reloaded?

N

The RLO does not change. The RLO cannot

be combined any further. When the next

binary operation takes place (but not

assignment operation), the RLO is reloaded.

Depending on whether the operation

affects the RLO, the RLO is combined further

or left unchanged according to the

operation and the status of the bit that was

scanned.

RLO Y

dependent?

Y /

N

The statement is executed only if the RLO is

”1”.

The statement is executed only on

positive/negative edge change of the RLO.

The statement is always executed.

RLO Y/N

affected? The RLO is affected/not affected

by the operation.

STL STEP 5 statement list method of represent.

Explanation

of the Operands

Abb. Explanation Permissible operand value

range for

CPU 941 942 943 944

BN Byte constant

(fixed-point no.) - 128 to+127

C Counter

- for the bit test

and set opera-

tions (system

operations)

0 to 127

0.0 to 127.15

D Data word (1 bit)

- for load opera-

tions (supplemen-

tary operations)

and transfer ope-

rations (system

operations)

- for bit test and set

operations

(system

operations)

0.0 to 255.15

DB Data block 2 to 255

DL Data word

(left byte) 0 to 255

DR Data word

(right byte) 0 to 255

DW Data word 0 to 255

F Flag 0.0 to 255.7

FB Function block 0 to 255

FW Flag word 0 to 254

FY Flag byte 0 to 255

I Input 0.0 to 127.7

0.0 to 63.7

1See page 52 for an overview of the organization blocks

and their function

2PY in the case of S5-DOS programmers

Abb. Explanation Permissible operand

value range for

CPU 941 942 943 944

IB Input byte 0 to 127

IW Input word 0 to 126

KB Constant (1 byte) 0 to 255

KC Constant

(count) 0 to 999

KF Constant (fixed-

point number) - 32768 to +32767

KH Constant

(hexadecimal code) 0 to FFFF

KM Constant

(2-byte bit pattern) arbitrary bit pattern (16 bit)

KS Constant

(2 characters) any two alphanumeric

characters

KT Constant (time) 0.0 to 999.3

KY Constant (2 bytes) 0 to 255 (per byte)

OB 1Organization block 0 to 255

PB Program block

(with block call and

return operations)

0 to 255

PB/

PY 2Peripheral byte

- Digital inputs

- Analog inputs

- Digital outputs

- Analog outputs

0 to 127

128 to 255

0 to 127

128 to 255

0 to 63

0 to 62

0 to 63

128 to 255

0 to 63

128 to 255

Abb. Explanation Permissible operand

value range for

CPU 941 942 943 944

PW Peripheral word

- Digital inputs

- Analog inputs

- Digital outputs

- Analog outputs

0 to 126

128 to 254

0 to 126

128 to 254

Q Output 0.0 to 127.7

QB Output byte 0 to 127

QW Output word 0 to 126

RS System data range

- for load opera-

tions (supplemen-

tary operations)

and transfer ope-

rations (system

operations)

- for bit test and set

operations

(system

operations)

0 to 255

0.0 to 255.15

SB Sequence block 0 to 255

T Timer

- for the bit test

and set opera-

tions (system

operations)

0 to 127

0.0 to 127.15

0.0 to 63.7

0 to 63

0 to 62

0 to 63

128 to 254

0 to 63

128 to 254

Note regarding execution times

Please note that, on account of the processor architecture, the

execution times quoted for the following list of operations

should be treated as approximate values. Depending on the

type of CPU installed, the operations are executed in the

standard processor or in the STEP 5 coprocessor.

In the case of a switch from direct execution in the coprocessor

to execution in the standard processor, the pure processing time

is incremented by the time required for switching. These

switchover times are included in the specified execution times.

Basic Operations

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

A I, Q, F, T, C N Y N 1,6 1,6 0,8 0,8 Scan operand for ”1” and combine with RLO through

logic AND.

AN I, Q, F, T, C N Y N 1,6 1,6 0,8 0,8 Scan operand for ”0” and combine with RLO through

logic AND.

O I, Q, F, T, C N Y N 1,6 1,6 0,8 0,8 Scan operand for ”1” and combine with RLO through

logic OR.

ON I, Q, F, T, C N Y N 1,6 1,6 0,8 0,8 Scan operand for ”0” and combine with RLO through

logic OR.

O N Y Y 1,6 1,6 0,8 0,8 Combine AND operations through logic OR.

A( N Y Y 1,6 1,6 0,8 0,8 Combine expressions enclosed in parentheses

through logic AND (6 levels).

O( N Y Y 1,6 1,6 0,8 0,8 Combine expressions enclosed in parentheses

through logic OR (6 levels).

) N Y N 1,6 1,6 0,8 0,8 Close parenthesis (conclusion of a parenthetical

expression).

Boolean Logic Operations

Set/Reset Operations

S I, Q, F Y N Y 1,6 1,6 0,8 0,8 Set operand to ”1”.

R I, Q, F Y N Y 1,6 1,6 0,8 0,8 Reset operand to ”0”.

= I, Q, F Y N Y 1,6 1,6 0,8 0,8 Assign value of RLO to operand.

Basic Operations

1 PY in the case of S5-DOS programmers

*+ ready delay time of the referenced I/O modules

(digital I/O: 2 µs/byte, analog I/O: 16 µs/byte)

** + 2 x ready delay time of the referenced I/O modules

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

L IB N N N 1,6 1,6 0,8 0,8 Load an input byte from the PII into ACCUM 1.

L QB N N N 1,6 1,6 0,8 0,8 Load an output byte from the PIQ into ACCUM 1.

L IW N N N 1,6 1,6 0,8 0,8 Load input word from the PII into ACCUM 1: byte n

ACCUM 1 (bits 8-15); byte n+1 ACCUM 1 (bits 0-7).

L QW N N N 1,6 1,6 0,8 0,8 Load an output word from the PIQ into ACCUM 1:

byte n ACCUM 1 (bits 8 - 15);

byte n+1 ACCUM 1 (bits 0 - 7).

L PB/PY1NNN93*93*93*4*Load an input byte from the digital/analog input

modules into ACCUM 1.

L PW NNN107*107*107*4,8** Load a peripheral word from the digital/analog

inputs into ACCUM 1: byte n ACCUM 1 (bits 8 - 15);

byte n+1 ACCUM 1 (bits 0 - 7).

L FY N N N 1,6 1,6 0,8 0,8 Load a flag byte into ACCUM 1.

L FW N N N 1,6 1,6 0,8 0,8 Load a flag word into ACCUM 1: byte n ACCUM 1

(bits 8 - 15); byte n+1 ACCUM 1 (bits 0 - 7).

L DL N N N 3,4 3,4 1,7 1,7 Load a data word (left-hand byte) of the current data

block into ACCUM 1.

Load Operations

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Basic Operations

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

L DR N N N 3,4 3,4 1,7 1,7 Load a data word (right-hand byte) of the current

data block into ACCUM 1.

L DW N N N 3,9 3,9 2 2 Load a data word of the current data block into

ACCUM 1: byte n ACCUM 1 (bits 8 - 15);

byte n+1 ACCUM 1 (bits 0 - 7).

L KB N N N 2,8 2,8 1,4 1,4 Load a constant (1-byte number) into ACCUM 1.

L KS N N N 1,6 1,6 0,8 0,8 Load a constant (2 characters in ASCII format) into

ACCUM 1.

L KF N N N 1,6 1,6 0,8 0,8 Load a constant (fixed-point number) into ACCUM 1.

L KH N N N 1,6 1,6 0,8 0,8 Load a constant (hexadecimal code) into ACCUM 1.

L KM N N N 1,6 1,6 0,8 0,8 Load a constant (bit pattern) into ACCUM 1.

L KY N N N 1,6 1,6 0,8 0,8 Load a constant (bit pattern) into ACCUM 1.

L KT N N N 1,6 1,6 0,8 0,8 Load a constant (count in BCD) into ACCUM 1.

L KC N N N 1,6 1,6 0,8 0,8 Load a constant (count in BCD) into ACCUM 1.

L T, C N N N 1,6 1,6 0,8 0,8 Load a time or count (in binary code) into ACCUM 1.

Load Operations (cont.)

Basic Operations

1 PY in the case of S5-DOS programmers

*+ ready delay time of the referenced I/O modules

(digital I/O: 2 µs/byte, analog I/O: 16 µs/byte)

** + 2× ready delay time of the referenced I/O modules

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

LC T, C N N N 3,5 3,5 1,8 1,8 Load times or counts (in BCD) into ACCUM 1.

Load Operations (cont.)

Transfer Operations

T IB N N N 1,6 1,6 0,8 0,8 Transfer the contents of ACCUM 1 to an input byte

(into the PII).

T QB N N N 1,6 1,6 0,8 0,8 Transfer the contents of ACCUM 1 to an output byte

(into the PIQ).

T IW N N N 1,6 1,6 0,8 0,8 Transfer the contents of ACCUM 1 to an input word

(into the PII): ACCUM 1 (bits 8 - 15) byte n;

ACCUM 1 (bits 0 - 7) byte n+1.

T QW N N N 1,6 1,6 0,8 0,8 Transfer the contents of ACCUM 1 to an output word

(into the PIQ): ACCUM 1 (bits 8 - 15) byte n;

ACCUM 1 (bits 0 - 7) byte n+1.

T PB/PY1NNN67*67*67*3,9*Transfer the contents of ACCUM 1 to an I/O byte of

the digital output modules with updating of the PIQ

or analog output modules.

T PW NNN85*85*85*4,7** Transfer the contents of ACCUM 1 to an I/O byte of

the digital output modules with updating of the PIQ

or the analog output modules.

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Basic Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

T FY N N N 1,6 1,6 0,8 0,8 Transfer the contents of ACCUM 1 to a flag byte.

T FW N N N 1,6 1,6 0,8 0,8 Transfer the contents of ACCUM 1 to a flag word

(into the PIQ): ACCUM 1 (bits 8 - 15) byte n;

ACCUM 1 (bits 0 - 7) byte n+1.

T DL N N N 2,2 2,2 1,1 1,1 Transfer the contents of ACCUM 1 to a data word

(left-hand byte).

T DR N N N 2,2 2,2 1,1 1,1 Transfer the contents of ACCUM 1 to a data word

(right-hand byte).

T DW N N N 2,7 2,7 1,4 1,4 Transfer the contents of ACCUM 1 to a data word.

Transfer Operations (cont.)

Timer Operations

SP T Y N Y 3,7 3,7 1,9 1,9 Start a timer (stored in ACCUM 1) as signal-

contracting pulse on the leading edge of the RLO.

SE T Y N Y 3,7 3,7 1,9 1,9 Start a timer (stored in ACCUM 1) as extended pulse

(signal contracting and stretching) on the leading

edge of the RLO.

SR T Y N Y 3,7 3,7 1,9 1,9 Start an on-delay timer (stored in ACCUM 1) on the

leading edge of the RLO.

SS T Y N Y 3,7 3,7 1,9 1,9 Start a stored on-delay timer (stored in ACCUM 1) on

the leading edge of the RLO.

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Basic Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

SA T Y N Y 3,7 3,7 1,9 1,9 Start an off-delay timer (stored in ACCUM 1) on the

trailing edge of the RLO.

R T Y N Y 3,7 3,7 1,9 1,9 Reset a timer if RLO=”1”.

Timer Operations (cont.)

Counter Operations

CU C Y N Y 3,7 3,7 1,9 1,9 Counter counts up 1 on the leading edge of the RLO.

CD C Y N Y 3,7 3,7 1,9 1,9 Counter counts down 1 on leading edge of the RLO.

S C Y N Y 3,7 3,7 1,9 1,9 Set counter if RLO=”1”.

R C Y N Y 3,7 3,7 1,9 1,9 Reset counter if RLO=”1”.

Arithmetic Operations

+F N N N 1,6 1,6 0,8 0,8 Add two fixed-point numbers: ACCUM 1 + ACCUM 2.

Result evaluation via CC 1/CC 0/OV

- F N N N 1,6 1,6 0,8 0,8 Subtract two fixed-point numbers: ACCUM 1 -

ACCUM 2. Result evaluation via CC 1/CC 0/OV

Comparison Operations

!=F N Y N 1,6 1,6 0,8 0,8 Compare two fixed-point numbers for ”equal to”. If

ACCUM 2=ACCUM 1, the RLO is ”1”.

CC 1/CC 0 are affected.

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Basic Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

><F N Y N 1,6 1,6 0,8 0,8 Compare two fixed-point numbers for ”not equal

to”. If ACCUM 2 ACCUM 1, the RLO is ”1”.

CC 1/CC 0 are affected.

>F N Y N 1,6 1,6 0,8 0,8 Compare two fixed-point numbers for ”greater

than”. If ACCUM 2>ACCUM 1, the RLO is ”1”.

CC 1/CC 0 are affected.

>=F N Y N 1,6 1,6 0,8 0,8 Compare two fixed-point numbers for ”greater than

or equal to”. If ACCUM 2 ACCUM 1, the RLO is ”1”.

CC 1/CC 0 are affected.

<F N Y N 1,6 1,6 0,8 0,8 Compare two fixed-point numbers for ”less than”. If

ACCUM 2<ACCUM 1, the RLO is ”1”.

CC 1/CC 0 are affected.

<=F N Y N 1,6 1,6 0,8 0,8 Compare two fixed-point numbers for ”less than or

equal to”. If ACCUM 2 ACCUM 1, the RLO is ”1”.

CC 1/CC 0 are affected.

Comparison Operations (cont.)

Block Call Operations

JU OB N N Y 6,7 6,7 3,4 3,4 Jump unconditionally to an organization block.

JU PB N N Y 6,7 6,7 3,4 3,4 Jump unconditionally to a program block.

JU FB N N Y 6,7 6,7 3,4 3,4 Jump unconditionally to a function block.

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Basic Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

JU SB N N Y 6,7 6,7 3,4 3,4 Jump unconditionally to a sequence block.

JC OB Y Y1Y6,7

1,7 6,7

1,7 3,4

0,9 3,4

0,9 Jump conditionallly to an organization block.

Time applies for RLO=1/RLO=0

JC PB Y Y1Y6,7

1,7 6,7

1,7 3,4

0,9 3,4

0,9 Jump conditionally to a program block.

Time applies for RLO=1/RLO=0

JC FB Y Y1Y6,7

1,7 6,7

1,7 3,4

0,9 3,4

0,9 Jump conditionally to a function block.

Time applies for RLO=1/RLO=0

JC SB Y Y1Y6,7

1,7 6,7

1,7 3,4

0,9 3,4

0,9 Jump conditionally to a sequence block.

Time applies for RLO=1/RLO=0

A DB N N N 3,6 3,6 1,8 1,8 Call a data block.

E DB N N N 270 270 270 270 Generate a data block.

The number of data words in the block must be

stored in ACCUM 1.

Block Call Operations (cont.)

Return Operations

BE N N Y 5 5 2,5 2,5 Block end (termination of a block)

BEC Y Y1Y5

1,7 5

1,7 2,5

0,9 2,5

0,9 Block end, conditional

Time applies for RLO=1/RLO=0

BEU N N Y 5 5 2,5 2,5 Block end, unconditional

1 RLO is set to ”1”

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Basic Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

NOP 0 N N N 1,6 1,6 0,8 0,8 No operation (all bits reset)

NOP 1 N N N 1,6 1,6 0,8 0,8 No operation (all bits set)

”No” Operations

Stop Operation

STP N N N 50 50 50 50 Stop: scanning cycle is still completed. Error ID ”STS”

is set in the ISTACK.

Display Generation Operations

BLD

130 N N N 1,6 1,6 0,8 0,8 Display generation operation for the programmer:

carriage return generates blank line.

BLD

131 N N N 1,6 1,6 0,8 0,8 Display generation operation for the programmer:

switch over to statement list (STL).

BLD

132 N N N 1,6 1,6 0,8 0,8 Display generation operation for the programmer:

switch over to control system flowchart (CSF).

BLD

133 N N N 1,6 1,6 0,8 0,8 Display generation operation for the programmer:

switch over to ladder diagram (LAD).

BLD

255 N N N 1,6 1,6 0,8 0,8 Display generation operation for the programmer:

segment termination.

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Supplementary Operations

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

A= Formal oper.

I, Q, F, T, C N Y N 160*160*160*3,6*AND operation: scan formal operand for ”1”.

(Data type: BI)

AN= Formal oper.

I, Q, F, T, C N Y N 163*163*163*3,6*AND operation: scan formal operand for ”0”.

(Data type: BI)

O= Formal oper.

I, Q, F, T, C N Y N 164*164*164*3,6*OR operation: scan formal operand for ”1”.

(Data type: BI)

ON= Formal oper.

I, Q, F, T, C N Y N 165*165*165*3,6*OR operation: scan formal operand for ”0”.

(Data type: BI)

AW N N N 1,6 1,6 0,8 0,8 Combine contents of ACCUM 2 and ACCUM 1 through

logic AND (word operation).

Result is stored in ACCUM 1. CC 1/CC 0 are affected.

OW N N N 1,6 1,6 0,8 0,8 Combine contents of ACCUM 2 and ACCUM 1 through

logic OR (word operation).

Result is stored in ACCUM 1. CC 1/CC 0 are affected.

XOW N N N 1,6 1,6 0,8 0,8 Combine contents of ACCUM 2 and ACCUM 1 through

EXCLUSIVE OR (word operation).

Result is stored in ACCUM 1. CC 1/CC 0 are affected.

Boolean Logic Operations

* plus execution time of the substituted operation

Bit Operations

TB T, C N Y N 143 143 143 143 Test a timer or counter word bit for ”1”.

Supplementary Operations

* plus execution time of the substituted operation

Opera-

tion

(STL)

Permissible

Operanden

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

TB D N Y N 155 155 155 155 Test a data word bit for ”1”.

TB RS N Y N 141 141 141 141 Test a data word bit in the system data range for ”1”.

TBN T, C N Y N 143 143 143 143 Test a timer or counter word bit for ”0”.

TBN D N Y N 159 159 159 159 Test a data word bit for ”0”.

TBN RS N Y N 139 139 139 139 Test a data word bit in the system data range for ”0”.

SU T, C N N Y 143 143 143 143 Set a timer or counter word bit unconditionally.

SU D N N Y 159 159 159 159 Set a data word bit unconditionally.

RU T, C N N Y 143 143 143 143 Reset a timer or counter word bit unconditionally.

RU D N N Y 158 158 158 158 Reset a data word bit unconditionally.

Bit Operations (cont.)

Set/Reset Operations

S= Formal oper.

E, A, M Y N Y 150*150*150*3,6*Set a formal operand, (with RLO =1).

(Data type: BI)

RB= Formal oper.

E, A, M Y N Y 150*150*150*3,6*Reset a formal operand, (with RLO =1).

(Data type: BI)

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Supplementary Operations

* plus execution time of the substituted operation

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

RD= Formal oper.

T, C Y N Y 146*146*146*3,6*Reset a formal operand (digital), (with RLO =1).

== Formal oper.

I, Q, F Y N Y 150*150*150*3,6*Assign the value of the RLO is assigned to the status

of the formal operand. (Data type: BI)

Set/Reset Operations (cont.)

Timer and Counter Operations

FR T, C Y N Y 3,7 3,7 3,7 1,9

Enable a timer/counter for cold restart.

If RLO=”1”,

- 'FR T' restarts the timer

- 'FR C' sets, decrements, or increments the counter

FR= Formal oper.

T, C Y N Y 144*144*144*3,6*Enable formal operand (timer/counter) for cold re-

start (for detailed description, see ”FR” operation).

SP= Formal oper.

TY N Y 144*144*144*3,6*Start a timer (formal operand) as pulse with the value

stored in ACCUM 1.

SR= Formal oper.

TY N Y 144*144*144*3,6*Start an on-delay timer (formal operand) with the

value stored in ACCUM 1.

SEC= Formal oper.

T, C Y N Y 144*144*144*3,6*Start a timer (formal operand) as extended pulse with

the value stored in ACCUM 1, or set a counter (formal

operand) with the next indicated count value.

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Supplementary Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

SSU= Formal oper.

T, C Y N Y 144*144*144*3,6*Start a stored on-delay timer (formal operand) with

the value stored in ACCUM 1, or increment a counter

(formal operand).

SFD= Formal oper.

T, C Y

Y N Y 144*144*144*3,6*Start an off-delay timer ( ) (formal operand) with the

value stored in ACCUM 1, or decrement a counter ( )

(formal operand).

Timer and Counter Operations (cont.)

Load and Transfer Operations

L= Formal oper.

I, Q, F, T, C NNN147*147*147*3,6*Load the value of the formal operand into ACCUM 1

(Data type: BY, W; additional actual operands: DL,

DR, DW).

L RS N N N 89 89 89 89 Load a word from the system data range into

ACCUM 1.

LC= Formal oper.

T, C NNN145*145*145*3,6*Load the value of the formal operand in BCD code

into ACCUM 1.

LW= Formal oper.

I, Q, F, T, C NNN124*124*124*3,6*Load a formal operand bit pattern into ACCUM 1

(Parameter type: D; data type: KC, KF, KH, KM, KS,

KT, KY).

T= Formal oper.

I, Q, F NNN148*148*148*3,6*Transfer the contents of ACCUM 1 to the formal

operand (Data type: BY, W; additional actual

operands: DL, DR, DW).

* plus execution time of the substituted operation

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Supplementary Operations

1 RLO is set to ”1”.

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

CFW N N N 1,6 1,6 0,8 0,8 Form the one's complement of ACCUM 1.

CSW N N N 1,6 1,6 0,8 0,8 Form the two's complement of ACCUM 1.

CC 1/CC 0 and OV are affected.

Conversion Operations

Shift Operations

SLW Parameter

n=0 ... 15 N N N 1,6 1,6 0,8 0,8

Shift the contents of ACCUM 1 to the left by the

value specified in the parameter.

Unassigned positions are padded with zeros.

CC 1/CC 0 are affected.

SRW Parameter

n=0 ... 15 N N N 1,6 1,6 0,8 0,8

Shift the contents of ACCUM 1 to the right by the

value specified in the parameter.

Unassigned positions are padded with zeros.

CC 1/CC 0 are affected.

Jump Operations

JU= Symb. address

max. 4 charact. N N N 1,6 1,6 0,8 0,8 Jump unconditionally to the symbolic address.

JC= Symb. address

max. 4 charact. YY

1Y 1,6 1,6 0,8 0,8 Jump conditionally to the symbolic address.

(If the RLO is ”0”, it is set to ”1”).

JZ= Symb. address

max. 4 charact. N N N 1,6 1,6 0,8 0,8 Jump if the result is zero. The jump is made only if

CC 1=0 and CC 0=0. The RLO is not changed.

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Supplementary Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

JN= Symb. address

max. 4 charact. N N N 1,6 1,6 0,8 0,8 Jump if the result is not zero. The jump is made only if

CC 1 CC 0 . The RLO is not changed.

JP= Symb. address

max. 4 charact. N N N 1,6 1,6 0,8 0,8 Jump if the result>0. The jump is made only if

CC 1=1 und CC 0=0. The RLO is not changed.

JM= Symb. address

max. 4 charact. N N N 1,6 1,6 0,8 0,8 Jump if the result <0. The jump is made only if

CC 1=0 and CC 0=1. The RLO is not changed.

JO= Symb. address

max. 4 charact. N N N 1,6 1,6 0,8 0,8 Jump on overflow. The jump is made only if the

OVERFLOW bit is set. The RLO is not changed.

Jump Operations (cont.)

Other Operations

IA N N N 55 55 55 55 Disable interrupt. Input/output interrupt or timer OB

processing is disabled.

RA N N N 55 55 55 55 Enable interrupt.

This operation cancels the effect of IA.

D N N N 1,7 1,7 0,9 0,9 Decrement the low byte (bits 0 to 7) of ACCUM 1 by

the value n (n=0 to 255).

I N N N 1,7 1,7 0,9 0,9 Increment the low byte (bits 0 to 7) of ACCUM 1 by

the value n (n=0 to 255).

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Supplementary Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

DO= Formal oper.

I, Q, F, T, C NNN170*170*170*3,6*Process a block. (Only C DB, JU PB, JU FB, JU SB and

JU OB can be substituted).

DO DW** NNN162*162*162*3,6*Process data word. The next operation is combined

through logic OR with the parameter specified in the

data word and executed **.

DO FW** NNN134*134*134*2,6*Process flag word. The next operation is combined

through logic OR with the parameter specified in the

flag word and executed **.

Other Operations (cont.)

*plus execution time of the substituted operation

** Permissible operations:

A, AN, O, ON; L, LC, T;

S, R, =; JU, JC, JZ, JN, JP, JM, JO, SLW, SRW;

FR T, R T, SF T,SR T, SP T, SS T, SE T; D, I;

FR C, R C, S C, CR C, CU C; C DB; T RS, TNB

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

System Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

SU RS N N Y 142 142 142 142 Set bit in system data range unconditionally.

RU RS N N Y 142 142 142 142 Reset bit in system data range unconditionally.

Set Operations

Load and Transfer Oprations

LIR 0 ( ACCUM 1)

2 ( ACCUM 2) NNN126*126*126*4,5** Load the contents of a memory word (addressed by

ACCUM 1) indirectly into the register (0: ACCUM 1; 2:

ACCUM 2) 1

TIR 0 ( ACCUM 1)

2 ( ACCUM 2) NNN105*105*105*4,5** Transfer the contents of the accumulator indirectly to

the memory word (addressed by ACCUM 1)

(0: ACCUM 1; 2: ACCUM 2) 1

LDI A1 ( ACCUM 1)

A2 ( ACCUM 2) NNN - - - 126

Load the contents of a memory word (addressed by

ACCUM 1) indirectly into ACCUM 1 or ACCUM 2

(A1=ACCUM 1, A2=ACCUM 2) 2

TDI A1 ( ACCUM 1)

A2 ( ACCUM 2) NNN - - - 105

Transfer the register contents indirectly into the

memory word (addressed by ACCUM 1)

(A1=ACCUMW1, A2=ACCUM 2) 2

TNB Parameter

n=0 ... 255 NNN *

68 +

34 · n

*

68 +

34 · n

*

68 +

34 · n

*

2,9+

n(1,7

+*)

Transfer a block byte by byte (number of bytes

0 to 255).

End address source: ACCUM 2

End address target: ACCUM 2

1 In the case of CPU 944 access to memory bank 1

2 In the case of CPU 944 access to memory bank 2 *When accessing the I/O area, the relevant timeouts for

each byte access must be added.

** +2× ready delay time of the referenced I/O modules

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

System Operations

Opera-

tion

(STL)

Permissible

Operands

1 RLO depend.

2 RLO affected

3 RLO reloaded

123

Typical

Execution Time

in µsec.

CPU

941 CPU

942 CPU

943 CPU

944

Function

T RS N N N 75 75 75 75 Transfer a word to the system data range.

Load and Transfer Oprations (cont.)

Jump Operation

JUR N N N 105 105 105 105 Jump randomly within a function block

(jump displacement: - 32768 to+32767).

Arithmetic Operations

ADD BF N N N 57 57 57 57 Add byte constant (fixed point) to ACCUM 1.

ADD KF N N N 90 90 90 90 Add fixed-point constant (word) to ACCUM 1.

Other Operations

DI Formal oper.

I, Q, F, T, C NNN174*174*174*174*Process via a formal operand (indirectly).

The number of the formal operand is in ACCUM 1.

STS N N N 50 50 50 50 Stop operation. Program processing is interrupted

immediately after this operation.

TAK N N N 80 80 80 80 Swap the contents of ACCUM 1 and ACCUM 2.

* plus execution time of the substituted operation

for organization blocks (OB)

for program blocks (PB) for function blocks (FB)

for sequence blocks (SB)

Machine Code

Listing

NOP 0

CFW

L

TNB

FR

BEC

FR=

A=

IA

RA

CSW

L

T

LC

JO=

Oper-

and

T

FY

T

Machine Code

B0 B1 B3B2

R

0

0d

0l

0d

0

0c

0

0a

0d

0i

L R L RL

0

0d

0l

0d

0

0c

0

8

0

0a

0d

0i

R

0

1

2

3

4

5

6

7

8

9

A

B

C

D

L

0

Opera-

tion

Explanation of the Indices

a + byte address

b + bit address

c + parameter address

d + timer number

e + constant

f + block number

g + word address

h + number of shifts

i + relative jump address

k + register address

l + block length in bytes

m + jump displacement (16 bits)

n + value

o + counter number

Machine Code

B0 B1 B3B2

130

131

132

133

255

FW

T

FB

DB

LC=

O=

BLD

I

L

T

SF

JP=

SFD=

S=

D

SE

JC

SEC=

==

C

>F

<F

><F

!=F

>=F

Opera-

tion Oper-

and

R L R LLRL R

0

1

2

0c

8

F

0n

0a

0d

0i

0c

0n

0d

0f

0c

0f

2

4

6

8

A

E

F

0

1

2

3

4

5

6

7

9

C

D

E

F

0

1

0c

2

3

4

5

F

0n

0a

0d

0i

0c

0n

0d

0f

0c

0f

0

L

2

3

Machine Code

B0 B1 B3B2

DL

T

KB

DR

T

KC

KT

KF

KS

KY

KH

KM

DW

T

<=F

L

T

SR

JM=

SR=

AN=

L

T

SS

JU=

SSU=

ON=

L

T

SP

JN=

SP=

Opera-

tion Oper-

and

R L R LLR R

C

0g

0d

0i

0c

0e

0g

0i

0c

0

1

2

4

8

0g

0d

0i

0c

1

2

3

4

5

6

7

8

A

B

C

D

E

F

0

2

3

4

5

6

0e

0

0g

0d

0i

0c

0e

0g

0d

0i

0c

1

2

4

0

0g

0d

0i

0c

L

3

4

5

Machine Code

B0 B1 B3B2

T

FB

C

IB

QB

IB

QB

C

OB

FW

BF

IW

QW

IW

QW

RB=

R

JU

RD=

LW=

LIR

AW

L

FR

JZ=

L=

TIR

OW

L

T

LC

JC

DO

ADD

XOW

L

T

Opera-

tion Oper-

and

R L R LLR R

0c

0d

0f

0c

0

0o

0i

0c

0

0a

8a

0a

8a

0o

0f

0g

0e

0

0a

8a

0a

8a

7

C

D

E

F

0

1

2

4

5

6

8

9

A

B

C

D

E

0

1

2

3

0c

0d

0f

0c

0k

0

0o

0i

0c

0k

0

0a

0o

0f

0g

0e

0

0a

L

5

6

7

Maschinen-Code

B0 B1 B3B2

C

PB

KF

C

SB

RS

A1

A2

C

OB

DW

C

CD

JC

ADD

-F

S

JC

SLW

L

T

BE

BEU

T=

LDI

TDI

LDI

TDI

SRW

CU

JU

DO

STS

TAK

STP

JRA

TB

TBN

Opera-

tion Ope-

rand

R L R LLR R

0o

0f

0

0o

0f

0h

0g

0

0c

0

2

0h

0o

0f

0g

0

1

4

5

8

9

C

D

1

2

3

5

6

8

9

C

D

E

0

0e

0m

0o

0e

0m

0o

0e

0m

0

0e

0m

C

8

0o

0f

0

0o

0f

0h

0g

0

1

0c

B

F

B

F

0h

0o

0f

0g

0

2

3

B

5

* PY in the case of S5-DOS programmers

L

7

Machine Code

B0 B1 B3B2

C

T

D

RS

PB/PY*

PB

DB

PW

C

SB

SU

RU

TB

TBN

SU

RU

TB

TBN

SU

RU

TB

TBN

SU

RU

L

T

JU

DO=

G

+F

L

T

R

JU

DI

Opera-

tion Oper-

and

R L R LLR R

1

2

4

5

0a

0f

0c

0

0a

0o

0f

0

2

3

5

6

8

9

A

B

C

D

E

0o

0d

0g

0f

0o

0d

0g

0f

0

0b

0

4

0

C

8

4

0

C

8

4

0

C

8

4

0

5

6

7

0a

0f

0c

5

0

0a

0o

0f

0

L

8

9

A

B

C

D

E

Machine Code

B0 B1 B3B2

F

C

I

Q

I

Q

I

Q

I

Q

I

Q

I

A

O

S

=

AN

ON

R

A

O

A(

O(

AN

ON

)

A

O

S

=

AN

ON

Opera-

tion Oper-

and

R L R LLR R

0a

0o

0

0o

0

0a

8a

0a

8a

0a

8a

0a

8a

0a

8a

0a

0b

8b

0b

8b

0b

8b

0b

8

9

A

B

C

D

F

0b

8b

0b

8b

0b

8b

0a

0o

0

0o

0

0a

L

E

F

Machine Code

B0 B1 B3B2

Q

I

Q

T

ON

R

A

O

JC=

O

AN

ON

NOP 1

Opera-

tion Oper-

and

R L R LLR R

8a

0a

8a

0d

0i

0

0d

F

8b

0b

8

9

A

B

C

D

F

0a

0d

0i

0

0d

F

Alphabetical Index

of Operations

Operation Page

A6, 48, 49

A( 6, 48

A= 24, 42

ADD 40, 45, 46

AN 6, 48, 49

AN= 24, 44

AW 24, 45

BE 20, 46

BEC 20, 42

BEU 20, 46

BLD 130 22, 43

BLD 131 22, 43

BLD 132 22, 43

BLD 133 22, 43

BLD 255 22, 43

C20, 43

CD 16, 46

CFW 32, 42

CSW 32, 42

CU 16, 46

D34, 43

DI 40, 47

DO 36, 45, 46

DO= 36, 47

Operation Page

FR 28, 42, 45

FR= 28, 42

G20, 47

I34, 43

IA 34, 42

IRA 40, 46

JC 20, 43, 45, 46

JC= 32, 49

JM= 34, 44

JN= 34, 44

JO= 34, 42

JP= 34, 43

JU 18, 20, 45-47

JU= 32, 44, 47

JZ= 32, 45

L8, 10, 30,

42-47

L= 30, 45

LC 12, 42, 45

LC= 30, 43

LDI 38, 46

LIR 38, 45

LW= 30, 45

NOP 0 22, 42

NOP 1 22, 49

Operation Page

O6, 43, 48, 49

O( 6, 48

O= 24, 43

ON 6, 24, 48, 49

ON= 6, 44

OW 24, 45

R6, 16, 45-49

RA 34, 42

RB= 26, 45

RD= 28, 45

RU 26, 38, 47

S6, 16, 26,

46, 48

S= 26, 43

SE 14, 43

SEC= 28, 43

SF 16, 43

SFD= 30, 43

SLW 32, 46

SP 14, 44

SP= 28, 44

SR 14, 44

SR= 28, 44

SRW 32, 46

SS 14, 44

Operation Page

SSU= 30, 44

STP 22, 46

STS 40, 46

SU 26, 38, 47

T12, 14, 40,

42-47

T= 30, 46

TAK 40, 46

TB 24, 26, 46, 47

TBN 26, 46, 47

TDI 38, 46

TIR 38, 45

TNB 38, 42

XOW 24, 45

)6,48

=6,48

== 28, 43

+F 16, 47

- F 16, 46

!=F 16, 43

>F 18, 43

>=F 18, 43

><F 18, 43

<F 18, 43

<=F 18, 44

Integral Blocks

Intregral Organization Blocks

You must programm the OB.

The operating system calls up the OB.

OB available

a

OB-No. Function OB integrated in

CPU

941 942 943 944

OB1 Cyclic program scanning

a

Interrupt-driven program scanning with priorities A, B, C, D

OB2 Interrupt A: Digital input

module -434

and IP

generate

interrupt

a

OB3 Interrupt B: IP generates

interrupt

a

OB4 Interrupt C: IP generates

interrupt

a

OB5 Interrupt D: IP generates

interrupt

a

OB10 Time-controlled program

scanning (variable in each

case: 10 msec. to 10 min.)

a

OB6 Interrupt generated by

internal timers

a

OB11

OB12

OB13

Integral Organization Blocks

You must programm the OB.

The operating system calls up the OB.

OB available

a

OB-No. Function OB integrated in

CPU

941 942 943 944

Controlling restart characteristics

OB24 Time-out during update

of process image and in-

terproc. communic. flags

a

OB27 Substitution error

a

OB32 Transfer errors in DB or

with GDB operation

a

OB34 Battery failure

a

OB21 Manual switch on

a

OB22 Automatic switch on

when power is restored

a

Handling programming errors and PLC faults

OB23 Time-out during

individual access to the S5

bus (e.g. LIR)

a

OB19 When a bl. is called which

has not been loaded.

a

Integral Organization Blocks

The OB is already programmed.

You must call up the OB.

OB available

a

OB-No. Function OB integrated in

CPU

941 942 943 944

OBs which offer operating functions

OB31 Scan time triggering

a

OB251 PID algorithm

a

OB160 Programmable time loop

a

OB254 Read in process I/O image

a

OB255 Output process I/O image

Integral Function Blocks

FB available

a

FB-No. Function FB integrated in

CPU

941 942 943 944

FB238 Compress PLC memory

a

FB239 Delete block

a

FB240 4-tetrad BCD code

converter

a

FB241 16-bit fixed-point

converter

a

FB242 16-bit binary multiplier

a

FB243 16-bit binary divider

a

FB244 Send data

a

FB245 Receive data

a

FB246 Fetch data

a

FB247 Monitor job processing

a

FB248 Delete job

a

FB249 Initialize interface

a

FB250 Read analog value

a

FB251 Output analog value

a

Integral Data Block 1

1 Additionally, set switch for Default/Overall Reset on the

control panel of the CPU to ”RE”

Parameter Argument Meaning

Block Identifier: SL1: SINEC L1

SLN

SM

RM

CBR

CBS

PGN

p

DBxDWy or

MBy

p

”

SL

ave-

N

umber” (p=1 to 30;

p=0 to 30 in the case of CPU 943/944

with 2 interfaces)

Position of the

S

end

M

ailbox (start of SM)

Position of the

R

eceive

M

ailbox (start of RM)

Position of the

C

oordination

B

yte

R

eceive

Position of the

C

oordination

B

yte

S

end

(x=2 to 255; y=0 to 255)

PG

bus

N

umber (p=1 to 30)

Note: CBS and CBR are in a flag byte or in the high-order

byte of the specified data word (DL)!

Block Identifier: SDP: System-Dependent-Parameters

WD

RDLY

RT

RC

RF

PROT

PIO

PII

PRIO

p

r

Y/N

s

”

W

atch

D

og” (scan time monitoring)

can be set in milliseconds but only in steps of 10 msec.

(p=0 to 2550)

”

R

un

D

e

L

a

Y

” restart delay after POWER ON in msec.

(r=0 to 65535)

Note: RDLY only becomes effective in case of backup oper.:

in case of EPROM oper., the setting is fixed at 1000 ms!

”

R

esident

T

imers” (if ”Y”, all timers are retentive, if ”N”,

only the first half are retentive)1

”

R

esident

C

ounters” (if ”Y”, all counters are retentive, if

”N”, only the first half are retentive)1

”

R

esident

F

lags” (if ”Y”, all flags are retentive, if ”N”, only

the first half are retentive)1

”

PROT

ection” activate software protection?

(input/output of program no longer possible)

”

P

rocess

I

mage

O

utput” disable output of process image?

”

P

rocess

I

mage

I

nput” disable read in of process image?

OB6

PRIO

rity (the following is the descending order of

priority:)

s=0 OB 6, OB 2 to 5, OB 13 to 10

s=1 OB 2 to 5, OB 6, OB 13 to 10)

(OBs 2 to 6 cannot be interrupted!)

N=no Y=yes

Block Identifier: TFB: Timer-Function Block

OB10

OB11

OB12

OB13

p

Interval (msec.) during which OB10 to 13 is called and

processed

(p=0 to 655350 (programmable in 10-msec. intervals)

Integral Data Block 1

2If an argument (e.g. minute) is not to be transferred,

enter XX! The clock will then continue with the current

value.

1If an argument (e.g. weekday) is not to be transferred,

enter XX! The clock will then continue with the current

value. If you specify AM or PM after the clock time, the

clock will operate in the relevant 12-hour mode. If you

omit this argument, the clock will operate in 24-hr mode.

Parameter Argument Meaning

Block Identifier: PFB: Placement of FB

SFB p q ”

S

ubstitute

FB

”

Replace number p of the integral FB p (COMPR or DELETE)

with the number q

p = 238, 239 q=0 to 239, 252 to 255

Block Identifier: CLP:

CLK

STW

SET

TIS

OHS

OHE

STP

SAV

CF

Clock Parameters

(only in the case of CPU 943/944 with two interfaces)

DBxDWy or MBy

wd dd.mm.yy

hh:mm:ss AM/PM1

wd dd.mm.

hh:mm:ss AM/PM1

hhhhhh:mn:ss2

Y/N

P

”

CL

oc

K

Data” start of clock data area

”

ST

atus

W

ord” Position of the status word

Set clock time, date

”

T

imer

I

nterrupt

S

et”

”

O

peration

H

our counter

S

et”

”

O

peration

H

our counter

E

nable ”

”

ST

O

P

” Update clock in STOP state

SAV

e Save clock time after last RUN STOP or POWER OFF

”

C

orrection

F

actor” Enter correction factor

wd = 1 to 7 (Weekday=Su to Sa) p=- 400 to +400

dd = 01 to 31 (Day) x=2 to 255

mm = 01 to 12 (Month) y=0 to 255

yy = 0 to 99 (Year) y/Y=yes

hh = 1 to 12 (AM/PM) 00 ... 23 n/N=no

mn = 00 to 59 (Minutes)

ss = 00 to 59 (Seconds)

hhhhhh = 000000 to 999999 (Hours)

Block Identifier: ERT:

ERR MBx or DByDWz

Error Return

”

ERR

ors” Position of the error code

( x=0 to 236

y=2 to 255

z=0 to 255 )

Evaluation

of CC 1 and CC 0

CC

1CC

0Arith-

metic

Opera-

tions

Digital

Logic

Opera-

tions

Compa-

rison

Opera-

tions

Shift

Opera-

tions

Con-

version

Opera-

tions

00Result

=0 Result

=0

ACCUM 2

=

ACCUM 1

shifted

Bit

=0 -

01Result

<0 -ACCUM 2

<

ACCUM 1 -Result

<0

10Result

>0 Result

0

ACCUM 2

>

ACCUM 1

shifted

Bit

=0

Result

>0

Suggestions/Corrections:

Siemens AG

AUT E1114B

Postfach 1963

Werner-von-Siemens-

Str. 50

D-92209 Amberg

Fed. Rep. of Germany

From:

Name

Company/Department

Address

Telephone

Publication:

Programmable Controller

SIMATIC S5-115U (CPU 941/942/943/944)

Reference Guide

Order No.: 6ES5 997-7LA21

Should you come across

any printing errors

when reading this

publication, we would

ask you to inform us

using this form. We

would also welcome

any suggestions you

may have for

improvement.

Siemens AG

Automation Group

Industrial Automation Systems

Postfach 4848, 8500 Nürnberg 1

Subject to change without prior notice

Siemens Aktiengesellschaft

Order No. 6ES5 997-7LA21

Printed in the Fed. Rep. of Germany