QS35257 ADVANCE INFORMATION Q QUALITY SEMICONDUCTOR, INC. QuickSwitch(R) Products High-Speed CMOS QuickSwitch Quad 2:1 Mux/Demux With 50 Damping Resistor QS35257 ADVANCE INFORMATION FEATURES/BENEFITS DESCRIPTION * Enhanced N channel FET with no inherent diode to VCC * Bidirectional switches connect inputs to outputs * Pin compatible with the 74F257, 74FCT257, and 74FCT257T * Zero propagation delay, zero ground bounce * TTL-compatible control inputs * Undershoot clamp diodes on all switch and control pins * Available in SOIC (S1), QSOP The QS35257 is a high-speed CMOS LVTTL-compatible Quad 2:1 multiplexer/demultiplexer. The QS35257 is a function and pinout compatible QuickSwitch version of the 74F257, 74FCT257, and the 74ALS/AS/LS257 Quad 2:1 multiplexers. The QS35257 has 50 series resistors to reduce ground bounce noise. The series resistor minimizes chargesharing effect and is ideal for series termination of unterminated PCB/transmission lines. Mux/Demux devices provide an order of magnitude faster speed than equivalent logic devices. y n pa APPLICATIONS * Logic replacement * Video, audio, graphics switching, muxing * Hot-swapping, hot-docking (Application Note AN-13) * Voltage translation (5V to 3.3V; Application Note AN-11) * Bus funneling m o C n a w Figure 1. Functional Block Diagram No S E I0A YA I1A I0B YB I1B I0C YC I1C I0D YD MDSL-00044-02 JULY 31, 1997 I1D QUALITY SEMICONDUCTOR, INC. 1 QS35257 ADVANCE INFORMATION Table 1. Pin Description Figure 2. Pin Configuration (All Pins Top View) Name I/O Description Ixx I Data Inputs S I Select Input E I Enable Input YA-YD O Data Outputs SOIC (S1), QSOP S I0A I1A YA I0B I1B YB GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 y n pa Table 2. Function Table Inputs Outputs E S YA YB YC YD Function H X Hi-Z Hi-Z Hi-Z Hi-Z Disable L L I0A I0B I0C I0D Select 0 L H I1A I1B I1C I1D Select 1 VCC E I0D I1D YD I0C I1C YC m o C n a w Table 3. Absolute Maximum Ratings No Supply Voltage to Ground ........................................... -0.5V to +7.0V DC Switch Voltage VS .................................................. -0.5V to +7.0V DC Input Voltage VIN ................................................... -0.5V to +7.0V AC Input Voltage (for a pulse width 20ns) .............................. -3.0V DC Output Current Max. Sink Current/Pin ............................... 120mA Maximum Power Dissipation ................................................ 0.5 watts TSTG Storage Temperature ......................................... -65 to +150C Note: ABSOLUTE MAXIMUM CONTINUOUS RATINGS are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum conditions is not implied. Table 4. Capacitance TA = 25C, f = 1MHz, VIN = 0V, VOUT = 0V SOIC, QSOP Typ Max Pins Control Inputs 2 Unit 4 5 pF QuickSwitch Channels Demux 5 7 pF (Switch OFF) Mux 9 10 pF Note: Capacitance is guaranteed, but not production tested and are typical values. For total capacitance while the switch is ON, please see Section 1 under "Input and Switch Capacitance." QUALITY SEMICONDUCTOR, INC. MDSL-00044-02 JULY 31, 1997 QS35257 ADVANCE INFORMATION Table 5. DC Electrical Characteristics Over Operating Range Commercial TA = -40C to +85C, VCC = 5.0V 10% Symbol Parameter Test Conditions Min Typ(1) Max Unit VIH Input HIGH Voltage Guaranteed Logic HIGH for Control Pins 2.0 -- -- V VIL Input LOW Voltage Guaranteed Logic LOW for Control Pins -- -- 0.8 V | IIN | Input Leakage Current (Control Inputs) 0V VIN VCC -- -- 1 A | IOZ | Off-State Current (Hi-Z) 0V VOUT VCC -- 0.001 1 A RON Switch On Resistance(2) VCC = Min., VIN = 0.0V ION = 15mA 35 50 70 RON Switch On Resistance(2) VCC = Min., VIN = 2.4V ION = 6mA 35 55 75 3.7 4 VP Pass Voltage(3) VIN = VCC = 5V, IOUT = -5A y n a 4.2 V p m Co Notes: 1. Typical values indicate VCC = 5.0V and TA = 25C. 2. For a diagram explaining the procedure for RON measurement, please see Section 1 under, "DC Electrical Characteristics." RON guaranteed, but not production tested. 3. Pass voltage is guaranteed, but not production tested. n a w Figure 3. Typical ON Resistance vs. VIN at VCC = 5.0V No 200 175 150 125 RON (ohms) 100 75 50 25 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VIN (Volts) MDSL-00044-02 JULY 31, 1997 QUALITY SEMICONDUCTOR, INC. 3 QS35257 ADVANCE INFORMATION Table 6. Power Supply Characteristics Over Operating Range TA = -40C to +85C, VCC = 5.0V 10% Symbol Parameter Test Conditions(1) Max Unit ICCQ Quiescent Power Supply Current VCC = Max., VIN = GND or VCC, f = 0 3.0 A ICC Power Supply Current(2) per Input HIGH VCC = Max, VIN = 3.4V, f = 0 per control input 1.5 mA QCCD Dynamic Power Supply Current per MHz(3) VCC = Max, I and Y Pins Open, Control Inputs Toggling @ 50% Duty Cycle 0.25 mA/ MHz Notes: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC specifications. 2. Per TTL driven-input (VIN = 3.4V, control inputs only). I and Y pins do not contribute to ICC. 3. This parameter applies to the control inputs only and represents the current required to switch internal capacitance at the specified frequency. The I and Y inputs generate no significant AC or DC currents as they transition. This parameter is guaranteed, but not production tested. y n pa Table 7. Switching Characteristics Over Operating Range TA = -40C to +85C, VCC = 5.0V 10% CLOAD = 50pF, RLOAD = 500 unless otherwise noted. m o C QS35257 Symbol Description(1) Min Typ Max Data Propagation Delays In to Y -- -- tPZH tPZL Switch Turn-on Delay Sn to Y 0.5 -- 5.2 ns Switch Turn-on Delay En to Y 0.5 -- 5.0 ns Switch Turn-off Delay(2) En to Y, Sn to Y 0.5 -- 4.8 ns tPHZ tPLZ tPHZ tPLZ n a w No 2.5 Unit tPLH tPHL (2,3) (3) ns Notes: 1. See Test Circuit and Waveforms. Minimums guaranteed, but not production tested. 2. This parameter is guaranteed, but not production tested. 3. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 2.5ns for QS35257 for CL = 50pF. Since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay of the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side. 4 QUALITY SEMICONDUCTOR, INC. MDSL-00044-02 JULY 31, 1997