MMA1270KEG
Rev 0, 11/2009
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2009. All rights reserved.
Low G
Micromachined Accelerometer
The MMA series of silicon capacitive, micromachined accelerometers feature
signal conditioning, a 2-pole low pass filter and temperature compensation.
Zero-g offset full scale span and filter cut-off are factory set and require no
external devices. A full system self-test capability verifies system functionality.
Features
• Integral Signal Conditioning
• Linear Output
• 2nd Order Bessel Filter
• Calibrated Self-test
• EPROM Parity Check Status
• Transducer Hermetically Sealed at Wafer Level for Superior Reliability
• Robust Design, High Shock Survivability
• Qualified AEC-Q100, Rev. F Grade 2 (-40°C/ +105°C)
Typical Applications
• Vibration Monitoring and Recording
• Appliance Control
• Mechanical Bearing Monitoring
• Computer Hard Drive Protection
• Computer Mouse and Joysti cks
• Virtual Reality Input Devices
• Sports Diagnostic Devices and Systems
ORDERING INFORMATION
Device Name Temperature Range Case No. Package
MMA1270EG –40° to 105°C475-01 SOIC-16
MMA1270EGR2 –40° to 105°C475-01 SOIC-16, Tape & Reel
MMA1270KEG* –40° to 105°C475-01 SOIC-16
MMA1270KEGR2* –40° to 105°C475-01 SOIC-16, Tape & Reel
*Part number sourced from a different facility.
MMA1270KEG
MMA1270KEG: Z-AXIS SENSITIVITY
MICROMACHINED
ACCELEROMETER
±2.5g
KEG SUFFIX (Pb-FREE)
16-LEAD SOIC
CASE 475-01
Figure 1. Simplified Accelerometer Functional Block Diagram Figure 2. Pin Connections
G-Cell
Sensor Integrator Gain Filter Temp Comp
and Gain
Self-test Control Logic &
EPROM Trim Circuits Clock
Generator
Oscillator
VDD
VOUT
VSS
ST
STATUS
VSS
VSS
VSS
VOUT
STATUS
VDD
VSS
ST
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
MMA1270KEG
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2Freescale Semiconductor
ELECTRO STATIC DISCHARGE (ESD)
WARNING: This device is sensitive to electrostatic
discharge.
Although the Freescale accele rometers contain internal
2kV ESD protection circuitry, extra precaution must be taken
by the user to protect the chip from ESD. A charge of over
2000 volts can accumulate on the human body or associated
test equipment. A charge of this magnitude can alter the
performance or cause failure of the chip. When handling the
accelerometer, proper ESD precautions should be followed
to avoid exposing the device to discharges which may be
detrimental to its performance.
Table 1. Maximum Ratings
(Maximum ratings are the limits to which the device can be exposed without causing perma nent damage.)
Rating Symbol Value Unit
Powered Acceleration (all axes) Gpd 1500 g
Unpowered Acceleration (all axes) Gupd 2000 g
Supply Voltage VDD –0.3 to +7.0 V
Drop Test (1)
1. Dropped onto concrete surface from any axis.
Hdrop 1.2 m
Storage Temperature Range Tstg –40 to +125 °C
MMA1270KEG
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Freescale Semiconductor 3
Table 2. Operating Characteristics
(Unless otherwise noted: –40°C ≤ TA ≤ +105°C, 4.75 ≤ VDD ≤ 5.25, Acceleration = 0g, Loaded output.(1))
1. For a loaded output the measurements are observed after an RC filter consisting of a 1 kΩ resistor and a 0.1 μF capacitor to ground.
Characteristic Symbol Min Typ Max Unit
Operating Range(2)
Supply Voltage(3)
Supply Current
Operating Temperature Range
Acceleration Range
2. These limits define the range of operation for which the part will meet specification.
3. Within the supply range of 4.75 and 5.25 volts, the device operates as a fully calibrated linear accelerometer. Beyond these supply limits the
device may operate as a linear device but is not guaranteed to be in calibration.
VDD
IDD
TA
gFS
4.75
1.1
–40
—
5.00
2.1
—
2.5
5.25
3.0
+105
—
V
mA
°C
g
Output Signal
Zero g (TA = 25°C, VDD = 5.0 V)(4)
Zero g (VDD = 5.0 V)
Sensitivity (TA = 25°C, VDD = 5.0 V)(5)
Sensitivity (VDD = 5.0 V)
Bandwidth Response
Nonlinearity
4. The device can measure both + and – acceleration. With no input acceleration the output is at midsupply. For positive acceleration the output
will increase above VDD/2 and for negative acceleration the output will decrease below VDD/2.
5. The device is claibrated at 2g. Sensitivity limits apply to 0 Hz acceleration.
VOFF
VOFF
S
S
f-3dB
NLOUT
2.25
2.2
712.5
693.8
40
–1.0
2.5
2.5
750
750
50
—
2.75
2.8
787.5
806.3
60
+1.0
V
V
mV/g
mV/g
Hz
% FSO
Noise
RMS (0.1 Hz – 1.0 kHz)
Spectral Density (RMS, 0.1 Hz – 1.0 KHz)(6)
6. At clock frequency ≅ 70 kHz.
nRMS
nSD
—
—3.5
700 6.5
—mVrms
μg/√Hz
Self-Test
Output Response (VDD = 5.0 V)
Input Low
Input High
Input Loading(7)
Response Time(8)
7. The digital input pin has an internal pull-down current source to prevent inadvertent self test initiation due to external board level leakages.
8. Time for the output to reach 90% of its final value after a self-test is initiated.
ΔVST
VIL
VIH
IIN
tST
0.9
VSS
0.7 VDD
–300
—
1.25
—
—
–125
10
1.6
0.3 VDD
VDD
–50
25
V
V
V
μA
ms
Status(9), (10)
Output Low (Iload = 100 μA)
Output High (Iload = 100 μA)
9. The Status pin output is not valid following power-up until at least one rising edge has been applied to the self-test pin. The Status pin is high
whenever the self-test input is high.
10. The Status pin output latches high if the EPROM parity changes to odd. The Status pin can be reset by rising edge on self-test, unless a fault
condition continues to exist.
VOL
VOH
—
VDD –0.8 —
—0.4
—V
V
Output Stage Performance
Electrical Saturation Recovery Time(11)
Full Scale Output Range (IOUT = 200 μA)
Capacitive Load Drive(12)
Output Impedance
11. Time for amplifiers to recover after an acceleration signal causes them to saturate.
12. Preserves phase margin (60°) to guarantee output amplifier stability.
tDELAY
VFSO
CL
ZO
—
VSS +0.25
—
—
—
—
—
50
2.0
VDD –0.25
100
—
ms
V
pF
Ω
Mechanical Characteristics
Transverse Sensitivity(13)
13. A measure of the device's ability to reject an acceleration applied 90° from the true axis of sensitivity.
VXZ,YZ ——5.0% FSO
MMA1270KEG
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4Freescale Semiconductor
PRINCIPLE OF OPERATION
The Freescal e accelerometer is a surf ace-micromachined
integrated-circuit accelerometer.
The device consists of a surface micromachined
capacitive sensing cell (g-cell) and a CMOS signal
conditioning ASIC contained in a single integrated circuit
package. The sensing element is sealed hermetically at the
wafer level using a bulk micromachined “cap'' wafer.
The g-cell is a mechanical structure formed from
semiconductor materials (polysilicon) using semiconductor
processes (masking and etching). It can be modeled as two
stationary plates with a moveable plate in-between. The
center plate can be deflected from its rest position by
subjecting the system to an acceleration (Figure 3).
When the center plate deflects, the distance from it to one
fixed plate will increase by the same amount that the distance
to the other plate decreases. The change in distance is a
measure of acceleration.
The g-cell plates form two back-to-back capacitors
(Figure 4). As the center plate moves with acceleration, the
distance between the plates changes an d each capacitor's
value will change, (C = Aε/D). Where A is the area of the
plate, ε is the dielectric constant, and D is the distance
between the plates.
The CMOS ASIC uses switched capacitor techniques to
measure the g-cell capacitors and extract the acceleration
data from the difference between the two capacitors. The
ASIC also signal conditions and filters (switched capacitor)
the signal, providing a high level output voltage that is
ratiometric and proportional to acceleration.
SPECIAL FEATURES
Filtering
The Freescale accelerometers contain an onboard 2-pole
switched capacitor filter. A Bessel implementation is used
because it provides a maximally flat delay response (linear
phase) thus preserving pulse shap e integrity. Because the
filter is realized using switched capacitor techniques, there is
no requirement for external passive components (resistors
and capacitors) to set the cut-off frequency.
Self-Test
The sensor provides a self-test feature that al lows the
verification of the mechanical and electrical integrity of the
accelerometer at any time before or after installation. This
feature is critical in applications such as automotive airbag
systems where system integrity must be ensured over the life
of the vehicle. A fourth “plate'' is used in the g-cell as a self-
test plate. When the user applies a logic high input to the self-
test pin, a calibrated potential is app lied across the self-test
plate and the moveable plate. Th e resulting electrostatic
force (Fe = 1/2AV2/d2) causes the center plate to deflect. The
resultant deflection is measured by the accelerometer's
control ASIC and a proportional output voltage results. This
procedure assures that both the mechanical (g-cell) and
electronic sections of the accelerometer are functioning.
Status
Freescale accelerometers include fault detection circuitry
and a fault latch. The Status pin is an output from the fault
latch, OR'd with self-test, and is set high whenever the
following event occurs:
• Parity of the EPROM bits becomes odd in number.
• The fault latch can be reset by a rising edge on th e self-
test input pin, unless one (or more) of the fault conditions
continues to exist.
Acceleration
Figure 3. Transducer
Physical Model Figure 4. Equivalent
Circuit Model
MMA1270KEG
Sensors
Freescale Semiconductor 5
BASIC CONNECTIONS
Pinout Description
Figure 5. SOIC Accelerometer with Recommended
Connection Diagram
PCB Layout
Figure 6. Re commended PCB Layou t for In terfa c ing
Accelerometer to Microcontroller
NOTES:
1. Use a 0.1 μF capacitor on VDD to decouple the power
source.
2. Physical coupling distance of the accelerometer to the
microcontro l l er shou l d be mini ma l .
3. Place a ground plane ben eath the accelerometer to
reduce noise, the ground plane should be attached to
all of the open ended terminals shown in Figure 6.
4. Use an RC filter of 1 kΩ and 0.1 μF on the output of the
accelerometer to minimize clock noise (from the
switched capacitor filter circuit).
5. PCB layout of power and ground should not couple
power supply noise.
6. Accelerometer and microcontroller should not be a
high current path.
7. A/D sampling rate and any external power supply
switching frequency should be selected such that they
do not interfere with the internal accelerometer
sampling frequency. This will prevent aliasing errors.
Table 3. Pin Descriptions
Pin No. Pin Name Description
1 thru 3 VSS Redundant connections to the internal
VSS and may be left unconnected.
4V
OUT Output voltage of the accelerometer.
5 STATUS Logic output pin used to indicate fault.
6V
DD The power supply input.
7V
SS The power supply ground.
8 ST Logic input pin used to initiate self-test.
9 thru 13 Trim pins Used for factory trim.
Leave unconnected.
14 thru 16 — No internal connection.
Leave unconnected.
VSS
VSS
VSS
VOUT
STATUS
VDD
VSS
ST
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8MMA1270KEG
ST
VDD
VSS
VOUT OUTPUT
SIGNAL
R1
1 kΩ
4
C2
0.1 μF
6
7
LOGIC
INPUT
VDD
C1
0.1 μF
STATUS
5
3
2
1
VSS
VSS
VSS
P0
A/D In
VRH
VSS
VDD
ST
VOUT
VSS
VDD
0.1 μF1 kΩ
0.1 μF
0.1 μF
Power Supply
0.1 μF
P1STATUS
Microcontroller
Accelerometer
C
C
C
C
R
MMA1270KEG
Sensors
6Freescale Semiconductor
1. When positioned as shown, the Earth's gravity will result in a positive 1g output
ACCELERATION SENSING DIRECTIONS
16-Pin SOIC Package
N/C pins are recommended to be left FLOATING
–g
+g
Direction of Earth's gravity field(1)
DYNAMIC ACCELERATION
STATIC ACCELERATION
–1g
+1g
0g 0g
VOUT = 2.50 V VOUT = 2.50 V
VOUT = 3.25 V
VOUT = 1.75 V
VSS
VSS
VSS
VOUT
STATUS
VDD
VSS
ST
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
MMA1270KEG
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Freescale Semiconductor 7
PACKAGE DIMENSIONS
CASE 475-01
ISSUE C
16-LEAD SOIC
PAGE 1 OF 2
MMA1270KEG
Sensors
8Freescale Semiconductor
PACKAGE DIMENSIONS
CASE 475-01
ISSUE C
16-LEAD SOIC
PAGE 2 OF 2
MMA1270KEG
Rev. 0
11/2009
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