HMPS-282x Series MiniPak Surface Mount RF Schottky Barrier Diodes Data Sheet Description/Applications These ultra-miniature products represent the blending of Avago Technologies' proven semiconductor and the latest in leadless packaging. This series of Schottky diodes is the most consistent and best all-round device available, and finds applications in mixing, detecting, switching, sampling, clamping and wave shaping at frequencies up to 6 GHz. The MiniPak package offers reduced parasitics when compared to conventional leaded diodes, and lower thermal resistance. Features * Surface mount MiniPak package - low height, 0.7 mm (0.028") max. The HMPS-282x family of diodes offers the best allaround choice for most applications, featuring low series resistance, low forward voltage at all current levels and good RF characteristics. * Low FIT (Failure in Time) rate* - small footprint, 1.75 mm2 (0.0028 inch2) * Better thermal conductivity for higher power dissipation * Single and dual versions * Matched diodes for consistent performance * Low turn-on voltage (as low as 0.34 V at 1 mA) * Six-sigma quality level * For more information, see the Surface Mount Schottky Reliability Data Sheet. Note that Avago's manufacturing techniques assure that dice found in pairs and quads are taken from adjacent sites on the wafer, assuring the highest degree of match. Package Lead Code Identification (Top View) Single Anti-parallel Pin Connections and Package Marking Parallel 3 4 3 4 3 4 2 1 2 1 2 1 #0 #2 3 4 AA 2 1 #5 Product code Date code Notes: 1. Package marking provides orientation and identification. 2. See "Electrical Specifications" for appropriate package marking. HMPS-282x Series Absolute Maximum Ratings [1], TC = 25C Symbol Parameter Units MiniPak 1412 If Forward Current (1 s pulse) A 1 PIV Peak Inverse Voltage V 15 Tj Junction Temperature C 150 Tstg Storage Temperature C -65 to +150 C/W 150 jc Thermal Resistance [2] ESD WARNING: Handling Precautions Should Be Taken To Avoid Static Discharge. Notes: 1. Operation in excess of any one of these conditions may result in permanent damage to the device. 2. TC = +25C, where TC is defined to be the temperature at the package pins where contact is made to the circuit board. Electrical Specifications, TC = +25C, Single Diode [4] Part Number HMPS- Package Marking Code Lead Code Configuration 2820 2822 2825 L K J 0 2 5 Single Anti-parallel Parallel Test Conditions Minimum Breakdown Voltage VBR (V) Maximum Forward Voltage VF (mV) Maximum Forward Voltage VF (V) @ IF (mA) Maximum Reverse Leakage IR (nA) @ VR (V) Maximum Capacitance CT (pF) Typical Dynamic Resistance RD () [4] 15 340 0.5 100 1.0 12 IR = 100 A IF = 1 mA [1] VF = 0 V f = 1 MHz[2] IF = 5 mA 10 Notes: 1. VF for diodes in pairs is 15 mV maximum at 1 mA. 2. CTO for diodes in pairs is 0.2 pF maximum. 3. Effective carrier lifetime () for all these diodes is 100 ps maximum measured with Krakauer method at 5 mA. 4. RD = RS + 5.2 at 25C and If = 5 mA. 2 1 SPICE Parameters Linear Equivalent Circuit Model Diode Chip Rj RS Cj Parameter Units HMPS-282x BV V 15 CJ0 pF 0.7 EG eV 0.60 IBV A 1E-4 IS A 2.2E-8 N RS = series resistance (see Table of SPICE parameters) C j = junction capacitance (see Table of SPICE parameters) 8.33 X 10-5 nT Rj = I b + Is where Ib = externally applied bias current in amps Is = saturation current (see table of SPICE parameters) T = temperature, K n = ideality factor (see table of SPICE parameters) Linear Circuit Model of the Diode's Package 20 fF 3 4 30 fF 30 fF 1.1 nH 2 1 20 fF Single diode package (HMPx-x8x0) 20 fF 0.05 nH 0.5 nH 0.5 nH 0.05 nH 4 3 12 fF 30 fF 0.05 nH 0.5 nH 0.5 nH 30 fF 0.05 nH 2 1 20 fF Anti-parallel diode package (HMPx-x8x2) 20 fF 0.05 nH 0.5 nH 0.5 nH 0.05 nH 4 3 30 fF 0.05 nH 12 fF 0.5 nH 0.5 nH 2 1 20 fF Parallel diode package (HMPx-x8x5) 3 30 fF 0.05 nH 1.08 RS 8.0 PB V 0.65 PT 2 M 0.5 HMPS-282x Series Typical Performance Tc = 25C (unless otherwise noted), Single Diode 1 10,000 0.8 0.1 1000 100 TA = +125C TA = +75C TA = +25C 10 1 0.01 0.10 0.20 0.30 0.40 0 0.50 5 2 IF - FORWARD CURRENT (mA) 100 10 10 IF (Left Scale) 0.3 100 10 VF (Right Scale) 1 0.2 0.4 I F - FORWARD CURRENT (mA) 0.6 0.8 1.0 1.2 1 1.0 IF (Left Scale) 10 VF (Right Scale) 1 0.10 0.3 1.4 0.15 0.1 0.25 0.20 VF - FORWARD VOLTAGE (V) Figure 6. Typical Vf Match, Series Pairs at Detector Bias Levels. Figure 5. Typical Vf Match, Series Pairs and Quads at Mixer Bias Levels. 1 8 100 VF - FORWARD VOLTAGE (V) Figure 4. Dynamic Resistance vs. Forward Current. 6 Figure 3. Total Capacitance vs. Reverse Voltage. 30 10 4 VR - REVERSE VOLTAGE (V) 30 1000 1 0 15 Figure 2. Reverse Current vs. Reverse Voltage at Temperatures. Figure 1. Forward Current vs. Forward Voltage at Temperatures. RD - DYNAMIC RESISTANCE () 0 10 VR - REVERSE VOLTAGE (V) VF - FORWARD VOLTAGE (V) 1 0.1 0.4 0.2 IF - FORWARD CURRENT (A) 0 0.6 VF - FORWARD VOLTAGE DIFFERENCE (mV) 1 VF - FORWARD VOLTAGE DIFFERENCE (mV) 10 100,000 C T - CAPACITANCE (pF) TA = +125C TA = +75C TA = +25C TA = -25C I R - REVERSE CURRENT (nA) I F - FORWARD CURRENT (mA) 100 10 RF in 0.01 18 nH HSMS-282B Vo 3.3 nH 100 pF 0.001 -40 -30 -20 Pin - INPUT POWER (dBm) Figure 7. Typical Output Voltage vs. Input Power, Small Signal Detector Operating at 850 MHz. 4 0.01 +25C 0 1E-005 -20 HSMS-282B RF in 0.001 68 0.0001 100 K -10 0.1 -10 10 9 8 7 100 pF 0 Vo CONVERSION LOSS (dB) -25C +25C +75C 0.1 VO - OUTPUT VOLTAGE (V) VO - OUTPUT VOLTAGE (V) 10 1 DC bias = 3 A 4.7 K 20 30 Pin - INPUT POWER (dBm) Figure 8. Typical Output Voltage vs. Input Power, Large Signal Detector Operating at 915 MHz. 6 0 2 4 6 8 10 LOCAL OSCILLATOR POWER (dBm) Figure 9. Typical Conversion Loss vs. L.O. Drive, 2.0 GHz (Ref AN997). 12 Assembly Information The MiniPak diode is mounted to the PCB or microstrip board using the pad pattern shown in Figure 10. 0.4 0.5 pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. Components with a low mass, such as the MiniPak package, will reach solder reflow temperatures faster than those with a greater mass. 0.4 Avago's diodes have been qualified to the time-temperature profile shown in Figure 12. This profile is representative of an IR reflow type of surface mount assembly process. 0.3 0.5 0.3 Figure 10. PCB Pad Layout, MiniPak (dimensions in mm). This mounting pad pattern is satisfactory for most applications. However, there are applications where a high degree of isolation is required between one diode and the other is required. For such applications, the mounting pad pattern of Figure 11 is recommended. 0.40 mm via hole (4 places) After ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) passes through one or more preheat zones. The preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporating solvents from the solder paste. The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder. The rates of change of temperature for the ramp-up and cool-down zones are chosen to be low enough to not cause deformation of the board or damage to components due to thermal shock. The maximum temperature in the reflow zone (TMAX) should not exceed 255 C. 0.20 2.40 0.8 These parameters are typical for a surface mount assembly process for Avago diodes. As a general guideline, the circuit board and components should be exposed only to the minimum temperatures and times necessary to achieve a uniform reflow of solder. 0.40 2.60 350 Figure 11. PCB Pad Layout, High Isolation MiniPak (dimensions in mm). SMT Assembly Reliable assembly of surface mount components is a complex process that involves many material, process, and equipment factors, including: method of heating (e.g., IR or vapor phase reflow, wave soldering, etc.) circuit board material, conductor thickness and 5 TEMPERATURE (C) This pattern uses four via holes, connecting the crossed ground strip pattern to the ground plane of the board. Peak Temperature Min. 240C Max. 255C 300 250 221 200 Reflow Time Min. 60 s Max. 90 s 150 Preheat 130- 170C Min. 60 s Max. 150 s 100 50 0 0 30 60 90 120 150 180 210 240 270 TIME (seconds) Figure 12. Surface Mount Assembly Temperature Profile. 300 330 360 MiniPak Outline Drawing 1.44 (0.057) 1.40 (0.055) 1.12 (0.044) 1.08 (0.043) 0.82 (0.032) 0.78 (0.031) 1.20 (0.047) 1.16 (0.046) 0.32 (0.013) 0.28 (0.011) 0.00 Top view 0.00 0.70 (0.028) 0.58 (0.023) Side view Dimensions are in millimeters (inches) 6 -0.07 (-0.003) -0.03 (-0.001) 0.92 (0.036) 0.88 (0.035) 0.42 (0.017) 0.38 (0.015) Bottom view 1.32 (0.052) 1.28 (0.050) -0.07 (-0.003) -0.03 (-0.001) Device Orientation REEL TOP VIEW END VIEW 4 mm CARRIER TAPE AA AA USER FEED DIRECTION AA AA 8 mm COVER TAPE Note: "AA" represents package marking code. Package marking is right side up with carrier tape perforations at top. Conforms to Electronic Industries RS-481, "Taping of Surface Mounted Components for Automated Placement." Standard quantity is 3,000 devices per reel. Tape Dimensions and Product Orientation For Outline 4T (MiniPak 1412) P P2 D P0 E F W C D1 t1 (CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS) K0 5 MAX. A0 DESCRIPTION 7 5 MAX. B0 SYMBOL SIZE (mm) SIZE (INCHES) CAVITY LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER A0 B0 K0 P D1 1.40 0.05 1.63 0.05 0.80 0.05 4.00 0.10 0.80 0.05 0.055 0.002 0.064 0.002 0.031 0.002 0.157 0.004 0.031 0.002 PERFORATION DIAMETER PITCH POSITION D P0 E 1.50 0.10 4.00 0.10 1.75 0.10 0.060 0.004 0.157 0.004 0.069 0.004 CARRIER TAPE WIDTH THICKNESS W t1 8.00 + 0.30 - 0.10 0.254 0.02 0.315 + 0.012 - 0.004 0.010 0.001 COVER TAPE WIDTH TAPE THICKNESS C Tt 5.40 0.10 0.062 0.001 0.213 0.004 0.002 0.00004 DISTANCE CAVITY TO PERFORATION (WIDTH DIRECTION) F 3.50 0.05 0.138 0.002 CAVITY TO PERFORATION (LENGTH DIRECTION) P2 2.00 0.05 0.079 0.002 For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright (c) 2006 Avago Technologies, Limited. All rights reserved. Obsoletes 5988-1551EN 5989-3628EN May 23, 2006