Datasheet Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire) BR24G32-3A General Description BR24G32-3A is a 32Kbit serial EEPROM of I2C BUS Interface Method Features All controls available by 2 ports of serial clock(SCL) and serial data(SDA) Other devices than EEPROM can be connected to the same port, saving microcontroller port 1.6V to 5.5V Single Power Source Operation most suitable for battery use 1MHz action is possible(1.7V to 5.5V) Up to 32 Byte in Page Write Mode Bit format 4K x 8bit Self-timed Programming Cycle Low Current Consumption Prevention of Write Mistake WP (Write Protect) Function added Prevention of Write Mistake at Low Voltage 1 million write cycles 40 years data retention Noise filter built in SCL / SDA terminal Initial delivery state FFh Packages W(Typ) x D(Typ) x H(Max) DIP-T8 TSSOP-B8 9.30mm x 6.50mm x 7.10mm 3.00mm x 6.40mm x 1.20mm SOP8 TSSOP-B8J 5.00mm x 6.20mm x 1.71mm 3.00mm x 4.90mm x 1.10mm SOP-J8 MSOP8 4.90mm x 6.00mm x 1.65mm 2.90mm x 4.00mm x 0.90mm SSOP-B8 VSON008X2030 3.00mm x 6.40mm x 1.35mm 2.00mm x 3.00mm x 0.60mm VMMP008Z1830 1.85mm x 3.00mm x 0.40mm Figure 1. Product structure : Silicon monolithic integrated circuit This product has no designed protection against radioactive rays www.rohm.com TSZ02201-0R2R0G100050-1-2 (c)2012 ROHM Co., Ltd. All rights reserved. 1/35 19.Nov.2018 Rev.009 TSZ22111 * 14 * 001 BR24G32-3A Absolute Maximum Ratings (Ta=25C) Parameter Supply Voltage Symbol Rating Unit VCC -0.3 to +6.5 V Remark 0.45 (SOP8) Derate by 4.5mW/C when operating above Ta=25C 0.45 (SOP-J8) Derate by 4.5mW/C when operating above Ta=25C 0.30 (SSOP-B8) Derate by 3.0mW/C when operating above Ta=25C 0.33 (TSSOP-B8) Permissible Dissipation Pd Derate by 3.3mW/C when operating above Ta=25C 0.31 (TSSOP-B8J) W Derate by 3.1mW/C when operating above Ta=25C 0.31 (MSOP8) Derate by 3.1mW/C when operating above Ta=25C 0.30 (VSON008X2030) Derate by 3.0mW/C when operating above Ta=25C 0.80 (DIP-T8) Derate by 8.0mW/C when operating above Ta=25C 0.21 (VMMP008Z1830) Derate by 2.1mW/C when operating above Ta=25C Storage Temperature Tstg -65 to +150 C Operating Temperature Topr -40 to +85 C - -0.3 to VCC+1.0 V Tjmax 150 C VESD -4000 to +4000 V Input Voltage / Output Voltage Junction Temperature Electrostatic discharge voltage (human body model) The Max value of Input Voltage/Output Voltage is not over 6.5V. When the pulse width is 50ns or less, the Min value of Input Voltage/Output Voltage is -1.0V. Junction temperature at the storage condition Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Memory Cell Characteristics (Ta=25C, VCC=1.6V to 5.5V) Parameter (Note1) Write Cycles Data Retention (Note1) Limit Typ - Min 1,000,000 40 Max - Unit Times Years (Note1) Not 100% TESTED Recommended Operating Ratings Parameter Power Source Voltage Input Voltage Symbol VCC VIN Rating 1.6 to 5.5 0 to VCC Unit V DC Characteristics (Unless otherwise specified, Ta=-40C to +85C, VCC =1.6V to 5.5V) Parameter Input High Voltage 1 Symbol VIH1 Input Low Voltage 1 VIL1 Input High Voltage 2 VIH2 Limit Unit Conditions Min Typ Max 0.7VCC - VCC+1.0 V 1.7VVCC5.5V - +0.3VCC V 1.7VVCC5.5V - VCC+1.0 V 1.6VVCC<1.7V (Note1) - +0.2VCC V 1.6VVCC<1.7V - - 0.4 V IOL=3.0mA, 2.5VVCC5.5V (SDA) -0.3 (Note1) 0.8VCC Input Low Voltage 2 VIL2 Output Low Voltage 1 VOL1 -0.3 Output Low Voltage 2 VOL2 - - 0.2 V IOL=0.7mA, 1.6VVCC<2.5V (SDA) Input Leakage Current ILI -1 - +1 A VIN=0 to VCC Output Leakage Current ILO -1 - +1 A Supply Current (Write) ICC1 - - 2.0 Supply Current (Read) ICC2 - - 2.0 Standby Current ISB - - 2.0 VOUT=0 to VCC (SDA) VCC=5.5V,fSCL=1MHz, tWR=5ms, Byte write, Page write VCC=5.5V,fSCL=1MHz Random read, current read, sequential read VCC=5.5V, SDA, SCL=VCC A0, A1, A2=GND,WP=GND mA A (Note1) When the pulse width is 50ns or less, it is -1.0V. www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 2/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A AC Characteristics (Unless otherwise specified, Ta=-40C to +85C) Parameter Limits (1.6VVCC5.5V) Min Typ Max Symbol Limits (1.7VVCC5.5V) Min Typ Max Unit Clock Frequency fSCL - - 400 - - 1000 kHz Data Clock High Period tHIGH 0.6 - - 0.30 - - s tLOW 1.2 - - 0.5 - - s tR - - 1 - - 0.12 s tF1 - - 1 - - 0.12 s Data Clock Low Period SDA, SCL (INPUT) Rise Time (Note1) SDA, SCL (INPUT) Fall Time (Note1) SDA (OUTPUT) Fall Time (Note1) tF2 - - 0.3 - - 0.12 s Start Condition Hold Time tHD:STA 0.6 - - 0.25 - - s Start Condition Setup Time tSU:STA 0.6 - - 0.20 - - s Input Data Hold Time tHD:DAT 0 - - 0 - - ns Input Data Setup Time tSU:DAT 100 - - 50 - - ns 0.05 - 0.45 s 0.05 - - s - s (Note2) Output Data Delay Time tPD Output Data Hold Time tDH Stop Condition Setup Time 0.1 - 0.9 0.05(Note3) - 0.9 0.1(Note2) - - - - 0.25 - (Note3) 0.05 tSU:STO 0.6 - Bus Free Time tBUF 1.2 - - 0.5 - - s Write Cycle Time tWR - - 5 - - 5 ms tI - - 0.05 - - 0.05 s WP Hold Time tHD:WP 1.0 - - 1.0 - - s WP Setup Time tSU:WP 0.1 - - 0.1 - - s WP High Period tHIGH:WP 1.0 - - 1.0 - - s Noise Spike Width (SDA, SCL) (Note1) Not 100% tested (Note2) At 1.6VVCC<1.7V (Note3) At 1.7VVCC5.5V AC Characteristics Condition Parameter Symbol Conditions Unit Load Capacitance CL 100 pF SDA, SCL (INPUT) Rise Time tR 20 ns SDA, SCL (INPUT) Fall Time tF1 20 ns VIL/VIH 0.2VCC/0.8VCC V - 0.3VCC/0.7VCC V Input Data Level Input/Output Data Timing Reference Level www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 3/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Serial Input / Output Timing tR 70% 70% 70% 70% SCL tHIGH tF1 30% 30% 70% 30% 30% tHD:STA tSU:DAT 70% 70% 70% SDA (input) tHD:DAT tLOW 70% 30% 30% tDH tPD tBUF SDA (output) 70% 70% 30% 30% 30% tF2 Input read at the rise edge of SCL Data output in sync with the fall of SCL Figure 2-(a). Serial Input / Output Timing SCL 70% 70% 70% tSU:STA tSU:STO tHD:STA 70% SDA 30% 30% STOP condition START condition Figure 2-(b). Start-Stop Bit Timing SCL 70% 70% D0 SDA ACK write data tWR (n-th address) START condition STOP condition Figure 2-(c). Write Cycle Timing DATA(n) SCL 70% DATA(1) ACK SDA 70% tWR WP 70% 30% tHD:WP tSU:WP STOP condition Figure 2-(d). WP Timing at Write Execution SCL DATA(n) DATA(1) SDA D1 D0 ACK ACK tWR tHIGH:WP 70% WP 70% 70% Figure 2-(e). WP Timing at Write Cancel www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 4/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Block Diagram A0 1 32Kbit EEPROM array 8 VCC 7 WP 6 SCL 8bit A1 2 Address Decoder Word 12bit START A2 3 Address Data Register Register STOP Control Circuit ACK GND 4 Power Source Voltage Detection High Voltage Generating Circuit 5 SDA Figure 3. Block Diagram Pin Configuration (TOP VIEW) A0 1 8 VCC A1 2 7 WP 1 1 1 1 BR24G32-3A A2 3 6 SCL GND 4 5 SDA 1 1 1 1 Pin Descriptions Terminal Name Input/ Output A0 Input Slave address setting(Note1) A1 Input Slave address setting(Note1) A2 Input Slave address setting(Note1) GND - SDA Input/ output Serial data input serial data output SCL Input Serial clock input WP Input Write protect terminal VCC - Descriptions Reference voltage of all input / output, 0V Connect the power source. (Note1) A0,A1 and A2 are not allowed to use as open. www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 5/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Typical Performance Curves 6 6 Ta=-40C Ta= 25C Ta= 85C 4 3 SPEC 2 4 3 2 1 1 SPEC 0 0 0 1 2 3 4 5 0 6 1 2 3 4 5 6 Supply Voltage: Vcc(v) Supply Voltage: Vcc(v) Figure 4. Input High Voltage1,2 vs Supply Voltage (A0, A1, A2, SCL, SDA, WP) Figure 5. Input Low Voltage1,2 vs Supply Voltage (A0, A1, A2, SCL, SDA, WP) 1 1 Ta=-40 Ta= 25 Ta= 85 0.8 Output Low Voltage : VOL2(V) Output Low Voltage : VOL1(V) Ta=-40C Ta= 25C Ta= 85C 5 Input Low Voltage : VIL1,2(V) Input High Voltage : VIH1,2(V) 5 0.6 SPEC 0.4 0.2 0 Ta=-40 Ta= 25 0.8 Ta= 85 0.6 0.4 SPEC 0.2 0 0 1 2 3 4 5 6 0 Output Low Current : IOL(mA) 2 3 4 5 6 Output Low Current : IOL(mA) Figure 7. Output Low Voltage2 vs Output Low Current (VCC=1.6V) Figure 6. Output Low Voltage1 vs Output Low Current (VCC=2.5V) www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 1 6/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Typical Performance CurvesContinued 1.2 SPEC 1 Output Leakage Current : ILO(A) Input Leakage Current : I LI (A) 1.2 Ta=-40 Ta= 25 Ta= 85 0.8 0.6 0.4 0.2 0 SPEC 1 0.8 Ta=-40 Ta= 25 Ta= 85 0.6 0.4 0.2 0 0 1 2 3 4 5 6 0 1 Input Voltage : VIN(V) 3 4 5 6 Output Voltage : VOUT(V) Figure 8. Input Leakage Current vs Supply Voltage (A0,A1,A2,SCL,WP) Figure 9. Output Leakage Current vs Supply Voltage (SDA) 2.5 3 2.5 Supply Current (Read) : ICC2(mA) Ta=-40 Ta= 25 Supply Current (Write) : Icc1(mA) 2 Ta= 85 SPEC 2 1.5 1 0.5 0 SPEC 2 Ta=-40 Ta= 25 Ta= 85 1.5 1 0.5 0 0 1 2 3 4 5 6 0 Supply Voltage : Vcc(V) 2 3 4 5 6 Supply Voltage : Vcc(V) Figure 11. Supply Current (Read) vs Supply Voltage (fSCL=1MHz) Figure 10. Supply Current (Write) vs Supply Voltage (fSCL=1MHz) www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 1 7/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Typical Performance CurvesContinued 2.5 10000 SPEC Clock Frequency : fSCL(kHz) Standby Current : I SB (A) 2 Ta=-40 Ta= 25 Ta= 85 1.5 1 0.5 1000 SPEC 100 Ta=-40 Ta= 25 Ta= 85 10 1 0 0.1 0 1 2 3 4 5 6 0 1 2 3 4 5 6 Supply Voltage : Vcc(V) Supply Voltage : Vcc(V) Figure 12. Standby Current vs Supply Voltage Figure 13. Clock Frequency vs Supply Voltage 0.6 0.4 Data Clock Low Period : t LOW (s) Data Clock High Period : tHIGH(s) SPEC SPEC 0.3 Ta=-40 Ta= 25 Ta= 85 0.2 0.1 0.5 Ta=-40 Ta= 25 Ta= 85 0.4 0.3 0.2 0.1 0 0 0 1 2 3 4 5 0 6 2 3 4 5 6 Supply Voltage : Vcc(V) Supply Voltage : Vcc(V) Figure 14. Data Clock High Period vs Supply Voltage www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 1 8/35 Figure 15. Data Clock Low Period vs Supply Voltage TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Typical Performance CurvesContinued 0.14 0.3 Start Condition Hold Time : t HD:STA(s) SDA (OUTPUT) Fall Time : t F2(s) SPEC 0.12 0.1 Ta=-40 Ta= 25 Ta= 85 0.08 0.06 0.04 0.02 SPEC 0.25 0.2 Ta=-40 Ta= 25 Ta= 85 0.15 0.1 0.05 0 0 0 1 2 3 4 5 6 0 1 Supply Voltage : Vcc(V) 4 5 6 Figure 17. Start Condition Hold Time vs Supply Voltage 0.3 50 Input Data Hold Time : t HD:DAT (ns) SU:STA(s) 3 Supply Voltage : Vcc(V) Figure 16. SDA (OUTPUT) Fall Time vs Supply Voltage START CONDITION SETUP TIME: t 2 0.25 SPEC 0.2 0.15 Ta=-40 Ta= 25 Ta= 85 0.1 0.05 0 SPEC 0 -50 Ta=-40 Ta= 25 Ta= 85 -100 -150 -0.05 0 1 2 3 4 5 0 6 1 2 3 4 5 6 SUPPLY VOLTAGE: Vcc(v) Supply Voltage: Vcc(V) Figure 18. Start Condition Setup Time vs Supply Voltage Figure 19. Input Data Hold Time vs Supply Voltage (HIGH) www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 9/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Typical Performance CurvesContinued 60 50 Input Data Setup Time : t SU:DAT(ns) Input Data Hold Time : t HD:DAT(ns) SPEC SPEC 0 -50 Ta=-40 Ta= 25 Ta= 85 -100 50 Ta=-40 Ta= 25 Ta= 85 40 30 20 10 0 -150 0 1 2 3 4 5 0 6 1 2 3 Figure 20. Input Data Hold Time vs Supply Voltage (LOW) 6 Figure 21. Input Data Setup Time vs Supply Voltage (HIGH) 60 0.5 SPEC SPEC 50 Output Data Delay Time : tPD(s) Input Data Setup Time : t SU:DAT(ns) 5 Supply Voltage : Vcc(V) Supply Voltage : Vcc(V) 40 Ta=-40 Ta= 25 Ta= 85 30 4 20 10 0.4 0.3 0.2 Ta=-40 Ta= 25 Ta= 85 0.1 SPEC 0 0 0 1 2 3 4 5 6 0 Supply Voltage : Vcc(V) 2 3 4 5 6 Supply Voltage : Vcc(V) Figure 23. Output Data Delay Time vs Supply Voltage (LOW) Figure 22. Input Data Setup Time vs Supply Voltage (LOW) www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 1 10/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Typical Performance CurvesContinued 0.3 SPEC Stop Condition Setup Time : t SU:STO(s) Output Data Delay Time : tPD(s) 0.5 0.4 0.3 0.2 Ta=-40 Ta= 25 Ta= 85 0.1 SPEC SPEC 0.25 0.2 0.15 0.1 Ta=-40 Ta= 25 Ta= 85 0.05 0 0 0 1 2 3 4 5 6 0 1 2 3 5 6 Supply Voltage : Vcc(V) Figure 24. Output Data Delay Time vs Supply Voltage (HIGH) Figure 25. Stop Condition Setup Time vs Supply Voltage 0.6 6 SPEC 0.5 SPEC 5 Write Cycle Time : tWR(ms) Bus Free Time : t BUF(s) 4 Supply Voltage : Vcc(V) 0.4 Ta=-40 Ta= 25 Ta= 85 0.3 0.2 0.1 4 3 2 Ta=-40 Ta= 25 Ta= 85 1 0 0 0 1 2 3 4 5 6 0 Supply Voltage : Vcc(V) 2 3 4 5 6 Supply Voltage : Vcc(V) Figure 26. Bus Free Time vs Supply Voltage www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 1 Figure 27. Write Cycle Time vs Supply Voltage 11/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Typical Performance CurvesContinued 0.3 Noise Spike Width(SCL LOW) : t I (s) Noise Spike Width(SCL HIGH) : t I (s) 0.3 0.25 Ta=-40 Ta= 25 Ta= 85 0.2 0.15 0.1 0.05 SPEC 0 Ta=-40 Ta= 25 Ta= 85 0.2 0.15 0.1 0.05 SPEC 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 Supply Voltage : Vcc(V) Supply Voltage : Vcc(V) Figure 28. Noise Spike Width vs Supply Voltage (SCL HIGH) Figure 29. Noise Spike Width vs Supply Voltage (SCL LOW) 0.3 Noise Spike WidthI(SDA LOW) : tI(s) 0.3 Noise Spike Width(SDA HIGH) : tI (s) 0.25 0.25 Ta=-40 Ta= 25 Ta= 85 0.2 0.15 0.1 0.05 SPEC 0.25 Ta=-40 Ta= 25 Ta= 85 0.2 0.15 0.1 0.05 SPEC 0 0 0 1 2 3 4 5 0 6 1 2 3 4 5 6 Supply Voltage : Vcc(V) Supply Voltage : Vcc(V) Figure 30. Noise Spike Width vs Supply Voltage (SDA HIGH) Figure 31. Noise Spike Width vs Supply Voltage (SDA LOW) www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 12/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Typical Performance CurvesContinued 1.2 0.2 SPEC SPEC WP Setup Time : t SU:WP(s) WP Hold Time : t HD:WP(s) 1 0.8 Ta=-40 Ta= 25 Ta= 85 0.6 0.4 0.2 0 0.1 Ta=-40 Ta= 25 Ta= 85 0 -0.1 -0.2 -0.3 0 1 2 3 4 5 6 0 1 2 3 4 5 Supply Voltage : Vcc(V) Supply Voltage : Vcc(V) Figure 32. WP Hold Time vs Supply Voltage Figure 33. WP Setup Time vs Supply Voltage 6 1.2 WP High Period : tHIGH:WP (s) SPEC 1 0.8 Ta=-40 Ta= 25 Ta= 85 0.6 0.4 0.2 0 0 1 2 3 4 5 6 Supply Voltage : Vcc(V) Figure 34. WP High Period vs Supply Voltage www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 13/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Timing Chart 1. I2C BUS Data Communication I2C BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long, and acknowledge is always required after each byte. I 2C BUS data communication with several devices is possible by connecting with 2 communication lines: serial data (SDA) and serial clock (SCL). Among the devices, there should be a "master" that generates clock and control communication start and end. The rest is "slave" which are controlled by an address peculiar to each device. EEPROM is a "slave". The device that outputs data to the bus during data communication is called "transmitter", and the device that receives data is called "receiver". SDA 1-7 SCL S START ADDRESS condition 2. 8 9 R/W ACK 1-7 8 DATA 1-7 9 ACK 8 DATA 9 ACK Figure 35. Data Transfer Timing P STOP condition Start Condition (Start Bit Recognition) (1) Before executing each command, start condition (start bit) that SDA goes from 'HIGH' down to 'LOW' when SCL is 'HIGH' is necessary. (2) This IC always detects whether SDA and SCL are in start condition (start bit) or not. Therefore, unless this condition is satisfied, any command cannot be executed. 3. Stop Condition (Stop Bit Recognition) (1) Each command can be ended by a stop condition (stop bit), namely, SDA goes from 'LOW' to 'HIGH' while SCL is 'HIGH'. 4. Acknowledge (ACK) Signal (1) This acknowledge (ACK) signal is a software rule to indicate whether or not data transfer was performed normally. In both master and slave communication, the device at the transmitter (sending) side releases the bus after outputting 8 bit data. When a slave address of a write command or a read command is input, microcontroller is the device at the transmitter side. When output the data of read command, this IC is the device at the transmitter side. (2) The device on the receiver (receiving) side sets SDA `LOW' during the 9th clock cycle, and outputs an ACK signal showing that the 8-bit data has been received. When a slave address of a write command or a read command is input, this IC is the device at the receiver side. When output the data of read command, microcontroller is the device at the receiver side. (3) This IC outputs ACK signal `LOW' after recognizing start condition and slave address (8 bit). (4) Each write operation outputs ACK signal `LOW' every 8 bit data (a word address and write data) reception. (5) During read operation, this IC outputs 8 bit data (read data) and detects the ACK signal `LOW'. When ACK signal is detected, and no stop condition is sent from the master (microcontroller) side, this IC continues to output data. If the ACK signal is not detected, this IC stops data transfer, recognizes the stop condition (stop bit), and ends the read operation. Then this IC is ready for another transmission. 5. Device Addressing (1) (2) (3) (4) Slave address comes after start condition from master. The significant 4 bits of slave address are used for recognizing a device type. The device code of this IC is fixed to '1010'. Next slave addresses (A2 A1 A0 --- device address) are for selecting devices, and plural ones can be used on a same bus according to the number of device addresses. It is possible to select and operate only EEPROM that has matched `HIGH' `LOW' input conditions of the A0, A1, A2 pin and the `HIGH' `LOW' input conditions of slave address sent from the master. (5) The most insignificant bit (R/W --- READ/WRITE) of slave address is used for designating write or read operation, and is as shown below. Setting R / Setting R / W W to 0 ------- write (setting 0 to word address setting of random read) to 1 ------- read Type BR24G32-3A www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 Maximum number of Connected buses Slave address 1 0 1 0 A2 A1 A0 14/35 R/ W 8 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Write Command 1. Write Cycle (1) Arbitrary data can be written to EEPROM. When writing only 1 byte, Byte Write is normally used, and when writing continuous data of 2 Bytes or more, simultaneous write is possible by Page Write cycle. Up to 32 arbitrary Bytes can be written. S T A R T SDA LINE W R I T E SLAVE ADDRESS 1st WORD ADDRESS 2nd WORD ADDRESS DATA *1 WA12 to WA15 is don't care. WAWAWA WAWA 15 14 13 12 11 1 0 1 0 A2 A1 A0 R A / C W K *1 S T O P WA 0 A C K D7 D0 A C K A C K Figure 36. Byte Write Cycle S T A R T SDA LINE SLAVE ADDRESS 1 0 1 0 0 W R I T E A2 A1 A0 1st WORD ADDRESS(n) 2nd WORD ADDRESS(n) DATA(n) WAWA WAWA WA WA 15 14 13 12 11 0 D7 DATA(n+31) D0 *1 A C K A C K *1 WA12 to WA15 is don't care. D0 0 R A / C W K S T O P A C K A C K Figure 37. Page Write Cycle (2) (3) (4) (5) (6) During internal write execution, all input commands are ignored, therefore ACK is not returned. Data is written to the address designated by word address (n-th address) By issuing stop bit after 8bit data input, internal write to memory cell starts. When internal write is started, command is not accepted for tWR (5ms at maximum). Using Page Write, it is possible to write one lump sum up to 32 bytes. When data with the maximum number of bytes + 1 byte or more is sent, the bytes in excess overwrite from the first byte. (Refer to "Internal Address Increment"). (7) As for page write cycle of BR24G32-3A, after the 7 significant bits of word address are designated arbitrarily, data up to 32 bytes can be written. Because keep inputting data 2 bytes or more, the value of 5 least significant bits in the address is incremented internally. www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 15/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A 2. Notes on Write Cycle Continuous Input The maximum page numbers of BR24G32-3A are 32 Bytes. Any bytes below these can be written. 1 page = 32 Bytes, but the page write cycle time is 5ms at maximum for 32 Byte bulk write. It does not stand 5ms at maximum x 32 Byte=160ms (Max) 3. Internal Address Increment Page write mode 1Eh 0 0 0 WA7 WA6 WA5 WA4 WA3 WA2 WA1 WA0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 0 Increment For example, when it is started from address 1Eh, then, increment is made as below, 1Eh1Fh00h01h***. Please take note. *1Eh***1E in hexadecimal, therefore, 00011110 is a Significant bit is fixed. No digit up binary number. 4. Write Protect (WP) Terminal Write Protect (WP) Function When WP terminal is set at VCC (H level), data rewrite of all addresses is prohibited. When it is set GND (L level), data rewrite of all address is enabled. Be sure to connect this terminal to VCC or GND, or control it to H level or L level. Do not leave it open. In case of using it as ROM, it is recommended to connect it to pull up or VCC. At extremely low voltage at power ON/OFF, by setting the WP terminal `H', write error can be prevented. www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 16/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Read Command 1. Read Cycle Read cycle is when data of EEPROM is read. Read cycle could be random read cycle or current read cycle. Random read cycle is a command to read data by designating a specific address, and is used generally. Current read cycle is a command to read data of internal address register without designating an address, and is used when to verify just after write cycle. In both the read cycles, sequential read cycle is available and the next address data can be read in succession. S T A R T SDA LINE SLAVE ADDRESS W R I T E 0 R A / C W K S T A R T 2nd WORD ADDRESS A C K *1 R E A D SLAVE ADDRESS S T O P DATA(n) *1 WA12 to WA15 is don't care. WA 0 WAWA WAWAWA 15 14 13 12 11 1 0 1 0 A2A1A0 0 1st WORD ADDRESS 1 0 1 0 A2 A1A0 A C K 0 0 D7 D0 R A / C W K A C K Figure 38. Random Read cycle S T A R T SDA LINE R E A D SLAVE ADDRESS DATA(n) 1 0 1 0 A2A1A0 0 S T O P D7 D0 A C K R A / C WK Figure 39. Current Read Cycle S T A R T SDA LINE SLAVE ADDRESS R E A D 1 0 1 0 A2 A1A0 0 0 DATA(n) D7 R A / C W K S T O P DATA(n+x) D0 D7 A C K A C K D0 A C K Figure 40. Sequential Read Cycle (in the case of Current Read Cycle) (1) In random read cycle, data of designated word address can be read. (2) When the command just before current read cycle is random read cycle or current read cycle (each including sequential read cycle), data of incremented last read address (n)-th, i.e., data of the (n+1)-th address is output. (3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (-COM) side, the next address data can be read in succession. (4) Read is ended by stop condition that `H' is input to ACK signal after D0 and SDA signal goes from `L' to `H' while at SCL signal is `H'. (5) When `L' is input at ACK signal after D0 without `H' input, sequential read gets in, and the next data is output. Therefore, read command cycle cannot be ended. To end read command cycle, be sure to input 'H' to ACK signal after D0, and the stop condition that SDA goes from `L' to `H' while SCL signal is 'H'. (6) Sequential read is ended by stop condition that 'H' is input to ACK signal after arbitrary D0 and SDA is asserted from `L' to `H' while SCL signal is 'H'. www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 17/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Software Reset Software reset is executed to avoid malfunction after power ON, or when it is necessary to reset during command input. Software reset has several kinds, and 3 kinds of them are shown in the figure below. (Refer to Figure 41-(a), Figure 41-(b), Figure 41-(c).) Within the dummy clock input area, the SDA bus is released ('H' by pull up) and ACK output and read data '0' (both 'L' level) may be output from EEPROM. Therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to instantaneous power failure of system power source or influence upon devices. Dummy clockx14 SCL 1 2 Startx2 13 Normal command 14 SDA Normal command Figure 41-(a). The case of dummy clock x 14 +START+START+ command input SCL Start Dummy clockx9 Start 1 2 8 Normal command 9 SDA Normal command Figure 41-(b). The case of START + dummy clock x 9 +START+ command input Startx9 SCL 1 2 7 3 8 Normal command 9 SDA Normal command Figure 41-(c). STARTx9+ command input *Start normal command from START input. Acknowledge Polling During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic write execution after write cycle input, next command (slave address) is sent. If the first ACK signal sends back 'L', then it means end of write operation, else 'H' is returned, which means writing is still in progress. By the use of acknowledge polling, next command can be executed without waiting for tWR = 5ms. To write continuously, send the slave address of R/W=0, and to carry out current read cycle after write, send the slave address of R/W=1. If ACK signal sends back 'L', execute word address input and data output and so forth. During internal write, ACK = HIGH is returned. First write command S T A R T Write command S T O P S T Slave A R address T A C K H tWR S T Slave A R address T A C K H *** Second write command *** S T Slave A R address T A C K H S T Slave A R address T A C K L Word address A C K L Data A C K L S T O P tWR After completion of internal write, ACK=LOW is returned, so input next word address and data in succession. Figure 42. Case of Continuous Write by Acknowledge Polling www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 18/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A WP Valid Timing (Write Cancel) WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so on, pay attention to the following WP valid timing. During write cycle execution, inside cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte write cycle and page write cycle, the area from the first start condition of command before the rise of clock to take in D0 of data(in page write cycle, the first byte data) is the cancel invalid area. WP input in this area is `Don't care'. The area from the rise of SCL to take in D0 to the stop condition input is the cancel valid area. Furthermore, after the execution of forced end by WP, the IC enters standby status. *Rise of SDA *Rise of D0 taken clock SCL SCL SDA D1 D0 SDA ACK Enlarged view SDA S T Slave A R address T A C Word K address L ACK D0 Enlarged view A C D7 D6 D5 D4 D3 D2 D1 D0 K L WP cancel invalid area A C K L Data A C K L S T O P WP cancel valid area tWR WP cancel invalid area WP Data is not written. Figure 43. WP Valid Timing Command Cancel by Start Condition and Stop Condition During command input, by continuously inputting start condition and stop condition, command can be cancelled. (Figure 44.) However, within ACK output area and during data read, SDA bus may output 'L'. In this case, start condition and stop condition cannot be input, so reset is not available. Therefore, execute software reset. When command is cancelled by start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not determined. Therefore, it is not possible to carry out current read cycle in succession. To carry out read cycle in succession, carry out random read cycle. SCL SDA 1 0 1 0 Start condition Stop condition Figure 44. Case of cancel by start, stop condition during slave address input www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 19/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A I/O Peripheral Circuit 1. Pull-up Resistance of SDA Terminal SDA is NMOS open drain, so it requires a pull up resistor. As for this resistor value (RPU), select an appropriate value from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, operating frequency is limited. The smaller the RPU, the larger is the supply current. 2. Maximum value of RPU The maximum value of RPU is determined by the following factors. (1) SDA rise time determined by the capacitance (CBUS) of bus line of SDA and RPU should be tR or lower. Furthermore, AC timing should be satisfied even when SDA rise time is slow. (2) The bus's electric potential A determined by input leak current total (IL) of the device connected to the bus with output of 'H' to SDA line and RPU should sufficiently secure the input 'H' level (VIH) of microcontroller and EEPROM including recommended noise margin of 0.2VCC. VCC - ILRPU -0.2 VCC VIH 0.8VCC -VIH RPU IL Microcontroller BR24GXX RPU Ex.) VCC =3V IL=10A VIH=0.7 VCC From (2) SDA terminal A 0.8 3 -0.7 3 RPU 10 10 -6 30 [ k ] IL IL Bus line capacity CBUS 3. Minimum value of RPU The minimum value of RPU is determined by the following factors. (1) When IC outputs LOW, it should be satisfied that VOLMAX=0.4V and IOLMAX=3mA. Figure 45. I/O Circuit Diagram VCC -VOL IOL RPU VCC -VOL RPU IOL (2) VOLMAX=0.4V should secure the input 'L' level (VIL) of microcontroller and EEPROM including recommended noise margin 0.1VCC. VOLMAX VIL-0.1 VCC Ex.) VCC =3V, VOL=0.4V, IOL=3mA, microcontroller, EEPROM VIL=0.3VCC From (1) RPU 3 - 0.4 3x10 -3 867 [] And VOL=0.4 [V] VIL=0.3x3 =0.9 [V] Therefore, the condition (2) is satisfied. 4. Pull-up Resistance of SCL Terminal When SCL control is made at the CMOS output port, there is no need for a pull up resistor. But when there is a time that SCL becomes 'Hi-Z', add a pull up resistor. As for the pull up resistor value, one of several k to several ten k is recommended in consideration of drive performance of output port of microcontroller. www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 20/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Cautions on Microcontroller Connection 1. RS In I2C BUS, it is recommended that SDA port is of open drain input/output. However, when using CMOS input / output of tri state to SDA port, insert a series resistance RS between the pull up resistor RPU and the SDA terminal of EEPROM. This is to control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON simultaneously. RS also plays the role of protecting the SDA terminal against surge. Therefore, even when SDA port is open drain input/output, RS can be used. ACK SCL RPU RS SDA 'H' output of microcontroller 'L' output of EEPROM Over current flows to SDA line by 'H' output of microcontroller and 'L' output of EEPROM. EEPROM Microcontroller Figure 46. I/O Circuit Diagram Figure 47. Input / Output Collision Timing 2. Maximum value of Rs The maximum value of Rs is determined by the following relations. (1) SDA rise time determined by the capacitance (CBUS) of bus line of SDA and RPU should be tR or lower. Furthermore, AC timing should be satisfied even when SDA rise time is slow. (2) The bus's electric potential A determined by Rpu and Rs the moment when EEPROM outputs 'L' to SDA bus should sufficiently secure the input 'L' level (VIL) of microcontroller including recommended noise margin of 0.1VCC. (VCC - VOL )xR S RPU +R S VCC RPU RS V OL +0.1V CC V IL + A VOL VIL - VOL - 0.1V CC 1.1V CC -VIL RS x R PU IOL Ex. ) VCC =3V VIL =0.3V CC Bus line capacity CBUS VIL Micro controller RS EEPROM Figure 48. I/O Circuit Diagram VOL =0.4V RPU =20k 0.3x3 - 0.4 - 0.1x3 1.1x3 - 0.3x3 1.67 k x 20x10 3 3. Minimum value of Rs The minimum value of Rs is determined by over current at bus collision. When over current flows, noises in power source line and instantaneous power failure of power source may occur. When allowable over current is defined as I, the following relation must be satisfied. Determine the allowable current in consideration of the impedance of power source line in set and so forth. Set the over current to EEPROM at 10mA or lower. V CC I RS RPU 'L'output RS Over current I RS VCC I Ex.) VCC=3V, I=10mA 'H' output RS Microcontroller EEPROM 3 10x10 -3 300 [] Figure 49. I/O Circuit Diagram www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 21/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A I/O Equivalence Circuit 1. Input (A0, A1, A2, SCL, WP) 2. Input / Output (SDA) Figure 51. Input / Output Pin Circuit Diagram Figure 50. Input Pin Circuit Diagram Power-Up/Down Conditions At power on, the IC's internal circuits may go through unstable low voltage area as the VCC rises, making the IC's internal logic circuit not completely reset, hence, malfunction may occur. To prevent this, the IC is equipped with POR circuit and LVCC circuit. To assure the operation, observe the following conditions at power ON. 1. 2. Set SDA = 'H' and SCL ='L' or 'H' Start power source to satisfy the recommended conditions of t R, tOFF, and Vbot for operating POR circuit. tR Recommended conditions of tR, tOFF,Vbot tR tOFF Vbot VCC 10ms or below 10ms or larger 0.3V or below tOFF Vbot 100ms or below 10ms or larger 0.2V or below 0 Figure 52. Rise Waveform Diagram 3. Set SDA and SCL to avoid being 'Hi-Z'. When the above conditions 1 and 2 cannot be observed, take the following countermeasures. (1) In the case when the above condition 1 cannot be observed such that SDA becomes 'L' at power ON. Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'. VCC VCC tLOW SCL SCL SDA SDA After Vcc becomes stable After Vcc becomes stable tDH Figure 53. When tSU:DAT SCL= 'H' and SDA= 'L' tSU:DAT Figure 54. When SCL='L' and SDA='L' (2) In the case when the above condition 2 cannot be observed. After power source becomes stable, execute software reset(Page 18). (3) In the case when the above conditions 1 and 2 cannot be observed. Carry out (1), and then carry out (2). Low Voltage Malfunction Prevention Function LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ=1.2V) or below, data rewrite is prevented. Noise Countermeasures 1. Bypass Capacitor When noise or surge gets in the power source line, malfunction may occur, therefore, it is recommended to connect a bypass capacitor (0.1F) between the IC's VCC and GND pins. Connect the capacitor as close to the IC as possible. In addition, it is also recommended to connect a bypass capacitor between board's VCC and GND. www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 22/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC's power supply pins. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. Ground Voltage Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. Ground Wiring Pattern When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance. 5. Thermal Consideration Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the maximum junction temperature rating. 6. Recommended Operating Conditions These conditions represent a range within which the expected characteristics of the IC can be approximately obtained. The electrical characteristics are guaranteed under the conditions of each parameter. 7. Inrush Current When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. Operation Under Strong Electromagnetic Field Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction. 9. Testing on Application Boards When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC's power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 10. Inter-pin Short and Mounting Errors Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. 11. Unused Input Pins Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply or ground line. 12. Regarding the Input Pin of the IC In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages within the values specified in the electrical characteristics of this IC. www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 23/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Part Numbering B R 2 4 G 3 2 x x x - 3 A x x x x x BUS Type 24 : I2C Operating Temperature/ Operating Voltage -40C to +85C / 1.6V to 5.5V Capacity 32=32Kbit Package Blank : DIP-T8 F : SOP8 FV : SSOP-B8 FVJ : TSSOP-B8J NUX : VSON008X2030 FJ FVT FVM QUZ : SOP-J8 : TSSOP-B8 : MSOP8 : VMMP008Z1830 Process code Revision Blank : DIP-T8, SOP8, SOP-J8, SSOP-B8, TSSOP-B8, TSSOP-B8J, MSOP8, VSON008X2030, VMMP008Z1830 G : Halogen free Blank : Not Halogen free As an exception, VSON008X2030, VMMP008Z1830 package will be Halogen free with "Blank" T : 100% Sn Blank : 100% Sn As an exception, VMMP008Z1830 will be coated by Ni/Pd/Au Packaging and forming specification E2 : Embossed tape and reel (SOP8, SOP-J8, SSOP-B8, TSSOP-B8, TSSOP-B8J) TR : Embossed tape and reel (MSOP8, VSON008X2030, VMMP008Z1830) None : Tube (DIP-T8) Lineup Package Capacity 32Kbit Type Quantity Orderable Part Number Remark DIP-T8 Tube of 2000 BR24G32 -3A Not Halogen free 100% Sn SOP8 Reel of 2500 BR24G32F -3AGTE2 Halogen free 100% Sn SOP-J8 Reel of 2500 BR24G32FJ -3AGTE2 Halogen free 100% Sn SSOP-B8 Reel of 2500 BR24G32FV -3AGTE2 Halogen free 100% Sn TSSOP-B8 Reel of 3000 BR24G32FVT -3AGE2 Halogen free 100% Sn TSSOP-B8J Reel of 2500 BR24G32FVJ -3AGTE2 Halogen free 100% Sn MSOP8 Reel of 3000 BR24G32FVM -3AGTTR Halogen free 100% Sn VSON008X2030 Reel of 4000 BR24G32NUX -3ATTR Halogen free 100% Sn VMMP008Z1830 Reel of 4000 BR24G32QUZ -3ATR Halogen free Ni/Pd/Au www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 24/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Physical Dimension, Tape and Reel Information Package Name www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 DIP-T8 25/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Physical Dimension, Tape and Reel Information Package Name SOP8 (Max 5.35 (include.BURR)) (UNIT : mm) PKG : SOP8 Drawing No. : EX112-5001-1 www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 26/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Physical Dimension, Tape and Reel Information Package Name www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 SOP-J8 27/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Physical Dimension, Tape and Reel Information Package Name www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 SSOP-B8 28/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Physical Dimension, Tape and Reel Information Package Name www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 TSSOP-B8 29/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Physical Dimension, Tape and Reel Information Package Name www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 TSSOP-B8J 30/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Physical Dimension, Tape and Reel Information Package Name www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 MSOP8 31/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Physical Dimension Tape and Reel Information Package Name www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 VSON008X2030 32/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Physical Dimension, Tape and Reel Information Package Name www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 VMMP008Z1830 33/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A Marking Diagrams (TOP VIEW) DIP-T8 (TOP VIEW) SOP8(TOP VIEW) Part Number Marking BR24G32A Part Number Marking 4 G 3 2 A LOT Number LOT Number 1PIN MARK SSOP-B8(TOP VIEW) SOP-J8(TOP VIEW) Part Number Marking Part Number Marking 4 G FA 4 G 3 2 A LOT Number LOT Number 1PIN MARK 1PIN MARK TSSOP-B8(TOP VIEW) MSOP8(TOP VIEW) Part Number Marking Part Number Marking A G F 3 4 G 3 2 A 4 LOT Number LOT Number 1PIN MARK 1PIN MARK VSON008X2030 (TOP VIEW) TSSOP-B8J(TOP VIEW) Part Number Marking 4G3 4G3 LOT Number 2 A 3 LOT Number 2 A 3 1PIN MARK www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 Part Number Marking 1PIN MARK 34/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 BR24G32-3A VMMP008Z1830 (TOP VIEW) Part Number Marking 4G3 LOT Number 2 A 3 1PIN MARK Revision History Date 15.May.2012 25.Feb.2013 29.Mar.2013 1.May.2013 Revision 001 002 003 004 27.Aug.2014 005 27.Oct.2014 006 18.May.2016 007 31.Aug.2016 008 19.Nov.2018 009 www.rohm.com (c)2012 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 Changes New Release Update some English words, sentences' descriptions, grammar and formatting. P.5 - Add directions in Pin Descriptions P.2- Add VESD in Absolute Maximum Ratings P.1 Change format of package line-up table. P.3 Modified tSU:STA (0.25->0.20) P.24 Update Part Numbering. Add Lineup Table Add SOP-J8M,TSSOP-B8M Package P1.Add 32Kbit to a General Description P1.Add "Up to 32 Byte in Page Write Mode" P1.Add "Bit Format 4K x 8" P1. List of models deletion P2. Change the unit of Power Dissipation to "W" P22. Change the Operational Notes Change notice to Rev003 Update Japanese version Add VMMP008Z1830 package Add the range of supply voltage 1.6VVCC5.5V P.2 Add caution in absolute maximum ratings P.4/22 Add terminal names in Figure 2-(b) to (e) and Figure 54 P.6-13 Change title of figure to adjust the name of DC/AC characteristics P.9 Change Figure18 P.25 Update Physical Dimension of DIP-T8 Remove the SOP-J8M package Remove the TSSOP-B8M package P.15(6) Modify the Write Cycle Change the fonts and format 35/35 TSZ02201-0R2R0G100050-1-2 19.Nov.2018 Rev.009 Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property ("Specific Applications"), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM's Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASS CLASSb CLASS CLASS CLASS CLASS 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM's Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used. However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice-PGA-E (c) 2015 ROHM Co., Ltd. All rights reserved. Rev.004 Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label A two-dimensional barcode printed on ROHM Products label is for ROHM's internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice-PGA-E (c) 2015 ROHM Co., Ltd. All rights reserved. Rev.004 Datasheet General Precaution 1. Before you use our Products, you are requested to carefully read this document and fully understand its contents. ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any ROHM's Products against warning, caution or note contained in this document. 2. All information contained in this document is current as of the issuing date and subject to change without any prior notice. Before purchasing or using ROHM's Products, please confirm the latest information with a ROHM sales representative. 3. The information contained in this document is provided on an "as is" basis and ROHM does not warrant that all information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or concerning such information. Notice - WE (c) 2015 ROHM Co., Ltd. All rights reserved. Rev.001