DC1041A-A - Linear Technology

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

12A µModule Regulators

with PLL, Output Tracking

and Margining

n Telecom and Networking Equipment

n Servers

n Industrial Equipment

n Point of Load Regulation

n Complete Switch Mode Power Supply

n Wide Input Voltage Range: 4.5V to 20V

n 12A DC Typical, 14A Peak Output Current

n 0.6V to 5V Output Voltage

n Output Voltage Tracking and Margining

n Parallel Multiple µModule Regulators for Current

Sharing

n Differential Remote Sensing for Precision

Regulation (LTM4601 Only)

n PLL Frequency Synchronization

n ±1.5% Regulation

n Current Foldback Protection (Disabled at Start-Up)

n SnPb or RoHS Compliant Finish

n UltraFast™ Transient Response

n Current Mode Control

n Up to 95% Efﬁciency at 5VIN, 3.3VOUT

n Programmable Soft-Start

n Output Overvoltage Protection

n Small Footprint, Low Proﬁle

(15mm × 15mm × 2.82mm) Surface Mount LGA and

(15mm × 15mm × 3.42mm) BGA Packages

1.5V/12A Power Supply with 4.5V to 20V Input

Efﬁciency and Power Loss

vs Load Current

The LT M

4601 is a complete 12A step-down switch mode

DC/DC power supply with onboard switching controller,

MOSFETs, inductor and all support components. The

µModule

regulator is housed in small surface mount

15mm × 15mm × 2.82mm LGA and 15mm × 15mm ×

3.42mm BGA packages. Operating over an input voltage

range of 4.5V to 20V, the LTM4601 supports an output

voltage range of 0.6V to 5V as well as output voltage

tracking and margining. The high efﬁciency design deliv-

ers 12A continuous current (14A peak). Only bulk input

and output capacitors are needed to complete the design.

The low proﬁle and light weight package easily mounts

in unused space on the back side of PC boards for high

density point of load regulation. The µModule regulator

can be synchronized with an external clock for reducing

undesirable frequency harmonics and allows PolyPhase

operation for high load currents.

A high switching frequency and adaptive on-time current

mode architecture deliver a very fast transient response

to line and load changes without sacriﬁcing stability. An

onboard differential remote sense ampliﬁer can be used

to accurately regulate an output voltage independent of

load current. The onboard remote sense ampliﬁer is not

available in the LTM4601-1.

L, LT, LTC, LTM, Linear Technology, the Linear logo, µModule and PolyPhase are registered

trademarks and UltraFast and LTpowerCAD are trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners. Protected by U.S. Patents

including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611, 6677210.

Typical applicaTion

FeaTures DescripTion

applicaTions

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

RUN

COMP

INTVCC

DRVCC

MPGM

TRACK/SSPLLIN

LTM4601

ON/OFF

392k RSET

40.2k

MARGIN

CONTROL COUT

4601 TA01a

VOUT

1.5V

12A

CLOCK SYNC

TRACK/SS CONTROL

100pF

CIN

VIN

fSETPGNDSGND

5% MARGIN

VIN

4.5V TO 20V

LOAD CURRENT (A)

EFFICIENCY (%)

POWER LOSS (W)

4601 TA01b

2 4 6 8 10 12 14

0.5

1.0

2.0

4.0

1.5

2.5

3.0

3.5

12VIN

5VIN

EFFICIENCY

POWER LOSS

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

INTVCC, DRVCC, VOUT_LCL, VOUT (VOUT ≤ 3.3V with

DIFFVOUT) .................................................... –0.3V to 6V

PLLIN, TRACK/SS, MPGM, MARG0, MARG1,

PGOOD, fSET ..............................–0.3V to INTVCC + 0.3V

RUN (Note 5) ............................................... –0.3V to 5V

VFB, COMP ................................................ –0.3V to 2.7V

(Note 1)

absoluTe MaxiMuM raTings

VIN ............................................................. –0.3V to 20V

VOSNS+, VOSNS– ..........................–0.3V to INTVCC + 0.3V

Operating Temperature Range (Note 2)....–40°C to 85°C

Junction Temperature ........................................... 125°C

Storage Temperature Range .................. –55°C to 125°C

Reﬂow (Peak Body) Temperature .......................... 245°C

MARG1

DRVCC

VFB

PGOOD

SGND

VOSNS+/NC2*

DIFFVOUT/NC3*

VOUT_LCL

VOSNS–/NC1*

VIN

PGND

VOUT

fSET

MARG0

RUN

COMP

MPGM

PLLIN

INTVCC

TRACK/SS

LGA PACKAGE

118-LEAD (15mm × 15mm × 2.82mm)

TOP VIEW

TJMAX = 125°C, θJA = 15°C/W, θJC = 6°C/W,

θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS

WEIGHT = 1.7g

*LTM4601-1 ONL

MARG1

DRVCC

VFB

PGOOD

SGND

VOSNS+/NC2*

DIFFVOUT/NC3*

VOUT_LCL

VOSNS–/NC1*

VIN

PGND

VOUT

fSET

MARG0

RUN

COMP

MPGM

PLLIN

INTVCC

TRACK/SS

BGA PACKAGE

118-LEAD (15mm × 15mm × 3.42mm)

TOP VIEW

TJMAX = 125°C, θJA = 15.5°C/W, θJC = 6.5°C/W,

θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS

WEIGHT = 1.9g

*LTM4601-1 ONL

pin conFiguraTion

orDer inForMaTion

PART NUMBER PAD OR BALL FINISH PART MARKING* PACKAGE

TYPE

MSL

RATING

TEMPERATURE RANGE

(Note 2)

DEVICE FINISH CODE

LTM4601EV#PBF Au (RoHS) LTM4601V e4 LGA 3 –40°C to 85°C

LTM4601IV#PBF Au (RoHS) LTM4601V e4 LGA 3 –40°C to 85°C

LTM4601EV-1#PBF Au (RoHS) LTM4601V-1 e4 LGA 3 –40°C to 85°C

LTM4601IV-1#PBF Au (RoHS) LTM4601V-1 e4 LGA 3 –40°C to 85°C

LTM4601EY#PBF SAC305 (RoHS) LTM4601Y e1 BGA 3 –40°C to 85°C

LTM4601IY#PBF SAC305 (RoHS) LTM4601Y e1 BGA 3 –40°C to 85°C

LTM4601EY-1#PBF SAC305 (RoHS) LTM4601Y-1 e1 BGA 3 –40°C to 85°C

LTM4601IY-1#PBF SAC305 (RoHS) LTM4601Y-1 e1 BGA 3 –40°C to 85°C

LTM4601IY SnPb (63/37) LTM4601Y e0 BGA 3 –40°C to 85°C

LTM4601IY-1 SnPb (63/37) LTM4601Y-1 e0 BGA 3 –40°C to 85°C

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

elecTrical characTerisTics

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VIN(DC) Input DC Voltage l4.5 20 V

VOUT(DC) Output Voltage CIN = 10µF ×3, COUT = 200µF, RSET = 40.2k

VIN = 5V, VOUT = 1.5V, IOUT = 0A

VIN = 12V, VOUT = 1.5V, IOUT = 0A

1.478

1.5

1.522

Input Speciﬁcations

VIN(UVLO) Undervoltage Lockout Threshold IOUT = 0A 3.2 4 V

IINRUSH(VIN) Input Inrush Current at Start-Up IOUT = 0A. VOUT = 1.5V

VIN = 5V

VIN = 12V

0.6

0.7

IQ(VIN,NOLOAD) Input Supply Bias Current VIN = 12V, No Switching

VIN = 12V, VOUT = 1.5V, Switching Continuous

VIN = 5V, No Switching

VIN = 5V, VOUT = 1.5V, Switching Continuous

Shutdown, RUN = 0, VIN = 12V

3.8

2.5

µA

IS(VIN) Input Supply Current VIN = 12V, VOUT = 1.5V, IOUT = 12A

VIN = 12V, VOUT = 3.3V, IOUT = 12A

VIN = 5V, VOUT = 1.5V, IOUT = 12A

1.81

3.63

4.29

INTVCC VIN = 12V, RUN > 2V No Load 4.7 5 5.3 V

Output Speciﬁcations

IOUTDC Output Continuous Current Range VIN = 12V, VOUT = 1.5V (Note 6) 0 12 A

ΔVOUT(LINE)

VOUT

Line Regulation Accuracy VOUT = 1.5V, IOUT = 0A, VIN from 4.5V to 20V l0.3 %

ΔVOUT(LOAD)

VOUT

Load Regulation Accuracy VOUT = 1.5V, 0A to 12A (Note 6)

VIN = 12V, with Remote Sense Ampliﬁer

VIN = 12V (LTM4601-1)

0.25

VOUT(AC) Output Ripple Voltage IOUT = 0A, COUT = 2× 100µF X5R Ceramic

VIN = 12V, VOUT = 1.5V

VIN = 5V, VOUT = 1.5V

mVP-P

fSOutput Ripple Voltage Frequency IOUT = 5A, VIN = 12V, VOUT = 1.5V 850 kHz

ΔVOUT(START) Turn-On Overshoot COUT = 200µF, VOUT = 1.5V, IOUT = 0A,

TRACK/SS = 10nF

VIN = 12V

VIN = 5V

tSTART Turn-On Time COUT = 200µF, VOUT = 1.5V, TRACK/SS = Open,

IOUT = 1A Resistive Load

VIN = 12V

VIN = 5V

0.5

The l denotes the speciﬁcations which apply over the –40°C to 85°C

temperature range (Note 2), otherwise speciﬁcations are at TA = 25°C, VIN = 12V, per typical application (front page) conﬁguration.

Consult Marketing for parts speciﬁed with wider operating temperature

ranges. *Device temperature grade is indicated by a label on the shipping

container. Pad or ball ﬁnish code is per IPC/JEDEC J-STD-609.

• Terminal Finish Part Marking:

www.linear.com/leadfree

• Recommended LGA and BGA PCB Assembly and Manufacturing

Procedures:

www.linear.com/umodule/pcbassembly

• LGA and BGA Package and Tray Drawings:

www.linear.com/packaging

orDer inForMaTion

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

ΔVOUTLS Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load,

COUT = 2 × 22µF Ceramic, 470µF 4V Sanyo

POSCAP

VIN = 12V

VIN = 5V

tSETTLE Settling Time for Dynamic Load Step Load: 0% to 50%, or 50% to 0% of Full Load

VIN = 12V

µs

IOUTPK Output Current Limit COUT = 200µF Ceramic

VIN = 12V, VOUT = 1.5V

VIN = 5V, VOUT = 1.5V

Remote Sense Amp (Note 3) (LTM4601 Only, Not Supported in the LTM4601-1)

VOSNS+, VOSNS–

CM Range

Common Mode Input Voltage Range VIN = 12V, RUN > 2V 0 INTVCC – 1 V

DIFFVOUT Range Output Voltage Range VIN = 12V, DIFFVOUT Load = 100k 0 INTVCC – 1 V

VOS Input Offset Voltage Magnitude 1.25 mV

AVDifferential Gain 1 V/V

GBP Gain Bandwidth Product 3 MHz

SR Slew Rate 2 V/µs

RIN Input Resistance VOSNS+ to GND 20 kW

CMRR Common Mode Rejection Mode 100 dB

Control Stage

VFB Error Ampliﬁer Input Voltage

Accuracy

IOUT = 0A, VOUT = 1.5V l0.594 0.6 0.606 V

VRUN RUN Pin On/Off Threshold 1 1.5 1.9 V

ITRACK/SS Soft-Start Charging Current VTRACK/SS = 0V –1.0 –1.5 –2.0 µA

tON(MIN) Minimum On Time (Note 4) 50 100 ns

tOFF(MIN) Minimum Off Time (Note 4) 250 400 ns

RPLLIN PLLIN Input Resistance 50 kW

IDRVCC Current into DRVCC Pin VOUT = 1.5V, IOUT = 1A, DRVCC = 5V 18 25 mA

RFBHI Resistor Between VOUT_LCL and VFB 60.098 60.4 60.702 kW

VMPGM Margin Reference Voltage 1.18 V

VMARG0, VMARG1 MARG0, MARG1 Voltage Thresholds 1.4 V

PGOOD Output

ΔVFBH PGOOD Upper Threshold VFB Rising 7 10 13 %

ΔVFBL PGOOD Lower Threshold VFB Falling –7 –10 –13 %

ΔVFB(HYS) PGOOD Hysteresis VFB Returning 1.5 %

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTM4601 is tested under pulsed load conditions such that

TJ ≈ TA. The LTM4601E/LTM4601E-1 are guaranteed to meet performance

speciﬁcations from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C

operating temperature range are assured by design, characterization and

correlation with statistical process controls. The LTM4601I/LTM4601I-1

are guaranteed over the –40°C to 85°C operating temperature range.

Note 3: Remote sense ampliﬁer recommended for ≤3.3V output.

Note 4: 100% tested at wafer level only.

Note 5: Limit current into RUN pin to less than 1mA.

Note 6: See output current derating curves for different VIN, VOUT and TA.

elecTrical characTerisTics

The l denotes the speciﬁcations which apply over the –40°C to 85°C

temperature range (Note 2), otherwise speciﬁcations are at TA = 25°C, VIN = 12V, per typical application (front page) conﬁguration.

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Efﬁciency vs Load Current

with 5V

Efﬁciency vs Load Current

with 12VIN

Efﬁciency vs Load Current

with 20VIN

1.2V Transient Response

1.5V Transient Response

2.5V Transient Response

3.3V Transient Response

1.8V Transient Response

Typical perForMance characTerisTics

(See Figure 18 for all curves)

VOUT

50mV/DIV

20µs/DIV 4601 G04

0A TO 6A

LOAD STEP

1.2V AT 6A/µs LOAD STEP

COUT = 3 • 22µF 6.3V CERAMICS

470µF 4V SANYO POSCAP

C3 = 100pF

VOUT

50mV/DIV

20µs/DIV 4601 G05

0A TO 6A

LOAD STEP

1.5V AT 6A/µs LOAD STEP

COUT = 3 • 22µF 6.3V CERAMICS

470µF 4V SANYO POSCAP

C3 = 100pF

VOUT

50mV/DIV

20µs/DIV 4601 G06

0A TO 6A

LOAD STEP

1.8V AT 6A/µs LOAD STEP

COUT = 3 • 22µF 6.3V CERAMICS

470µF 4V SANYO POSCAP

C3 = 100pF

VOUT

50mV/DIV

20µs/DIV 4601 G07

0A TO 6A

LOAD STEP

2.5V AT 6A/µs LOAD STEP

COUT = 3 • 22µF 6.3V CERAMICS

470µF 4V SANYO POSCAP

C3 = 100pF

VOUT

50mV/DIV

20µs/DIV 4601 G08

0A TO 6A

LOAD STEP

3.3V AT 6A/µs LOAD STEP

COUT = 3 • 22µF 6.3V CERAMICS

470µF 4V SANYO POSCAP

C3 = 100pF

LOAD CURRENT (A)

EFFICIENCY (%)

4601 G01

60 5 10

100

0.6VOUT

1.2VOUT

1.5VOUT

2.5VOUT

3.3VOUT

LOAD CURRENT (A)

EFFICIENCY (%)

100

510

4601 G02

0.6VOUT

1.2VOUT

1.5VOUT

2.5VOUT

3.3VOUT

5VOUT

LOAD CURRENT (A)

100

4601 G03

510 15

EFFICIENCY (%)

1.2VOUT

1.5VOUT

2.5VOUT

3.3VOUT

5.0VOUT

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Start-Up, IOUT = 12A

(Resistive Load)

Start-Up, I

OUT

= 0A

VIN to VOUT Step-Down Ratio

Short-Circuit Protection, I

OUT

= 0A

Short-Circuit Protection, I

OUT

= 12A

Track, IOUT = 12A

Typical perForMance characTerisTics

(See Figure 18 for all curves)

VOUT

0.5V/DIV

5ms/DIV 4601 G09

IIN

0.5A/DIV

VIN = 12V

VOUT = 1.5V

COUT = 470µF, 3 × 22µF

SOFT-START = 10nF

VOUT

0.5V/DIV

2ms/DIV 4601 G10

IIN

1A/DIV

VIN = 12V

VOUT = 1.5V

COUT = 470µF, 3 × 22µF

SOFT-START = 10nF

INPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

3.0

4.0

5.5

5.0

4601 G11

2.0

1.0

2.5

3.5

4.5

1.5

0.5

042 86 12 14 18

10 20

3.3V OUTPUT WITH

130k FROM VOUT

TO ION

5V OUTPUT WITH

100k RESISTOR

ADDED FROM fSET

TO GND

5V OUTPUT WITH

NO RESISTOR ADDED

FROM fSET TO GND

2.5V OUTPUT

1.8V OUTPUT

1.5V OUTPUT

1.2V OUTPUT

VOUT

0.5V/DIV

50µs/DIV 4601 G13

IIN

1A/DIV

VIN = 12V

VOUT = 1.5V

COUT = 470µF, 3 × 22µF

SOFT-START = 10nF

VFB

0.5V/DIV

TRACK/SS

0.5V/DIV

2ms/DIV 4601 G12

VOUT

1V/DIV

VIN = 12V

VOUT = 1.5V

COUT = 470µF, 3 × 22µF

SOFT-START = 10nF

VOUT

0.5V/DIV

50µs/DIV 4601 G14

IIN

1A/DIV

VIN = 12V

VOUT = 1.5V

COUT = 470µF, 3 × 22µF

SOFT-START = 10nF

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

pin FuncTions

(See Package Description for Pin Assignment)

VIN (Bank 1): Power Input Pins. Apply input voltage be-

tween these pins and PGND pins. Recommend placing

input decoupling capacitance directly between VIN pins

and PGND pins.

VOUT (Bank 3): Power Output Pins. Apply output load

between these pins and PGND pins. Recommend placing

output decoupling capacitance directly between these pins

and PGND pins. See Figure 15.

PGND (Bank 2): Power ground pins for both input and

output returns.

VOSNS– (Pin M12): (–) Input to the Remote Sense Ampli-

ﬁer. This pin connects to the ground remote sense point.

The remote sense ampliﬁer is used for VOUT ≤3.3V. Tie to

INTVCC if not used.

NC1 (Pin M12): No internal connection on the LTM4601-1.

VOSNS+ (Pin J12): (+) Input to the Remote Sense Ampli-

ﬁer. This pin connects to the output remote sense point.

The remote sense ampliﬁer is used for VOUT ≤3.3V. Tie to

ground if not used.

NC2 (Pin J12): No internal connection on the LTM4601-1.

DIFFVOUT (Pin K12): Output of the Remote Sense Ampli-

ﬁer. This pin connects to the VOUT_LCL pin. Leave ﬂoating

if not used.

NC3 (Pin K12): No internal connection on the LTM4601-1.

DRVCC (Pin E12): This pin normally connects to INTVCC

for powering the internal MOSFET drivers. This pin can be

biased up to 6V from an external supply with about 50mA

capability, or an external circuit as shown in Figure 16.

This improves efﬁciency at the higher input voltages by

reducing power dissipation in the module.

INTVCC (Pin A7): This pin is for additional decoupling of

the 5V internal regulator.

PLLIN (Pin A8): External Clock Synchronization Input

to the Phase Detector. This pin is internally terminated

to SGND with a 50k resistor. Apply a clock with a high

level above 2V and below INTVCC. See the Applications

Information section.

TRACK/SS (Pin A9): Output Voltage Tracking and Soft-

Start Pin. When the module is conﬁgured as a master

output, then a soft-start capacitor is placed from this pin

to ground to control the master ramp rate. A soft-start

capacitor can also be used for soft-start turn-on of a stand

alone regulator. Slave operation is performed by putting

a resistor divider from the master output to the ground,

and connecting the center point of the divider to this pin.

See the Applications Information section.

MPGM (Pin A12): Programmable Margining Input. A re-

sistor from this pin to ground sets a current that is equal

to 1.18V/R. This current multiplied by 10kW will equal a

value in millivolts that is a percentage of the 0.6V refer-

ence voltage. See the Applications Information section.

To parallel LTM4601s, each requires an individual MPGM

resistor. Do not tie MPGM pins together.

fSET (Pin B12): Frequency Set Internally to 850kHz. An

external resistor can be placed from this pin to ground

to increase frequency. See the Applications Information

section for frequency adjustment.

VFB (Pin F12): The Negative Input of the Error Ampliﬁer.

Internally, this pin is connected to VOUT_LCL pin with a

60.4k precision resistor. Different output voltages can be

programmed with an additional resistor between VFB and

SGND pins. See the Applications Information section.

MARG0 (Pin C12): This pin is the LSB logic input for the

margining function. Together with the MARG1 pin it will

determine if margin high, margin low or no margin state

is applied. The pin has an internal pull-down resistor of

50k. See the Applications Information section.

MARG1 (Pin D12): This pin is the MSB logic input for the

margining function. Together with the MARG0 pin it will

determine if margin high, margin low or no margin state

is applied. The pin has an internal pull-down resistor of

50k. See the Applications Information section.

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

SGND (Pin H12): Signal Ground. This pin connects to

PGND at output capacitor point. See Figure 15.

COMP (Pin A11): Current Control Threshold and Error

Ampliﬁer Compensation Point. The current comparator

threshold increases with this control voltage. The voltage

ranges from 0V to 2.4V with 0.7V corresponding to zero

sense voltage (zero current).

PGOOD (Pin G12): Output Voltage Power Good Indicator.

Open-drain logic output that is pulled to ground when the

output voltage is not within ±10% of the regulation point,

after a 25µs power bad mask timer expires.

RUN (Pin A10): Run Control Pin. A voltage above 1.9V

will turn on the module, and when below 1V, will turn

off the module. A programmable UVLO function can be

accomplished by connecting to a resistor divider from

VIN to ground. See Figure 1. This pin has a 5.1V Zener to

ground. Maximum pin voltage is 5V. Limit current into the

RUN pin to less than 1mA.

VOUT_LCL (Pin L12): VOUT connects directly to this pin

to bypass the remote sense ampliﬁer, or DIFFVOUT con-

nects to this pin when the remote sense ampliﬁer is used.

VOUT_LCL can be connected to VOUT on the LTM4601-1,

VOUT is internally connected to VOUT_LCL with 50W in the

LTM4601-1.

pin FuncTions

(See Package Description for Pin Assignment)

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Figure 1. Simpliﬁed LTM4601/LTM4601-1 Block Diagram

siMpliFieD block DiagraM

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

CIN External Input Capacitor Requirement (VIN =

4.5V to 20V, VOUT = 1.5V)

IOUT = 12A, 3× 10µF Ceramics 20 30 µF

COUT External Output Capacitor Requirement (VIN

= 4.5V to 20V, VOUT = 1.5V)

IOUT = 12A 100 200 µF

TA = 25°C, VIN = 12V. Use Figure 1 conﬁguration.

Decoupling requireMenTs

INTERNAL

COMP

SGND

COMP

PGOOD

RUN

VOUT_LCL

VIN

>1.9V = ON

<1V = OFF

MAX = 5V

MARG1

MARG0

MPGM

PLLIN

CSS

INTVCC

DRVCC

TRACK/SS

VFB

fSET

50k

39.2k

RSET

40.2k

50k

60.4k

VOUT

(50Ω, LTM4601-1)

5.1V

ZENER

POWER CONTROL Q1

VIN

4.5V TO 20V

VOUT

1.5V

12A

10k

0.47µH

10k

NOT INCLUDED

IN THE LTM4601-1

VOSNS– = NC1

VOSNS+ = NC2

DIFFVOUT = NC3

50k

10k INTVCC

2.2k

UVLO

FUNCTION

–

22µF

1.5µF CIN

COUT

PGND

VOSNS–

VOSNS+

DIFFVOUT

4601 F01

4.7µF

= SGND

= PGND

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Power Module Description

The LTM4601 is a standalone nonisolated switching mode

DC/DC power supply. It can deliver up to 12A of DC output

current with some external input and output capacitors.

This module provides a precisely regulated output voltage

programmable via one external resistor from 0.6VDC to

5.0VDC over a 4.5V to 20V wide input voltage. The typical

application schematic is shown in Figure 18.

The LTM4601 has an integrated constant on-time current

mode regulator, ultralow RDS(ON) FETs with fast switch-

ing speed and integrated Schottky diodes. The typical

switching frequency is 850kHz at full load. With current

mode control and internal feedback loop compensation,

the L

TM4601 module has sufﬁcient stability margins and

good transient performance under a wide range of operat-

ing conditions and with a wide range of output capacitors,

even all ceramic output capacitors.

Current mode control provides cycle-by-cycle fast current

limit. Besides, foldback current limiting is provided in an

overcurrent condition while VFB drops. Internal overvolt-

age and undervoltage comparators pull the open-drain

PGOOD output low if the output feedback voltage exits a

±10% window around the regulation point. Furthermore,

in an overvoltage condition, internal top FET Q1 is turned

off and bottom FET Q2 is turned on and held on until the

overvoltage condition clears.

Pulling the RUN pin below 1V forces the controller into its

shutdown state, turning off both Q1 and Q2. At low load

current, the module works in continuous current mode by

default to achieve minimum output ripple voltage.

When DRVCC pin is connected to INTVCC an integrated

5V linear regulator powers the internal gate drivers. If a

5V external bias supply is applied on the DRVCC pin, then

an efﬁciency improvement will occur due to the reduced

power loss in the internal linear regulator. This is especially

true at the high end of the input voltage range.

The LTM4601 has a very accurate differential remote

sense ampliﬁer with very low offset. This provides for

very accurate output voltage sensing at the load. The

MPGM pin, MARG0 pin and MARG1 pin are used to sup-

port voltage margining, where the percentage of margin

is programmed by the MPGM pin, and the MARG0 and

MARG1 select margining.

The PLLIN pin provides frequency synchronization of the

device to an external clock. The TRACK/SS pin is used

for power supply tracking and soft-start programming.

operaTion

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

The typical LTM4601 application circuit is shown in Fig-

ure 18. External component selection is primarily deter-

mined by the maximum load current and output voltage.

Refer to Table 2 for speciﬁc external capacitor requirements

for a particular application.

VIN to VOUT Step-Down Ratios

There are restrictions in the maximum VIN to VOUT step

down ratio that can be achieved for a given input voltage.

These constraints are shown in the Typical Performance

Characteristics curves labeled VIN to VOUT Step-Down

Ratio. Note that additional thermal derating may apply. See

the Thermal Considerations and Output Current Derating

section of this data sheet.

Output Voltage Programming and Margining

The PWM controller has an internal 0.6V reference voltage.

As shown in the Block Diagram, a 1M and a 60.4k 0.5%

internal feedback resistor connects VOUT and VFB pins

together. The VOUT_LCL pin is connected between the 1M

and the 60.4k resistor. The 1M resistor is used to protect

against an output overvoltage condition if the VOUT_LCL

pin is not connected to the output, or if the remote sense

ampliﬁer output is not connected to VOUT_LCL. In these

cases, the output voltage will default to 0.6V. Adding a

resistor RSET from the VFB pin to SGND pin programs

the output voltage:

VOUT =0.6V •

60.4k +R

SET

Table 1. RSET Standard 1% Resistor Values vs VOUT

RSET

(kW)Open 60.4 40.2 30.1 25.5 19.1 13.3 8.25

VOUT

(V) 0.6 1.2 1.5 1.8 2 2.5 3.3 5

The MPGM pin programs a current that when multiplied

by an internal 10k resistor sets up the 0.6V reference ±

offset for margining. A 1.18V reference divided by the

RPGM resistor on the MPGM pin programs the current.

Calculate VOUT(MARGIN):

VOUT(MARGIN) =

OUT

100

•VOUT

where %VOUT is the percentage of VOUT you want to

margin, and VOUT(MARGIN) is the margin quantity in volts:

RPGM =

OUT

0.6V •

1.18V

VOUT(MARGIN)

•10k

where RPGM is the resistor value to place on the MPGM

pin to ground.

The margining voltage, VOUT(MARGIN), will be added or

subtracted from the nominal output voltage as determined

by the state of the MARG0 and MARG1 pins. See the truth

table below:

MARG1 MARG0 MODE

LOW LOW NO MARGIN

LOW HIGH MARGIN UP

HIGH LOW MARGIN DOWN

HIGH HIGH NO MARGIN

Input Capacitors

LTM4601 module should be connected to a low AC imped-

ance DC source. Input capacitors are required to be placed

adjacent to the module. In Figure 18, the 10µF ceramic input

capacitors are selected for their ability to handle the large

RMS current into the converter

. An input bulk capacitor

of 100µF is optional. This 100µF capacitor is only needed

if the input source impedance is compromised by long

inductive leads or traces.

applicaTions inForMaTion

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

For a buck converter, the switching duty-cycle can be

estimated as:

OUT

Without considering the inductor ripple current, the RMS

current of the input capacitor can be estimated as:

ICIN(RMS) =

OUT(MAX)

η%•D•1–D

( )

In the above equation, η% is the estimated efﬁciency of

the power module. CIN can be a switcher-rated electrolytic

aluminum capacitor, OS-CON capacitor or high value ce-

ramic capacitor. Note the capacitor ripple current ratings

are often based on temperature and hours of life. This

makes it advisable to properly derate the input capacitor

or choose a capacitor rated at a higher temperature than

required. Always contact the capacitor manufacturer for

derating requirements.

In Figure 18, the 10µF ceramic capacitors are together

used as a high frequency input decoupling capacitor. In a

typical 12A output application, three very low ESR, X5R or

X7R, 10µF ceramic capacitors are recommended. These

decoupling capacitors should be placed directly adjacent

to the module input pins in the PCB layout to minimize

the trace inductance and high frequency AC noise. Each

10µF ceramic is typically good for 2A to 3A of RMS ripple

current. Refer to your ceramics capacitor catalog for the

RMS current ratings.

Multiphase operation with multiple LTM4601 devices in

parallel will lower the effective input RMS ripple current

due to the interleaving operation of the regulators. Appli-

cation Note 77 provides a detailed explanation. Refer to

Figure 2 for the input capacitor ripple current reduction as

a function of the number of phases. The ﬁgure provides

a ratio of RMS ripple current to DC load current as func-

tion of duty cycle and the number of paralleled phases.

Pick the corresponding duty cycle and the number of phases

to arrive at the correct ripple current value. For example,

the 2-phase parallel LTM4601 design provides 24A at 2.5V

output from a 12V input. The duty cycle is DC = 2.5V/12V

= 0.21. The 2-phase curve has a ratio of ~0.25 for a duty

cycle of 0.21. This 0.25 ratio of RMS ripple current to a

DC load current of 24A equals ~6A of input RMS ripple

current for the external input capacitors.

Output Capacitors

The LTM4601 is designed for low output ripple voltage.

The bulk output capacitors deﬁned as COUT are chosen

with low enough effective series resistance (ESR) to meet

the output voltage ripple and transient requirements. COUT

can be a low ESR tantalum capacitor, a low ESR polymer

capacitor or a ceramic capacitor. The typical capacitance is

200µF if all ceramic output capacitors are used. Additional

output ﬁltering may be required by the system designer

if further reduction of output ripple or dynamic transient

spikes is required. Table 2 shows a matrix of different

output voltages and output capacitors to minimize the

voltage droop and overshoot during a 5A/µs transient.

The table optimizes total equivalent ESR and total bulk

capacitance to maximize transient performance.

Figure 2. Normalized Input RMS Ripple Current

vs Duty Cycle for One to Six Modules (Phases)

applicaTions inForMaTion

DUTY CYCLE (VOUT/VIN)

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

0.6

0.5

0.4

0.3

0.2

0.1

4601 F02

RMS INPUT RIPPLE CURRENT

DC LOAD CURRENT

6-PHASE

4-PHASE

12-PHASE

3-PHASE

2-PHASE

1-PHASE

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Multiphase operation with multiple LTM4601 devices in

parallel will lower the effective output ripple current due to

the interleaving operation of the regulators. For example,

each LTM4601’s inductor current in a 12V to 2.5V multi-

phase design can be read from the Inductor Ripple Current

vs Duty Cycle graph (Figure 3). The large ripple current

at low duty cycle and high output voltage can be reduced

by adding an external resistor from fSET to ground which

increases the frequency. If the duty cycle is DC = 2.5V/12V

= 0.21, the inductor ripple current for 2.5V output at 21%

duty cycle is ~6A in Figure 3.

Figure 4 provides a ratio of peak-to-peak output ripple cur-

rent to the inductor current as a function of duty cycle and

the number of paralleled phases. Pick the corresponding

duty cycle and the number of phases to arrive at the correct

output ripple current ratio value. If a 2-phase operation is

chosen at a duty cycle of 21%, then 0.6 is the ratio. This

0.6 ratio of output ripple current to inductor ripple of 6A

equals 3.6A of effective output ripple current. Refer to

Application Note 77 for a detailed explanation of output

ripple current reduction as a function of paralleled phases.

The output ripple voltage has two components that are

related to the amount of bulk capacitance and effective

series resistance (ESR) of the output bulk capacitance.

Figure 4. Normalized Output Ripple Current vs Duty Cycle, Dlr = VOT/LI, Dlr = Each Phase’s Inductor Current

Figure 3. Inductor Ripple Current vs Duty Cycle

applicaTions inForMaTion

DUTY CYCLE (VOUT/VIN)

IL (A)

0.2 0.4 0.6 0.8

4601 F03

2.5V OUTPUT

5V OUTPUT

1.8V OUTPUT

1.5V OUTPUT

1.2V OUTPUT

3.3V OUTPUT WITH

130k ADDED FROM

VOUT TO fSET

5V OUTPUT WITH

100k ADDED FROM

fSET TO GND

DUTY CYCLE (VO/VIN)

0.1 0.15 0.2 0.25 0.350.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9

1.00

0.95

0.90

0.85

0.80

0.75

0.70

0.65

0.60

0.55

0.50

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

4601 F04

6-PHASE

4-PHASE

3-PHASE

2-PHASE

1-PHASE

PEAK-TO-PEAK OUTPUT RIPPLE CURRENT

DIr

RATIO =

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Therefore, the output ripple voltage can be calculated with

the known effective output ripple current. The equation:

ΔVOUT(P-P) ≈ (ΔIL/(8 • f • m • COUT) + ESR • ΔIL), where f

is frequency and m is the number of parallel phases. This

calculation process can be easily accomplished by using

LTpowerCAD™.

Fault Conditions: Current Limit and Overcurrent

Foldback

LTM4601 has a current mode controller, which inher-

ently limits the cycle-by-cycle inductor current not only in

steady-state operation, but also in response to transients.

To further limit current in the event of an overload condi-

tion, the L

TM4601 provides foldback current limiting. If the

output voltage falls by more than 50%, then the maximum

output current is progressively lowered to about one sixth

of its full current limit value.

Soft-Start and Tracking

The TRACK/SS pin provides a means to either soft-start

the regulator or track it to a different power supply. A

capacitor on this pin will program the ramp rate of the

output voltage. A 1.5µA current source will charge up the

external soft-start capacitor to 80% of the 0.6V internal

voltage reference plus or minus any margin delta. This will

control the ramp of the internal reference and the output

voltage. The total soft-start time can be calculated as:

tSOFTSTART =0.8 •0.6V ±VOUT(MARGIN)

( )

•

1.5µA

When the RUN pin falls below 1.5V, then the TRACK/SS

pin is reset to allow for proper soft-start control when the

regulator is enabled again. Current foldback and forced

continuous mode are disabled during the soft-start pro-

cess. The soft-start function can also be used to control

the output ramp up time, so that another regulator can

be easily tracked to it.

Output Voltage T

racking

Output voltage tracking can be programmed externally

using the TRACK/SS pin. The output can be tracked up and

down with another regulator. The master regulator’s output

is divided down with an external resistor divider that is the

same as the slave regulator’s feedback divider. Figure 5

shows an example of coincident tracking. Ratiometric

modes of tracking can be achieved by selecting different

resistor values to change the output tracking ratio. The

master output must be greater than the slave output for

the tracking to work. Figure 6 shows the coincident output

tracking characteristics.

Figure 5. Coincident Tracking Schematic

Figure 6. Coincident Output Tracking Characteristics

OUTPUT

VOLTAGE

TIME 4601 F06

MASTER OUTPUT

SLAVE OUTPUT

applicaTions inForMaTion

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SS

TRACK CONTROL

PLLIN

LTM4601

RSET

40.2k

100k

40.2k

MASTER

OUTPUT

60.4k

COUT

SLAVE OUTPUT

4601 F05

CIN

VIN

fSETPGNDSGND

VIN

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Run Enable

The RUN pin is used to enable the power module. The

pin has an internal 5.1V Zener to ground. The pin can be

driven with a logic input not to exceed 5V.

The RUN pin can also be used as an undervoltage lock out

(UVLO) function by connecting a resistor divider from the

input supply to the RUN pin:

VUVLO =

R1+R2

•1.5V

See Figure 1, Simpliﬁed Block Diagram.

Power Good

The PGOOD pin is an open-drain pin that can be used to

monitor valid output voltage regulation. This pin monitors

a ±10% window around the regulation point and tracks

with margining.

COMP Pin

This pin is the external compensation pin. The module

has already been internally compensated for most output

voltages. Table 2 is provided for most application require-

ments. LTpowerCAD is available for other control loop

optimization.

PLLIN

The power module has a phase-locked loop comprised

of an internal voltage controlled oscillator and a phase

detector

. This allows the internal top MOSFET turn-on

to be locked to the rising edge of an external clock. The

frequency range is ±30% around the operating frequency

of 850kHz. A pulse detection circuit is used to detect a

clock on the PLLIN pin to turn on the phase-locked loop.

The pulse width of the clock has to be at least 400ns and

at least 2V in amplitude. The PLLIN pin must be driven

from a low impedance source such as a logic gate located

close to the pin. During the start-up of the regulator, the

phase-locked loop function is disabled.

INTVCC and DRVCC Connection

An internal low dropout regulator produces an internal

5V supply that powers the control circuitry and DRVCC

for driving the internal power MOSFETs. Therefore, if

the system does not have a 5V power rail, the LTM4601

can be directly powered by VIN. The gate driver current

through the LDO is about 20mA. The internal LDO power

dissipation can be calculated as:

PLDO_LOSS = 20mA • (VIN – 5V)

The LTM4601 also provides the external gate driver volt-

age pin DRVCC. If there is a 5V rail in the system, it is

recommended to connect DRVCC pin to the external 5V

rail. This is especially true for higher input voltages. Do

not apply more than 6V to the DRVCC pin. A 5V output can

be used to power the DRVCC pin with an external circuit

as shown in Figure 16.

Parallel Operation of the Module

The LTM4601 device is an inherently current mode con-

trolled device. Parallel modules will have very good current

sharing. This will balance the thermals on the design. The

voltage feedback equation changes with the variable N as

modules are paralleled:

VOUT =0.6V

60.4k

N+RSET

SET

N is the number of paralleled modules.

Figure 19 shows an LTM4601 and an LTM4601-1 used in a

parallel design. The 2nd LTM4601 device does not require

the remote sense ampliﬁer, therefore, the LTM4601-1 device

is used. An LTM4601 device can be used without the diff

amp. VOSNS+ can be tied to ground and the VOSNS– can be

tied to INTVCC. DIFFVOUT can ﬂoat. When using multiple

LTM4601-1 devices in parallel with an LTM4601, limit the

number to ﬁve for a total of six modules in parallel.

applicaTions inForMaTion

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Figure 7. 1.5V Power Loss Figure 8. 3.3V Power Loss

Figure 9. No Heat Sink 5VIN Figure 10. BGA Heat Sink 5VIN

applicaTions inForMaTion

Thermal Considerations and Output Current Derating

The power loss curves in Figures 7 and 8 can be used

in coordination with the load current derating curves in

Figures 9 to 14 for calculating an approximate θJA for the

module with various heat sinking methods. Thermal models

are derived from several temperature measurements at

the bench and thermal modeling analysis. Thermal Ap-

plication Note 103 provides a detailed explanation of the

analysis for the thermal models and the derating curves.

Tables 3 and 4 provide a summary of the equivalent θJA

for the noted conditions. These equivalent θJA parameters

are correlated to the measured values, and are improved

with air ﬂow. The case temperature is maintained at 100°C

or below for the derating curves. The maximum case

temperature of 100°C is to allow for a rise of about 13°C

to 25°C inside the µModule with a thermal resistance θJC

from junction to case between 6°C/W to 9°C/W. This will

maintain the maximum junction temperature inside the

µModule regulator below 125°C.

Safety Considerations

The LTM4601 modules do not provide isolation from

VIN to VOUT. There is no internal fuse. If required, a

slow blow fuse with a rating twice the maximum input

current needs to be provided to protect each unit from

catastrophic failure.

LOAD CURRENT (A)

POWER LOSS (W)

1.0

2.0

3.0

246 8

4601 F07

4.0

5.0

0.5

1.5

2.5

3.5

4.5

5VIN

20VIN

12VIN

LOAD CURRENT (A)

POWER LOSS (W)

24 6 8

4601 F08

10 12

20VIN

12VIN

AMBIENT TEMPERATURE (°C)

MAXIMUM LOAD CURRENT (A)

60 70 80 90

4600 F09

100

5VIN, 1.5VOUT 0LFM

5VIN, 1.5VOUT 200LFM

5VIN, 1.5VOUT 400LFM

AMBIENT TEMPERATURE (°C)

MAXIMUM LOAD CURRENT (A)

60 70 80 90

4601 F10

100

5VIN, 1.5VOUT 0LFM

5VIN, 1.5VOUT 200LFM

5VIN, 1.5VOUT 400LFM

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Figure 11. No Heat Sink 12VIN Figure 12. BGA Heat Sink 12VIN

Figure 13. 12VIN, 3.3VOUT, No Heat Sink Figure 14. 12VIN, 3.3VOUT, BGA Heat Sink

applicaTions inForMaTion

AMBIENT TEMPERATURE (°C)

MAXIMUM LOAD CURRENT (A)

60 70 80 90

4601 F11

100

5VIN, 1.5VOUT 0LFM

5VIN, 1.5VOUT 200LFM

5VIN, 1.5VOUT 400LFM

AMBIENT TEMPERATURE (°C)

MAXIMUM LOAD CURRENT (A)

60 70 80 90

4601 F12

100

5VIN, 1.5VOUT 0LFM

5VIN, 1.5VOUT 200LFM

5VIN, 1.5VOUT 400LFM

AMBIENT TEMPERATURE (°C)

MAXIMUM LOAD CURRENT (A)

60 80

4601 F13

100

0LFM

200LFM

400LFM

AMBIENT TEMPERATURE (°C)

MAXIMUM LOAD CURRENT (A)

60 80

4601 F14

100

0LFM

200LFM

400LFM

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 18), 0A to 6A Load Step

TYPICAL MEASURED VALUES

COUT1 VENDORS PART NUMBER COUT2 VENDORS PART NUMBER

TDK C4532X5R0J107MZ (100µF, 6.3V) SANYO POS CAP 6TPE330MIL (330µF, 6.3V)

TAIYO YUDEN JMK432BJ107MU-T ( 100µF, 6.3V) SANYO POS CAP 2R5TPE470M9 (470µF, 2.5V)

TAIYO YUDEN JMK316BJ226ML-T501 ( 22µF, 6.3V) SANYO POS CAP 4TPE470MCL (470µF, 4V)

VOUT

(V)

CIN

(CERAMIC)

CIN

(BULK)

COUT1

(CERAMIC)

COUT2

(BULK)

CCOMP

VIN

(V)

DROOP

(mV)

PEAK TO

PEAK (mV)

RECOVERY

TIME (µs)

LOAD STEP

(A/µs)

RSET

(kW)

1.2 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 47pF 5 70 140 30 6 60.4

1.2 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 5 35 70 20 6 60.4

1.2 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 22pF 5 70 140 20 6 60.4

1.2 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 5 40 93 30 6 60.4

1.2 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 12 70 140 30 6 60.4

1.2 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 12 35 70 20 6 60.4

1.2 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 22pF 12 70 140 20 6 60.4

1.2 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 12 49 98 20 6 60.4

1.5 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 5 48 100 35 6 40.2

1.5 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 33pF 5 54 109 30 6 40.2

1.5 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 5 44 84 30 6 40.2

1.5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 5 61 118 30 6 40.2

1.5 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 12 48 100 35 6 40.2

1.5 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 33pF 12 54 109 30 6 40.2

1.5 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 12 44 89 25 6 40.2

1.5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 12 54 108 25 6 40.2

1.8 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 47pF 5 48 100 30 6 30.1

1.8 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 5 44 90 20 6 30.1

1.8 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 5 68 140 30 6 30.1

1.8 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 5 65 130 30 6 30.1

1.8 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 12 60 120 30 6 30.1

1.8 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 12 60 120 30 6 30.1

1.8 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 12 68 140 30 6 30.1

1.8 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 12 65 130 20 6 30.1

2.5 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 4V NONE 100pF 5 48 103 30 6 19.1

2.5 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 220pF 5 56 113 30 6 19.1

2.5 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE NONE 5 57 116 30 6 19.1

2.5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 5 60 115 25 6 19.1

2.5 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 4V NONE 100pF 12 48 103 30 6 19.1

2.5 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE NONE 12 51 102 30 6 19.1

2.5 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 220pF 12 56 113 30 6 19.1

2.5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 220pF 12 70 140 25 6 19.1

3.3 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 7 120 240 30 6 13.3

3.3 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 4V NONE 100pF 7 110 214 30 6 13.3

3.3 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 7 110 214 30 6 13.3

3.3 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 7 114 230 30 6 13.3

3.3 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 4V NONE 100pF 12 110 214 30 6 13.3

3.3 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 150pF 12 110 214 35 6 13.3

3.3 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 12 110 214 35 6 13.3

3.3 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 12 114 230 30 6 13.3

5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 22pF 15 188 375 25 6 8.25

5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 22pF 20 159 320 25 6 8.25

applicaTions inForMaTion

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Table 3. 1.5V Output at 12A

DERATING CURVE VIN (V) POWER LOSS CURVE AIR FLOW (LFM) HEAT SINK θJA (°C/W) LGA θJA (°C/W) BGA

Figures 9, 11 5, 12 Figure 7 0 None 15.2 15.7

Figures 9, 11 5, 12 Figure 7 200 None 14 14.5

Figures 9, 11 5, 12 Figure 7 400 None 12 12.5

Figures 10, 12 5, 12 Figure 7 0 BGA Heat Sink 13.9 14.4

Figures 10, 12 5, 12 Figure 7 200 BGA Heat Sink 11.3 11.8

Figures 10, 12 5, 12 Figure 7 400 BGA Heat Sink 10.25 10.75

Table 4. 3.3V Output at 12A

DERATING CURVE VIN (V) POWER LOSS CURVE AIR FLOW (LFM) HEAT SINK θJA (°C/W) LGA θJA (°C/W) BGA

Figure 13 12 Figure 8 0 None 15.2 15.7

Figure 13 12 Figure 8 200 None 14.6 15.0

Figure 13 12 Figure 8 400 None 13.4 13.9

Figure 14 12 Figure 8 0 BGA Heat Sink 13.9 14.4

Figure 14 12 Figure 8 200 BGA Heat Sink 11.1 11.6

Figure 14 12 Figure 8 400 BGA Heat Sink 10.5 11.0

Heat Sink Manufacturer

Aavid Thermalloy Part No: 375424B00034G Phone: 603-224-9988

applicaTions inForMaTion

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Layout Checklist/Example

The high integration of LTM4601 makes the PCB board

layout very simple and easy. However, to optimize its electri-

cal and thermal performance, some layout considerations

are still necessary.

• Use large PCB copper areas for high current path, in-

cluding VIN, PGND and VOUT. It helps to minimize the

PCB conduction loss and thermal stress.

• Place high frequency ceramic input and output capaci-

tors next to the VIN, PGND and VOUT pins to minimize

high frequency noise.

• Place a dedicated power ground layer underneath the

unit. Refer frequency synchronization source to power

ground.

• To minimize the via conduction loss and reduce module

thermal stress, use multiple vias for interconnection

between top layer and other power layers.

• Do not put vias directly on pads unless they are capped.

• Use a separated SGND copper area for components

connected to signal pins. Connect the SGND to PGND

underneath the unit.

Figure 15 gives a good example of the recommended layout.

Frequency Adjustment

The LTM4601 is designed to typically operate at 850kHz

across most input conditions. The fSET pin is normally

left open. The switching frequency has been optimized

for maintaining constant output ripple noise over most

operating ranges. The 850kHz switching frequency and

the 400ns minimum off time can limit operation at higher

duty cycles like 5V to 3.3V, and produce excessive induc-

tor ripple currents for lower duty cycle applications like

20V to 5V. The 5VOUT and 3.3VOUT drop out curves are

modiﬁed by adding an external resistor on the fSET pin to

allow for lower input voltage operation, or higher input

voltage operation.

SIGNAL

GND

VOUT

VIN

GND

COUT

CIN CIN

COUT

4601 F15

Figure 15. Recommended Layout (LGA and BGA PCB Layouts Are Identical

with the Exception of Circle Pads for BGA, See Package Description.)

applicaTions inForMaTion

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Example for 5V Output

LTM4601 minimum on-time = 100ns

tON = ((VOUT • 10pF)/IfSET), for VOUT > 4.8V use 4.8V.

LTM4601 minimum off-time = 400ns

tOFF = t – tON, where t = 1/Frequency

Duty Cycle = tON/t or VOUT/VIN

Equations for setting frequency:

IfSET = (VIN/(3 • RfSET)), for 20V operation, IfSET = 170µA,

tON = ((4.8 • 10pF)/IfSET), tON = 282ns, where the internal

RfSET is 39.2k. Frequency = (VOUT/(VIN • tON)) = (5V/(20

• 282ns)) ~ 886kHz. The inductor ripple current begins

to get high at the higher input voltages due to a larger

voltage across the inductor. This is noted in the Inductor

Ripple Current vs Duty Cycle graph (Figure 3) where IL ≈

10A at 25% duty cycle. The inductor ripple current can be

lowered at the higher input voltages by adding an external

resistor from fSET to ground to increase the switching

frequency. An 8A ripple current is chosen, and the total

peak current is equal to 1/2 of the 8A ripple current plus

the output current. The 5V output current is limited to 8A,

so the total peak current is less than 12A. This is below the

14A peak speciﬁed value. A 100k resistor is placed from

fSET to ground, and the parallel combination of 100k and

39.2k equates to 28k. The IfSET calculation with 28k and

20V input voltage equals 238µA. This equates to a tON of

200ns. This will increase the switching frequency from

~886kHz to ~1.25MHz for the 20V to 5V conversion. The

minimum on-time is above 100ns at 20V input. Since

the switching frequency is approximately constant over

input and output conditions, then the lower input voltage

range is limited to 10V for the 1.25MHz operation due to

the 400ns minimum off-time. Equation: tON = (VOUT/VIN)

• (1/Frequency) equates to a 400ns on-time, and a 400ns

off-time. The VIN to VOUT Step-Down Ratio curve reﬂects

an operating range of 10V to 20V for 1.25MHz operation

with a 100k resistor to ground, and an 8V to 16V operation

for fSET ﬂoating. These modiﬁcations are made to provide

wider input voltage ranges for the 5V output designs while

limiting the inductor ripple current, and maintaining the

400ns minimum off-time.

Example for 3.3V Output

LTM4601 minimum on-time = 100ns

tON = ((VOUT • 10pF)/IfSET)

LTM4601 minimum off-time = 400ns

tOFF = t – tON, where t = 1/Frequency

Duty Cycle (DC) = tON/t or VOUT/VIN

Equations for setting frequency:

IfSET = (VIN/(3 • RfSET)), for 20V operation, IfSET = 170µA,

tON = ((3.3 • 10pf)/IfSET), tON = 195ns, where the internal

RfSET is 39.2k. Frequency = (VOUT/(VIN • tON)) = (3.3V/

(20 • 195ns)) ~ 846kHz. The minimum on-time and mini-

mum off-time are within speciﬁcation at 195ns and 980ns.

The 4.5V minimum input for converting 3.3V output will

not meet the minimum off-time speciﬁcation of 400ns.

tON = 868ns, Frequency = 850kHz, tOFF = 315ns.

Solution

Lower the switching frequency at lower input voltages to

allow for higher duty cycles, and meet the 400ns minimum

off-time at 4.5V input voltage. The off-time should be about

500ns, which includes a 100ns guard band. The duty cycle

for (3.3V/4.5V) = ~73%. Frequency = (1 – DC)/tOFF or

(1 – 0.73)/500ns = 540kHz. The switching frequency

needs to be lowered to 540kHz at 4.5V input. tON = DC/

frequency, or 1.35µs. The fSET pin voltage is 1/3 of VIN, and

the IfSET current equates to 38µA with the internal 39.2k.

The IfSET current needs to be 24µA for 540kHz opera-

tion. A resistor can be placed from VOUT to fSET to lower

the effective IfSET current out of the fSET pin to 24µA.

The fSET pin is 4.5V/3 =1.5V and VOUT = 3.3V, therefore

130k will source 14µA into the fSET node and lower the

IfSET current to 24µA. This enables the 540kHz operation

and the 4.5V to 20V input operation for down converting to

3.3V output. The frequency will scale from 540kHz to 1.1

MHz over this input range. This provides for an effective

output current of 8A over the input range.

applicaTions inForMaTion

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Figure 16. 5V at 8A Design Without Differential Ampliﬁer

applicaTions inForMaTion

Figure 17. 3.3V at 10A Design

VOUT

VFB

MARG0

MARG1

VOUT_LCL

NC3

NC1

NC2

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4601-1

392k

RfSET

100k

RSET

8.25k

COUT1

100µF

6.3V

SANYO POSCAP

4601 F16

VOUT

TRACK/SS CONTROL

REVIEW TEMPERATURE

DERATING CURVE

C3 100pF

REFER TO

TABLE 2

CIN

10µF

25V

×2

IMPROVE

EFFICIENCY

FOR ≥12V INPUT

100k

100k VIN

VOUT

fSETPGND

MARGIN CONTROL

SGND

5% MARGIN

VIN

10V TO 20V

DUAL

CMSSH-3C3

SOT-323

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4601

392k

100k

RSET

13.3k

RfSET

130k

MARGIN CONTROL

COUT1

100µF

6.3V

SANYO POSCAP

4601 F17

VOUT

3.3V

10A

TRACK/SS CONTROL

C3 100pF

CIN

10µF

25V

×3

VIN

VOUT

fSETPGNDSGND

5% MARGIN

VIN

4.5V TO 16V REVIEW TEMPERATURE

DERATING CURVE

PGOOD

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Figure 19. 2-Phase Parallel, 1.5V at 24A Design

applicaTions inForMaTion

Figure 18. Typical 4.5V to 20V, 1.5V at 12A Design

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4601

392k

100k

RSET

40.2k

COUT1

100µF

6.3V

0.01µF

COUT2

470µF

6.3V

MARGIN

CONTROL

4601 F18

VOUT

1.5V

12A

CLOCK SYNC

C3 100pF

REFER TO

TABLE 2 FOR

DIFFERENT

OUTPUT

VOLTAGE

CIN

BULK

OPT CIN

10µF

25V

×3 CER

VIN

VOUT

fSETPGNDSGND

5% MARGIN

VIN

4.5V TO 20V REVIEW TEMPERATURE

DERATING CURVE

PGOOD

ON/OFF

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4601

392k

100k

VOUT

RSET

20k

22µF

6.3V

470µF

6.3V

VOUT

1.5V

24A

CLOCK SYNC

0° PHASE

CLOCK SYNC

180° PHASE

C6 220pF

MARGIN

CONTROL

TRACK/SS CONTROL

REFER TO

TABLE 2

REFER TO

TABLE 2

C5*

100µF

25V

0.1µF

10µF

25V

×2

VIN

fSETPGNDSGND

VOUT

VFB

MARG0

MARG1

VOUT_LCL

NC3

NC2

NC1

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4601-1

VIN

fSETPGNDSGND

MARGIN

LTC6908-1

VIN

4.5V TO 20V

PGOOD

2-PHASE

OSCILLATOR

100pF

22µF

6.3V

4601 F19

0.033µF

10µF

25V

×2

*C5 OPTIONAL TO REDUCE ANY LC RINGING.

NOT NEEDED FOR LOW INDUCTANCE PLANE CONNECTION

470µF

6.3V

V+

GND

SET

OUT1

OUT2

MOD

VOUT = 0.6V

RSET

60.4k

N+ RSET

N = NUMBER OF PHASES

118k

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

4-Phase, Four Outputs (3.3V, 2.5V, 1.8V and 1.5V) with Coincident Tracking

Typical applicaTions

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4601

392k

R11

100k

R10

100k

R18

19.1k

C16

22µF

6.3V

C14

10µF

25V

×3

3.3V

2.5V AT 12A

R23

60.4k

C15

470µF

6.3V

MARGIN

CONTROL

CLOCK SYNC 2

C18 100pF

REFER TO

TABLE 2

VIN

fSETPGNDSGND

5% MARGIN

PGOOD

8V TO 16V

ON/OFF

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4601

R14

392k

R16

100k

R15

100k

R13

40.2k

C16

22µF

6.3V

C14

10µF

25V

×3

3.3V

R25

60.4k

C15

470µF

6.3V

MARGIN

CONTROL

1.5V AT 12A

CLOCK SYNC 4

C24 100pF

REFER TO

TABLE 2

VIN

fSETPGNDSGND

5% MARGIN

PGOOD

8V TO 16V

ON/OFF

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4601

392k

100k

R12

30.1k

22µF

6.3V

10µF

25V

×3

3.3V

R21

60.4k

R19

30.1k

470µF

6.3V

MARGIN

CONTROL

1.8V AT 12A

CLOCK SYNC 3

C8 100pF

REFER TO

TABLE 2

VIN

fSETPGNDSGND

5% MARGIN

PGOOD

8V TO 16V

ON/OFF

R17

59k

C26

0.1µF

LTC6902

4-PHASE

OSCILLATOR

3.3V AT 10A

V+

DIV

OUT1

OUT2

SET

MOD

GND

OUT4

OUT3

VOUT

VFB

MARG0

MARG1

VOUT_LCL

DIFFVOUT

VOSNS+

VOSNS–

PGOOD

MPGM

RUN

COMP

INTVCC

DRVCC

TRACK/SSPLLIN

LTM4601

R27

392k

100k

13.3k

22µF

6.3V

0.15µF

10µF

25V

×3

C11

100µF

35V

OPT

C10

470µF

6.3V

MARGIN

CONTROL

TRACK/SS

CONTROL

CLOCK SYNC 1

C12 100pF

REFER TO

TABLE 2

VIN

3.3V

fSETPGNDSGND

5% MARGIN

PGOOD

8V TO 16V

ON/OFF

INTERMEDIATE

BUS

–48V

INPUT

R24

19.1k

R26

40.2k

3.3V

4601 TA02

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

5. PRIMARY DATUM -Z- IS SEATING PLANE

6. THE TOTAL NUMBER OF PADS: 118

7 PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994

2. ALL DIMENSIONS ARE IN MILLIMETERS

LAND DESIGNATION PER JESD MO-222, SPP-010

DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,

BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.

THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR

MARKED FEATURE

PACKAGE TOP VIEW

PIN “A1”

CORNER

aaa Z

PACKAGE BOTTOM VIEW

C(0.30)

PAD 1

SEE NOTES

SUGGESTED PCB LAYOUT

TOP VIEW

LGA 118 1212 REV B

LTMXXXXXX

µModule

TRAY PIN 1

BEVEL PACKAGE IN TRAY LOADING ORIENTATION

COMPONENT

PIN “A1”

DETAIL A

0.0000

0.630 ±0.025 Ø 118x

0.6350

1.9050

3.1750

4.4450

5.7150

6.9850

5.7150

4.4450

3.1750

1.9050

0.6350

6.9850

FGHM L JK E ABCD

DETAIL A

0.630 ±0.025 SQ. 118x

LGA Package

118-Lead (15mm × 15mm × 2.82mm)

(Reference LTC DWG # 05-08-1801 Rev B)

DETAIL B

PACKAGE SIDE VIEW

bbb Z

SYXeee

SYMBOL

aaa

bbb

eee

MIN

2.72

0.60

0.27

2.45

NOM

2.82

0.63

15.00

1.27

13.97

0.32

2.50

MAX

2.92

0.66

0.37

2.55

0.15

0.10

0.05

NOTES

DIMENSIONS

TOTAL NUMBER OF LGA PADS: 118

DETAIL B

SUBSTRATE

MOLD

CAP

SEE NOTES

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994

2. ALL DIMENSIONS ARE IN MILLIMETERS

BALL DESIGNATION PER JESD MS-028 AND JEP95

5. PRIMARY DATUM -Z- IS SEATING PLANE

6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu

DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,

BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.

THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR

MARKED FEATURE

PACKAGE TOP VIEW

PIN “A1”

CORNER

aaa Z

PACKAGE BOTTOM VIEW

PIN 1

SEE NOTES

SUGGESTED PCB LAYOUT

TOP VIEW

BGA 118 1112 REV B

LTMXXXXXX

µModule

TRAY PIN 1

BEVEL PACKAGE IN TRAY LOADING ORIENTATION

COMPONENT

PIN “A1”

DETAIL A

0.0000

DETAIL A

Øb (118 PLACES)

DETAIL B

SUBSTRATE

0.27 – 0.37

2.45 – 2.55

// bbb Z

ccc Z

DETAIL B

PACKAGE SIDE VIEW

MOLD

CAP

MX YZddd

MZeee

0.630 ±0.025 Ø 118x

SYMBOL

aaa

bbb

ccc

ddd

eee

MIN

3.22

0.50

2.72

0.60

NOM

3.42

0.60

2.82

0.75

0.63

15.0

1.27

13.97

MAX

3.62

0.70

2.92

0.90

0.66

0.15

0.10

0.20

0.30

0.15

NOTES

DIMENSIONS

TOTAL NUMBER OF BALLS: 118

BGA Package

118-Lead (15mm × 15mm × 3.42mm)

(Reference LTC DWG # 05-08-1903 Rev B)

0.6350

1.9050

3.1750

4.4450

5.7150

6.9850

5.7150

4.4450

3.1750

1.9050

0.6350

6.9850

FGHM L JK E ABCD

7 PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY

SEE NOTES

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

package DescripTion

Table 5. Pin Assignment (Arranged by Pin Number)

PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION

A1 VIN B1 VIN C1 VIN D1 PGND E1 PGND F1 PGND

A2 VIN B2 VIN C2 VIN D2 PGND E2 PGND F2 PGND

A3 VIN B3 VIN C3 VIN D3 PGND E3 PGND F3 PGND

A4 VIN B4 VIN C4 VIN D4 PGND E4 PGND F4 PGND

A5 VIN B5 VIN C5 VIN D5 PGND E5 PGND F5 PGND

A6 VIN B6 VIN C6 VIN D6 PGND E6 PGND F6 PGND

A7 INTVCC B7 – C7 – D7 – E7 PGND F7 PGND

A8 PLLIN B8 – C8 – D8 – E8 – F8 PGND

A9 TRACK/SS B9 – C9 – D9 – E9 – F9 PGND

A10 RUN B10 – C10 – D10 – E10 – F10 –

A11 COMP B11 – C11 – D11 – E11 – F11 –

A12 MPGM B12 fSET C12 MARG0 D12 MARG1 E12 DRVCC F12 VFB

PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION

G1 PGND H1 PGND J1 VOUT K1 VOUT L1 VOUT M1 VOUT

G2 PGND H2 PGND J2 VOUT K2 VOUT L2 VOUT M2 VOUT

G3 PGND H3 PGND J3 VOUT K3 VOUT L3 VOUT M3 VOUT

G4 PGND H4 PGND J4 VOUT K4 VOUT L4 VOUT M4 VOUT

G5 PGND H5 PGND J5 VOUT K5 VOUT L5 VOUT M5 VOUT

G6 PGND H6 PGND J6 VOUT K6 VOUT L6 VOUT M6 VOUT

G7 PGND H7 PGND J7 VOUT K7 VOUT L7 VOUT M7 VOUT

G8 PGND H8 PGND J8 VOUT K8 VOUT L8 VOUT M8 VOUT

G9 PGND H9 PGND J9 VOUT K9 VOUT L9 VOUT M9 VOUT

G10 – H10 – J10 VOUT K10 VOUT L10 VOUT M10 VOUT

G11 – H11 – J11 – K11 VOUT L11 VOUT M11 VOUT

G12 PGOOD H12 SGND J12 VOSNS+/NC2* K12 DIFFVOUT/NC2* L12 VOUT_LCL M12 VOSNS–/NC1*

*LTM4601-1 Only

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

PIN NAME

VIN

Table 6. Pin Assignment (Arranged by Pin Function)

PIN NAME

PGND

PIN NAME

J10

VOUT

K10

K11

VOUT

L10

L11

VOUT

M10

M11

VOUT

PIN NAME

A10

A11

A12

INTVCC

PLLIN

TRACK/SS

RUN

COMP

MPGM

B12 fSET

C12 MARG0

D12 MARG1

E12 DRVCC

F12 VFB

G12 PGOOD

H12 SGND

J12 VOSNS+/NC2*

K12 DIFFVOUT/NC3*

L12 VOUT_LCL

M12 VOSNS–/NC1*

*LTM4601-1 Only

PIN NAME

B10

B11

C10

C11

D10

D11

E10

E11

F10

F11

G10

G11

H10

H11

J11 -

package DescripTion

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

revision hisTory

REV DATE DESCRIPTION PAGE NUMBER

B 01/10 Added Note 5 2, 4

C 03/12 Revised entire data sheet to include the BGA package. 1 to 30

D 02/14 Added SnPb BGA option 1, 2

E 04/14 Added LTM4601-1 BGA package diagram and package information 2

(Revision history begins at Rev B)

LTM4601/LTM4601-1

4601fe

For more information www.linear.com/LTM4601

 LINEAR TECHNOLOGY CORPORATION 2007

LT 0414 REV E • PRINTED IN USA

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTM4601

package phoTo

This product contains technology licensed from Silicon Semiconductor Corporation. ®

PART NUMBER DESCRIPTION COMMENTS

LTM4628 26V, Dual 8A, DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 26.5V, 0.6V ≤ VOUT ≤ 5V, Remote Sense Ampliﬁer, Internal

Temperature Sensing Output, 15mm × 15mm × 4.32mm LGA

LTM4627 20V, 15A DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5V, PLL Input, VOUT Tracking, Remote Sense

Ampliﬁer, 15mm × 15mm × 4.32mm LGA

LTM4611 1.5VIN(MIN), 15A DC/DC Step-Down μModule

Regulator

1.5V ≤ VIN ≤ 5.5V, 0.8V ≤ VOUT ≤ 5V, PLL Input, Remote Sense Ampliﬁer,

VOUT Tracking, 15mm × 15mm × 4.32mm LGA

LTM4613 8A EN55022 Class B DC/DC Step-Down μModule

Regulator

5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, PLL Input, VOUT Tracking and Margining,

15mm × 15mm × 4.32mm LGA

LTM4601AHV 28V, 12A DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 28V, 0.6V ≤ VOUT ≤ 5V, PLL Input, Remote Sense Ampliﬁer,

VOUT Tracking and Margining, 15mm × 15mm × 2.82mm LGA or

15mm × 15mm × 3.42mm BGA

LTM4601A 20V

, 12A DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5V, PLL Input, Remote Sense Ampliﬁer,

VOUT Tracking and Margining, 15mm × 15mm × 2.82mm LGA or

15mm × 15mm × 3.42mm BGA

LTM8027 60V

, 4A DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 60V, 2.5V ≤ VOUT ≤ 24V, CLK Input, 15mm × 15mm × 4.32mm LGA

LTM8032 36V, 2A EN55022 Class B DC/DC Step-Down

μModule Regulator

3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, Synchronizable,

9mm × 15mm × 2.82mm LGA or 9mm × 15mm × 3.42mm BGA

LTM8061 32V

, 2A Step-Down μModule Battery Charger with

Programmable Input Current Limit

Compatible with Single Cell or Dual Cell Li-Ion or Li-Poly Battery Stacks

(4.1V, 4.2V, 8.2V, or 8.4V), 4.95V ≤ VIN ≤ 32V, C/10 or Adjustable Timer Charge

Termination, NTC Resistor Monitor Input, 9mm × 15mm × 4.32mm LGA

relaTeD parTs

15mm

2.82mm 15mm

15mm

3.42mm