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LM4809 Dual 105mW Headphone Amplifier with Active-
Low Shutdown Mode
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1FEATURES DESCRIPTION
The LM4809 is a dual audio power amplifier capable
2• Active-Low Shutdown Mode of delivering 105mW per channel of continuous
• "Click and Pop" Reduction Circuitry average power into a 16Ωload with 0.1% (THD+N)
• Low Shutdown Current from a 5V power supply.
• WSON, MSOP, and SOIC Surface Mount Boomer audio power amplifiers were designed
Packaging specifically to provide high quality output power with a
minimal amount of external components. Since the
• No Bootstrap Capacitors Required LM4809 does not require bootstrap capacitors or
• Unity-Gain Stable snubber networks, it is optimally suited for low-power
portable systems.
APPLICATIONS The unity-gain stable LM4809 can be configured by
• Headphone Amplifier external gain-setting resistors.
• Personal Computers The LM4809 features an externally controlled, active-
• Microphone Preamplifier low, micropower consumption shutdown mode, as
• PDA's well as an internal thermal shutdown protection
mechanism.
KEY SPECIFICATIONS
• THD+N at 1kHz at 105mW Continuous Average
Power into 16Ω0.1% (typ)
• THD+N at 1kHz at 70mW Continuous Average
Power into 32Ω0.1% (typ)
• Shutdown Current 0.4µA (typ)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2001–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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Typical Application
*Refer to Application Information for information concerning proper selection of the input and output coupling
capacitors.
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagrams
Top View Top View
Figure 2. VSSOP Package Figure 3. SOIC Package
See Package Number DGK0008A See Package Number D0008A
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1
2
6
5
3 4
8 7
Bypass
VDD VOUT2
VOUT1
VIN1
GND
VIN2
SHUTDOWN
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Top View Top View
Figure 4. WSON Package Figure 5. WSON Package
See Package Number NGL0008B See Package Number NGP0008A
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)(2)
Supply Voltage 6.0V
Storage Temperature −65°C to +150°C
ESD Susceptibility (3) 3.5kV
ESD Machine model (4) 250V
Junction Temperature (TJ) 150°C
Vapor Phase (60 sec.) 215°C
Soldering Information SOIC Package Infrared (15 sec.) 220°C
θJA (SOIC) 170°C/W
θJC (SOIC) 35°C/W
θJA (MSOP) 210°C/W
Thermal Resistance θJC (MSOP) 56°C/W
θJA (WSON) 117°C/W (5)
θJA (WSON) 150°C/W (6)
θJC (WSON) 15°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Human body model, 100pF discharged through a 1.5kΩresistor.
(4) Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200pF cap is charged to the specified voltage, then
discharged directly into the IC with no external series resistor (resistance of discharge path must be under 50Ohms).
(5) The given θJA is for an LM4809 packaged in an NGL0008B wit the Exposed-Dap soldered to a printed circuit board copper pad with an
area equivalent to that of the Exposed-Dap itself.
(6) The given θJA is for an LM4809 packaged in an NGL0008B with the Exposed-Dap not soldered to any printed circuit board copper.
Operating Ratings
Temperature Range TMIN ≤TA≤TMAX −40°C ≤TA≤85°C
Supply Voltage (VCC) 2.0V ≤VCC ≤5.5V
Electrical Characteristics VDD = 5V (1)(2)
The following specifications apply for VDD = 5V unless otherwise specified, limits apply to TA= 25°C.LM4809 Units
Parameter Test Conditions (Limits)
Typ (3) Limit (4)
VDD Supply Voltage 2.0 V (min)
5.5 V (max)
IDD Supply Current VIN = 0V, IO= 0A 1.4 3 mA (max)
ISD Shutdown Current VIN = 0V, VSHUTDOWN = GND 0.4 2 µA(max)
VOS Output Offset Voltage VIN = 0V 4.0 50 mV(max)
POOutput Power THD+N = 0.1%, f = 1kHz
RL= 16Ω105 mW
RL= 32Ω70 65 mW (min)
THD+N Total Harmonic Distortion PO= 50mW, RL= 32Ω0.3 %
f = 20Hz to 20kHz
Crosstalk Channel Separation RL= 32Ω; PO= 70mW 70 dB
PSRR Power Supply Rejection Ratio CB= 1.0µF; VRIPPLE = 200mVPP, 70 dB
f = 1kHz; Input terminated into 50Ω
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.
(3) Typical specifications are specified at +25OC and represent the most likely parametric norm.
(4) Datasheet min/max specification limits are ensured by design, test, or statistical analysis.
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Electrical Characteristics VDD = 5V (1)(2) (continued)
The following specifications apply for VDD = 5V unless otherwise specified, limits apply to TA= 25°C.LM4809 Units
Parameter Test Conditions (Limits)
Typ (3) Limit (4)
VSDIH Shutdown Voltage Input High 0.8 x VDD V (min)
VSDIL Shutdown Voltage Input Low 0.2 x VDD V (max)
Electrical Characteristics VDD = 3.3V (1)(2)
The following specifications apply for VDD = 3.3V unless otherwise specified, limits apply to TA= 25°C.
LM4809 Units
Parameter Test Conditions (Limits)
Typ (3) Limit (4)
IDD Supply Current VIN = 0V, IO= 0A 1.1 mA
ISD Shutdown Current VIN = 0V, VSHUTDOWN = GND 0.4 µA
VOS Output Offset Voltage VIN = 0V 4.0 mV
POOutput Power THD+N = 0.1%, f = 1kHz
RL= 16Ω40 mW
RL= 32Ω28 mW
THD+N Total Harmonic Distortion PO= 25mW, RL= 32Ω0.4 %
f = 20Hz to 20kHz
Crosstalk Channel Separation RL= 32Ω; PO= 25mW 70 dB
PSRR Power Supply Rejection Ratio CB= 1.0µF; VRIPPLE = 200mVPP, 70 dB
f = 1kHz; Input terminated into 50Ω
VSDIH Shutdown Voltage Input High 0.8 x VDD V (min)
VSDIL Shutdown Voltage Input Low 0.2 x VDD V (max)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.
(3) Typical specifications are specified at +25OC and represent the most likely parametric norm.
(4) Datasheet min/max specification limits are ensured by design, test, or statistical analysis.
Electrical Characteristics VDD = 2.6V (1)(2)
The following specifications apply for VDD = 2.6V unless otherwise specified, limits apply to TA= 25°C.
LM4809 Units
Parameter Test Conditions (Limits)
Typ (3) Limit (4)
IDD Supply Current VIN = 0V, IO= 0A 0.9 mA
ISD Shutdown Current VIN = 0V, VSHUTDOWN = GND 0.2 µA
VOS Output Offset Voltage VIN = 0V 4.0 mV
POOutput Power THD+N = 0.1%, f = 1kHz
RL= 16Ω20 mW
RL= 32Ω16 mW
THD+N Total Harmonic Distortion PO= 15mW, RL= 32Ω0.6 %
f = 20Hz to 20kHz
Crosstalk Channel Separation RL= 32Ω; PO= 15mW 70 dB
PSRR Power Supply Rejection Ratio CB= 1.0µF; VRIPPLE = 200mVPP, 70 dB
f = 1kHz; Input terminated into 50Ω
VSDIH Shutdown Voltage Input High 0.8 x VDD V (min)
VSDIL Shutdown Voltage Input Low 0.2 x VDD V (max)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.
(3) Typical specifications are specified at +25OC and represent the most likely parametric norm.
(4) Datasheet min/max specification limits are ensured by design, test, or statistical analysis.
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External Components Description
Components Functional Description (See Figure 1)
The inverting input resistance, along with Rf, set the closed-loop gain. Ri, along with Ci, form a high pass filter with fc=
1. Ri1/(2πRiCi).
The input coupling capacitor blocks DC voltage at the amplifier's input terminals. Ci, along with Ri, create a highpass filter
2. Ciwith fC= 1/(2πRiCi). Refer to the section, Selecting Proper External Components, for an explanation of determining the
value of Ci.
3. RfThe feedback resistance, along with Ri, set closed-loop gain.
This is the supply bypass capacitor. It provides power supply filtering. Refer to the Application Information section for
4. CSproper placement and selection of the supply bypass capacitor.
This is the BYPASS pin capacitor. It provides half-supply filtering. Refer to the section, Selecting Proper External
5. CBComponents, for information concerning proper placement and selection of CB.
This is the output coupling capacitor. It blocks the DC voltage at the amplifier's output and forms a high pass filter with RLat
6. COfO= 1/(2πRLCO)
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Typical Performance Characteristics
THD+N THD+N
vs vs
Frequency Frequency
Figure 6. Figure 7.
THD+N THD+N
vs vs
Frequency Frequency
Figure 8. Figure 9.
THD+N THD+N
vs vs
Frequency Frequency
Figure 10. Figure 11.
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Typical Performance Characteristics (continued)
THD+N THD+N
vs vs
Frequency Frequency
Figure 12. Figure 13.
THD+N THD+N
vs vs
Frequency Frequency
Figure 14. Figure 15.
THD+N THD+N
vs vs
Output Power Output Power
Figure 16. Figure 17.
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Typical Performance Characteristics (continued)
THD+N THD+N
vs vs
Output Power Output Power
Figure 18. Figure 19.
THD+N THD+N
vs vs
Output Power Output Power
Figure 20. Figure 21.
THD+N THD+N
vs vs
Output Power Output Power
Figure 22. Figure 23.
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Typical Performance Characteristics (continued)
THD+N
vs Output Power vs
Output Power Load Resistance
Figure 24. Figure 25.
Output Power vs Output Power vs
Load Resistance Load Resistance
Figure 26. Figure 27.
Output Power vs Output Power vs
Supply Voltage Power Supply
Figure 28. Figure 29.
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Typical Performance Characteristics (continued)
Output Power vs Dropout Voltage vs
Power Supply Supply Voltage
Figure 30. Figure 31.
Power Dissipation vs Power Dissipation vs
Output Power Output Power
Figure 32. Figure 33.
Power Dissipation vs
Output Power Channel Separation
Figure 34. Figure 35.
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Typical Performance Characteristics (continued)
Noise Floor Power Supply Rejection Ratio
Figure 36. Figure 37.
Open Loop Open Loop
Frequency Response Frequency Response
Figure 38. Figure 39.
Open Loop Supply Current vs
Frequency Response Supply Voltage
Figure 40. Figure 41.
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APPLICATION INFORMATION
MICRO-POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the LM4809's shutdown function. Activate micro-power
shutdown by applying a logic low voltage to the SHUTDOWN pin. The logic threshold is typically VDD/2. When
active, the LM4809's micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply
current. The low 0.4µA typical shutdown current is achieved by applying a voltage that is as near as GND as
possible to the SHUTDOWN pin. A voltage that is above GND may increase the shutdown current.
There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw
switch, a microprocessor, or a microcontroller. When using a switch, connect an external 100kΩpull-down
resistor between the SHUTDOWN pin and GND. Connect the switch between the SHUTDOWN pin and VDD.
Select normal amplifier operation by closing the switch. Opening the switch connects the SHUTDOWN pin to
GND through the pull-down resistor, activating micro-power shutdown. The switch and resistor ensure that the
SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a
microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin. Driving the SHUTDOWN
pin with active circuitry eliminates the pull-down resistor.
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATION
The LM4809's exposed-Dap (die attach paddle) package (LD or LQ) provides a low thermal resistance between
the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to
the surrounding PCB copper traces, ground plane, and surrounding air.
The LD or LQ package should have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad
may be connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink,
and radiation area.
However, since the LM4809 is designed for headphone applications, connecting a copper plane to the DAP's
PCB copper pad is not required. Figure 34 in Typical Performance Characteristics shows that the maximum
power dissipated is just 45mW per amplifier with a 5V power supply and a 32Ωload.
Further detailed and specific information concerning PCB layout, fabrication, and mounting an NGL0008B or
NGP0008A package is available from Texas Instruments' Package Engineering Group under application note
AN1187.
POWER DISSIPATION
Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to
ensure a successful design. Equation 1 states the maximum power dissipation point for a single-ended amplifier
operating at a given supply voltage and driving a specified output load.
PDMAX = (VDD)2/ (2π2RL) (1)
Since the LM4809 has two operational amplifiers in one package, the maximum internal power dissipation point
is twice that of the number which results from Equation 1. Even with the large internal power dissipation, the
LM4809 does not require heat sinking over a large range of ambient temperature. From Equation 1, assuming a
5V power supply and a 32Ωload, the maximum power dissipation point is 40mW per amplifier. Thus the
maximum package dissipation point is 80mW. The maximum power dissipation point obtained must not be
greater than the power dissipation that results from Equation 2:
PDMAX = (TJMAX −TA) / θJA (2)
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For package MUA08A, θJA = 210°C/W. TJMAX = 150°C for the LM4809. Depending on the ambient temperature,
TA, of the system surroundings, Equation 2 can be used to find the maximum internal power dissipation
supported by the IC packaging. If the result of Equation 1 is greater than that of Equation 2, then either the
supply voltage must be decreased, the load impedance increased or TAreduced. For the typical application of a
5V power supply, with a 32Ωload, the maximum ambient temperature possible without violating the maximum
junction temperature is approximately 133.2°C provided that device operation is around the maximum power
dissipation point. Power dissipation is a function of output power and thus, if typical operation is not around the
maximum power dissipation point, the ambient temperature may be increased accordingly. Refer to the Typical
Performance Characteristics curves for power dissipation information for lower output powers.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. Applications that employ a 5V regulator typically use a 10µF in parallel with a 0.1µF filter capacitors to
stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response.
However, their presence does not eliminate the need for a local 1.0µF tantalum bypass capacitance connected
between the LM4809's supply pins and ground. Keep the length of leads and traces that connect capacitors
between the LM4809's power supply pin and ground as short as possible. Connecting a 4.7µF capacitor, CB,
between the BYPASS pin and ground improves the internal bias voltage's stability and improves the amplifier's
PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however,
increases the amplifier's turn-on time. The selection of bypass capacitor values, especially CB, depends on
desired PSRR requirements, click and pop performance (as explained in the section, Selecting Proper External
Components), system cost, and size constraints.
SELECTING PROPER EXTERNAL COMPONENTS
Optimizing the LM4809's performance requires properly selecting external components. Though the LM4809
operates well when using external components with wide tolerances, best performance is achieved by optimizing
component values.
The LM4809 is unity-gain stable, giving a designer maximum design flexibility. The gain should be set to no more
than a given application requires. This allows the amplifier to achieve minimum THD+N and maximum signal-to-
noise ratio. These parameters are compromised as the closed-loop gain increases. However, low gain demands
input signals with greater voltage swings to achieve maximum output power. Fortunately, many signal sources
such as audio CODECs have outputs of 1VRMS (2.83VP-P). Please refer to the Audio Power Amplifier Design
section for more information on selecting the proper gain.
Input and Output Capacitor Value Selection
Amplifying the lowest audio frequencies requires high value input and output coupling capacitors (CIand COin
Figure 1). A high value capacitor can be expensive and may compromise space efficiency in portable designs. In
many cases, however, the speakers used in portable systems, whether internal or external, have little ability to
reproduce signals below 150Hz. Applications using speakers with this limited frequency response reap little
improvement by using high value input and output capacitors.
Besides affecting system cost and size, Cihas an effect on the LM4809's click and pop performance. The
magnitude of the pop is directly proportional to the input capacitor's size. Thus, pops can be minimized by
selecting an input capacitor value that is no higher than necessary to meet the desired −3dB frequency. Please
refer to the Optimizing Click and Pop Reduction Performance section for a more detailed discussion on click and
pop performance.
As shown in Figure 1, the input resistor, RIand the input capacitor, CI, produce a −3dB high pass filter cutoff
frequency that is found using Equation 3. In addition, the output load RL, and the output capacitor CO, produce a
-3db high pass filter cutoff frequency defined by Equation 4.
fI-3db=1/2πRICI(3)
fO-3db=1/2πRLCO(4)
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Also, careful consideration must be taken in selecting a certain type of capacitor to be used in the system.
Different types of capacitors (tantalum, electrolytic, ceramic) have unique performance characteristics and may
affect overall system performance.
Bypass Capacitor Value Selection
Besides minimizing the input capacitor size, careful consideration should be paid to the value of CB, the capacitor
connected to the BYPASS pin. Since CBdetermines how fast the LM4809 settles to quiescent operation, its
value is critical when minimizing turn-on pops. The slower the LM4809's outputs ramp to their quiescent DC
voltage (nominally 1/2 VDD), the smaller the turn-on pop. Choosing CBequal to 4.7µF along with a small value of
Ci(in the range of 0.1µF to 0.47µF), produces a click-less and pop-less shutdown function. As discussed above,
choosing Cino larger than necessary for the desired bandwith helps minimize clicks and pops.
OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE
The LM4809 contains circuitry that minimizes turn-on and shutdown transients or “clicks and pop”. For this
discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated.
During turn-on, the LM4809's internal amplifiers are configured as unity gain buffers. An internal current source
charges up the capacitor on the BYPASS pin in a controlled, linear manner. The gain of the internal amplifiers
remains unity until the voltage on the BYPASS pin reaches 1/2 VDD . As soon as the voltage on the BYPASS pin
is stable, the device becomes fully operational. During device turn-on, a transient (pop) is created from a voltage
difference between the input and output of the amplifier as the voltage on the BYPASS pin reaches 1/2 VDD. For
this discussion, the input of the amplifier refers to the node between RIand CI. Ideally, the input and output track
the voltage applied to the BYPASS pin. During turn-on, the buffer-configured amplifier output charges the input
capacitor, CI, through the input resistor, RI. This input resistor delays the charging time of CIthereby causing the
voltage difference between the input and output that results in a transient (pop). Higher value capacitors need
more time to reach a quiescent DC voltage (usually 1/2 VDD) when charged with a fixed current. Decreasing the
value of CIand RIwill minimize turn-on pops at the expense of the desired -3dB frequency.
Although the BYPASS pin current cannot be modified, changing the size of CBalters the device's turn-on time
and the magnitude of “clicks and pops”. Increasing the value of CBreduces the magnitude of turn-on pops.
However, this presents a tradeoff: as the size of CBincreases, the turn-on time increases. There is a linear
relationship between the size of CBand the turn-on time. Here are some typical turn-on times for various values
of CB:
CBTON
0.1µF 80ms
0.22µF 170ms
0.33µF 270ms
0.47µF 370ms
0.68µF 490ms
1.0µF 920ms
2.2µF 1.8sec
3.3µF 2.8sec
4.7µF 3.4sec
10µF 7.7sec
In order eliminate “clicks and pops”, all capacitors must be discharged before turn-on. Rapidly switching VDD may
not allow the capacitors to fully discharge, which may cause “clicks and pops”. In a single-ended configuration,
the output is coupled to the load by CO. This capacitor usually has a high value. COdischarges through internal
20kΩresistors. Depending on the size of CO, the discharge time constant can be relatively large. To reduce
transients in single-ended mode, an external 1kΩ–5kΩresistor can be placed in parallel with the internal 20kΩ
resistor. The tradeoff for using this resistor is increased quiescent current.
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AUDIO POWER AMPLIFIER DESIGN
Design a Dual 70mW/32ΩAudio Amplifier
Given:
Power Output 70 mW
Load Impedance 32Ω
Input Level 1 Vrms (max)
Input Impedance 20kΩ
Bandwidth 100 Hz–20 kHz ± 0.50dB
The design begins by specifying the minimum supply voltage necessary to obtain the specified output power.
One way to find the minimum supply voltage is to use Figure 28 in the Typical Performance Characteristics
section. Another way, using Equation 5, is to calculate the peak output voltage necessary to achieve the desired
output power for a given load impedance. To account for the amplifier's dropout voltage, two additional voltages,
based on Figure 31 in Typical Performance Characteristics , must be added to the result obtained by
Equation 5. For a single-ended application, the result is Equation 6.
(5)
VDD ≥(2VOPEAK + (VODTOP + VODBOT)) (6)
Figure 28 for a 32Ωload indicates a minimum supply voltage of 4.8V. This is easily met by the commonly used
5V supply voltage. The additional voltage creates the benefit of headroom, allowing the LM4809 to produce peak
output power in excess of 70mW without clipping or other audible distortion. The choice of supply voltage must
also not create a situation that violates maximum power dissipation as explained above in the Power
Dissipation section. Remember that the maximum power dissipation point from Equation 1 must be multiplied by
two since there are two independent amplifiers inside the package. Once the power dissipation equations have
been addressed, the required gain can be determined from Equation 7.
(7)
Thus, a minimum gain of 1.497 allows the LM4809 to reach full output swing and maintain low noise and THD+N
perfromance. For this example, let AV=1.5.
The amplifiers overall gain is set using the input (Ri) and feedback (Rf) resistors. With the desired input
impedance set at 20kΩ, the feedback resistor is found using Equation 8.
AV= Rf/Ri(8)
The value of Rfis 30kΩ.
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The last step in this design is setting the amplifier's −3db frequency bandwidth. To achieve the desired ±0.25dB
pass band magnitude variation limit, the low frequency response must extend to at lease one−fifth the lower
bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit. The
gain variation for both response limits is 0.17dB, well within the ±0.25dB desired limit. The results are an
fL= 100Hz/5 = 20Hz (9)
and a
fH= 20kHz∗5 = 100kHz (10)
As stated in the Selecting Proper External Components section, both Riin conjunction with Ci, and Cowith RL,
create first order highpass filters. Thus to obtain the desired low frequency response of 100Hz within ±0.5dB,
both poles must be taken into consideration. The combination of two single order filters at the same frequency
forms a second order response. This results in a signal which is down 0.34dB at five times away from the single
order filter −3dB point. Thus, a frequency of 20Hz is used in the following equations to ensure that the response
is better than 0.5dB down at 100Hz.
Ci≥1 / (2π* 20kΩ* 20Hz) = 0.397µF; use 0.39µF. (11)
Co≥1 / (2π* 32Ω* 20Hz) = 249µF; use 330µF. (12)
The high frequency pole is determined by the product of the desired high frequency pole, fH, and the closed-loop
gain, AV. With a closed-loop gain of 1.5 and fH= 100kHz, the resulting GBWP = 150kHz which is much smaller
than the LM4809's GBWP of 900kHz. This figure displays that if a designer has a need to design an amplifier
with a higher gain, the LM4809 can still be used without running into bandwidth limitations.
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM4809 LM4809LQBD
LM4809, LM4809LQBD
SNAS126F –FEBRUARY 2001–REVISED APRIL 2013
www.ti.com
Demonstration Board Schematic
Figure 42. LM4809 Demonstration Board Schematic
Demonstration Board Layout
Figure 43. Recommended DGK0008A PC Board Layout
Component-Side Silkscreen
18 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LM4809 LM4809LQBD
LM4809, LM4809LQBD
www.ti.com
SNAS126F –FEBRUARY 2001–REVISED APRIL 2013
Figure 44. Recommended DGK0008A PC Board Layout
Component-Side Layout
Figure 45. Recommended DGK0008A PC Board Layout
Bottom-Side Layout
Figure 46. Recommended NGL0008B PC Board Layout
Component-Side Silkscreen
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LM4809 LM4809LQBD
LM4809, LM4809LQBD
SNAS126F –FEBRUARY 2001–REVISED APRIL 2013
www.ti.com
Figure 47. Recommended NGL0008B PC Board Layout
Component-Side Layout
Figure 48. Recommended NGL0008B PC Board Layout
Bottom-Side Layout
Figure 49. Recommended NGP0008A PC Board Layout
Component-Side Silkscreen
20 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LM4809 LM4809LQBD
LM4809, LM4809LQBD
www.ti.com
SNAS126F –FEBRUARY 2001–REVISED APRIL 2013
Figure 50. Recommended NGP0008A PC Board Layout
Component-Side Layout
Figure 51. Recommended NGP0008A PC Board Layout
Bottom-Side Layout
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: LM4809 LM4809LQBD
LM4809, LM4809LQBD
SNAS126F –FEBRUARY 2001–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision E (April 2013) to Revision F Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 21
22 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LM4809 LM4809LQBD
PACKAGE OPTION ADDENDUM
www.ti.com 9-Aug-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM4809LDX/NOPB ACTIVE WSON NGL 8 4500 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 G09
LM4809LQ/NOPB ACTIVE WQFN NGP 8 TBD Call TI Call TI -40 to 85 GB3
LM4809MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 G09
LM4809MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 G09
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 9-Aug-2013
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM4809LDX/NOPB WSON NGL 8 4500 330.0 12.4 2.8 2.8 1.0 8.0 12.0 Q1
LM4809MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM4809MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 12-Aug-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM4809LDX/NOPB WSON NGL 8 4500 367.0 367.0 35.0
LM4809MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LM4809MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 12-Aug-2013
Pack Materials-Page 2
MECHANICAL DATA
NGL0008B
www.ti.com
LDA08B (Rev B)
MECHANICAL DATA
NGP0008A
www.ti.com
LQB08A (Rev B)
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