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Reversible Motor Drivers for Brush Motors
0.5A or Less Reversible
Motor Drivers (Single Moter)
BH6578FVM,BD7931F
Description
The BH6578FVM and BD7931F are reversible motor drivers with a wide output dynamic range, with power MOS used for the
output transistor. The motor drivers can set the output mode to four modes of normal rotation, reverse rotation, stop (idling),
and braking in accordance with input logic (2 inputs).
Features
1) Wide dynamic range loading driver with MOS output, Ron = 1.0 (Top+Bottom)
2) With loading driver voltage setting terminal
3) Built-in thermal shutdown circuit (TSD)
4) MSOP8 package (BH6578FVM)
5) SOP8 package (BD7931F)
Applications
Tray loading of CD/DVD, applications using DC motors
Absolute maximum ratings (Ta=25)
Parameter Symbol Ratings Unit
BH6578FVM BD7931F
Supply Voltage Vcc 7 15 V
Power dissipation Pd 0.55 * 0.69** W
Operating temperature Topr -35+85 -4085
Storage temperature Tstg -55+150
Output current Iout 500 mA
Junction temperature Tjmax 150
* When 70 mmx70 mmx1.6 mm thick glass epoxy substrate with less than 3% copper foil occupancy ratio is mounted.
When used at Ta=25°C or higher, derated at 4.4 mW/°C.
** When 70 mmx70 mmx1.6 mm thick glass epoxy substrate with less than 3% copper foil occupancy ratio is mounted.
When used at Ta=25°C or higher, derated at 5.5 mW/°C.
Recommended operating range
Parameter Symbol Range Unit
BH6578FVM BD7931F
Supply voltage Vcc 4.5~5.5 4.514 V
Truth table
BH6578FVM,BD7931F
INPUT OUTPUT
Function
INFWD INREV OUT+ OUT-
L L Hi Z Hi Z High Impedance
L H L H REV mode
H L H L FWD mode
H H L L Brake mode
HizHi-impedance
No.11008EBT05
BH6578FVM,BD7931F
Technical Note
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Electrical characteristics
BH6578FVM(Unless otherwise specified, Ta=25, Vcc=5V)
Parameter Symbol
Limits. Unit Conditions
Min. Typ. Max.
Standby current ICC1 - 0.4 0.8 mA No load
(Loading Driver)
Output offset voltage VOFSL -15 0 +15 mV Brake mode
Input threshold voltage H VIH 2.0 Vcc V
Input threshold voltage L VIL GND 0.5 V
ON resistance RON 1.0 1.8 Io=500mA,Top+Bottom
Voltage gain (Loading) GVLD 4.5 6.0 7.5 dB *1
Voltage gain difference (Loading) GVLD -2.0 0 2.0 dB
Input bias current IINL 86 120 µA FIN=5V,RIN=5V
LDCONT bias current ILDC 300 nA CONT=2V
* No radiation-resistant design is adopted for the present product.
*1. Let V01 denote output-to-output voltage when CONT=1V and V02 denote output-to-output voltage
when CONT=3.5V, voltage gain can be expressed by the following equation:GVLD=20log|(V02-V01)/2.5|
BD7931F(Unless otherwise specified, Ta=25, Vcc=8V)
Parameter Symbol Limits. Unit Conditions
Min. Typ. Max.
Standby current ICC1 - 0 5 µA
Supply current 1 ICC2 - 1.1 2.2 mA
FIN=5V,RIN=0V
Supply current 2 ICC3 - 0.8 1.6 mA
FIN=RIN=5V
(Loading Driver)
Output offset voltage VOFSL -35 0 +35 mV Brake mode
Input threshold voltage H VIH 2.0 Vcc V
Input threshold voltage L VIL GND 0.5 V
ON resistance RON 1.0 1.8 Io=500mA,Top+Bottom
Voltage gain (Loading) GVLD 4.0 6.0 8.0 dB *2
Voltage gain difference (Loading) GVLD -2.0 0 2.0 dB
Input bias current IINL 165 250 µA FIN=5V,RIN=5V
LDCONT bias current ILDC 300 nA CONT=5V
* No radiation-resistant design is adopted for the present product.
*1. Let V01 denote output-to-output voltage when CONT=1V and V02 denote output-to-output voltage when CONT=3.5V, voltage gain can be expressed by
the following equation:GVLD=20log|(V02-V01)/2.5|
BH6578FVM,BD7931F
Technical Note
3/8
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0.0
0.1
0.2
0.3
0.4
0 100 200 300 400 500
Load current[mA]
Loss voltage[V
]
85
25
-35
0.0
0.1
0.2
0.3
0.4
0 100 200 300 400 500
Load current[mA]
Loss voltage[V
]
85
25
-35
0
1
2
3
4
5
012345
Input voltag e : LD CONT[V]
Output voltage[
V
-35
25
85
0.0
0.1
0.2
0.3
0.4
0 100 200 300 400 500
Load current[mA]
Loss voltage[V
]
0.0
0.1
0.2
0.3
0.4
0 100 200 300 400 500
Load current[mA]
Loss voltage[V
]
0
2
4
6
8
10
012 345
Input voltag e : LD CONT[V]
Output voltage[
V
-0.4
-0.3
-0.2
-0.1
0.0
0 100 200 300 400 500
Load current[mA]
Loss voltage[V
]
-0.4
-0.3
-0.2
-0.1
0.0
0 100 200 300 400 500
Load current[mA]
Loss voltage[V
]
-35
25
85
-0.4
-0.3
-0.2
-0.1
0.0
0 100 200 300 400 500
Load current[mA]
Loss voltage[V
]
-0.4
-0.3
-0.2
-0.1
0.0
0 100 200 300 400 500
Load current[mA]
Loss voltage[V
]
-10
-8
-6
-4
-2
0
012345
Input voltag e : LDCONT[V]
Output voltage[
V
-5
-4
-3
-2
-1
0
01 23 45
Input voltag e : LDCONT[V]
Output voltage[
V
40
25
85
-40
25
85
85
25
-40
Reference data
Fig.1 Output loss voltage L(BH6578FVM) Fig.2 Output loss voltage L(BH6578FVM) Fig.3 Voltage gain(BH6578FVM)
Vcc=5V, CONT=OPEN Vcc=5V, CONT=OPEN Vcc=5V, CONT=SWEEP
FWD mode REV mode RL=8Ω+47µH
Fig.4 Output loss voltage H(BH6578FVM) Fig.5 Output loss voltage H(BH6578FVM) Fig.6 Voltage gain (BH6578FVM)
Vcc=5V, CONT=OPEN Vcc=5V, CONT=OPEN Vcc=5V, CONT=SWEEP
FWD mode REV mode RL=8Ω+47µH
Fig.7 Output loss voltage L(BD7931F) Fig.8 Output loss voltage L(BD7931F) Fig.9 Voltage gain (BD7931F)
Vcc=8V, CONT=OPEN Vcc=8V, CONT=OPEN Vcc=8V, CONT=SWEEP
FWD mode REV mode RL=20Ω+47µH
Fig.10 Output loss voltage H(BD7931F) Fig.11 Output loss voltage H(BD7931F) Fig.12 Voltage gain(BD7931F)
Vcc=8V, CONT=OPEN Vcc=8V, CONT=OPEN Vcc=8V, CONT=SWEEP
FWD mode REV mode RL=20Ω+47µH
-35
25
85
85
25
-35
85
25
-35
85
25
-35
40
25
85
BH6578FVM,BD7931F
Technical Note
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Thermal derating curves
BH6578FVM BD7931F
*when 70 mmx70 mmx1.6 mm thick glass epoxy substrate with less than 3% copper foil occupancy ratio is mounted.
Block diagram, applied circuit diagram example
BH6578FVM, BD7931F (in common)
T. S . D : Thermal shutdown
Fig.13
Pin descriptions
Pin No. Pin Name Function Pin No. PinName Function
1 Vcc Supply voltage 5 GND_S Signal ground
2 OUT+ FWD output 6 LDCONT Loading driver voltage setting pin
3 OUT- REV output 7 INREV REV input
4 GND Power ground 8 INFWD FWD input
A
MBIENT TEMPERATURE : Ta []
0
025 50 75 100 125 150
0.2
0.4
0.6
175
0.8
Pd [W]
Pd : Power Dissipation
0
0 25 50 75 100 125 150
0.2
0.4
0.6
Pd [W]
175
A
MBIENT TEMPERATURE : Ta []
Pd : Power Dissipation
0.8
1234
8 7 6 5
Control
Logic LDCONT
T.S . D
+ -
FWD IN REV IN LDCONT
Vcc
FRPRE
GND
POW
GND
POWG
PREGND
POW CMOS
H-Bridge
M
Bypass
capacitor
0.1
µ
F
85 85
BH6578FVM,BD7931F
Technical Note
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Interfaces
BH6578FVM BD7931F
Fig.14 Fig.17
Fig.15 Fig.16 Fig.18 Fig.19
Operations
(1) CONTROL LOGIC
Operation of each mode is carried out as follows:
When INFWD is “H” and INREV is “L,” the normal rotation mode is achieved and current flows from OUT+ to OUT-.
When both INFWD and INREV are “H,” the brake mode is achieved. Operation in such event is described as follows:
the top-side transistor turns OFF to stop supplying motor drive current, the bottom-side transistor turns ON to absorb
reverse EMF of motor and applies brake to motor. When both INFWD and INREV are “L,” OUT+ and OUT- potentials
become open and the motor stops.
(2) LOADING CONT
Controlling the output voltage can vary voltage applied to the motor and can control the motor speed. By the voltage
entered to the CONT terminal, the output H voltage can be controlled (gain 6dB Typ.). Even if the voltage entered is
increased more than necessary (Vcc Max), the output voltage never exceeds the power supply voltage.
LDCONT
OUT+/OUT- FIN/RIN
LDCONT
OUT+/OUT- INFWD/INREV
50K
50K
200K
7
8
50K
50K
50K
50K
200K
7
8
VCC VCC
6
10K
49.6K
VCC
6
39K
10K
2 3
VCC
23
VCC
BH6578FVM,BD7931F
Technical Note
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Notes for use
(1) Absolute maximum ratings
In the event that applied voltage (VCC, VM), working temperature range (Topr), and other absolute maximum rating are
exceeded, the IC may be destroyed. Because it is unable to identify the short-circuit mode, open mode, etc., if any
special mode is assumed, which exceeds the absolute maximum rating, physical safety measures are requested to be
taken, such as fuses, etc.
(2) Reverse connection of power supply connector
Reverse connection of power supply connector may destroy the IC. Take necessary measures to protect the IC from
reverse connection breakage such as externally inserting diodes across power supply and IC power supply terminal as
well as across power supply and motor coil.
(3) Power supply line
Because return of current regenerated by reverse EMF of a motor occurs, take necessary measures such as inserting
capacitors across the power supply and GND as a path for regenerated current, and determine the capacity value after
thoroughly confirming that there would be no problems in various characteristics such as capacitance drop at low
temperature which may occur with electrolytic capacitors.
(4) Ground potential
Keep the GND terminal potential to the minimum potential under any operating condition. In addition, check if there is
actually any terminal which provides voltage below GND including transient phenomena.
(5) Thermal design
Consider permissible dissipation (Pd) under actual working condition and carry out thermal design with sufficient margin
provided.
(6) Terminal-to-terminal short-circuit and erroneous mounting
When the present IC is mounted to a printed circuit board, take utmost care to direction of IC and displacement. In the
event that the IC is mounted erroneously, IC may be destroyed. In the event of short-circuit caused by foreign matter
that enters in a clearance between outputs or output and power-GND, the IC may be destroyed.
(7) Operation in strong electromagnetic field
The use of the present IC in the strong electromagnetic field may result in maloperation, to which care must be taken.
(8) ASO
When IC is used, design in such a manner that the output transistor to a motor does not exceed absolute maximum
ratings and ASO.
(9) Thermal shutdown circuit (TSD) (common)
When junction temperature (Tj) becomes thermal shutdown ON temperature 175°C, the thermal shutdown circuit (TSD
circuit) is activated and driver output current is shorted. There is 25°C temperature hysteresis. The thermal shutdown
protection circuit is first and foremost intended for interrupt IC from thermal runaway, and is not intended to protect and
warrant the IC. Consequently, never attempt to continuously use the IC after this circuit is activated or to use the circuit
with the activation of the circuit premised.
(10) Capacitor across output and GND
In the event a large capacitor is connected across output and GND, when Vcc and VIN are short-circuited with 0V or
GND for some kind of reasons, current charged in the capacitor flows into the output and may destroy the IC. Use a
capacitor smaller than 0.1 µF between output and GND.
(11) Inspection by set substrate
In the event a capacitor is connected to a pin with low impedance at the time of inspection with a set substrate, there is a
fear of applying stress to the IC. Therefore, be sure to discharge electricity for every process. Furthermore, when the
set substrate is connected to a jig in the inspection process, be sure to turn OFF power supply to connect the jig and be
sure to turn OFF power supply to remove the jig. As electrostatic measures, provide grounding in the assembly
process, and take utmost care in transportation and storage.
BH6578FVM,BD7931F
Technical Note
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(12) IC terminal input
The present IC is a monolithic IC and has P+ isolation and a P substrate between elements to separate elements.
With this P layer and N layer of each element, PN junction is formed, and various parasitic elements are formed.
For example, when resistors and transistors are connected to terminals as is the case of Fig.20, where in the case of
resistor, the potential difference satisfies the relation of ground (GND)>(terminal A), and in the case of transistor (NPN),
the potential difference satisfies the relation of ground (GND)>(terminal B), PN junction works as a diode.
Furthermore, in the case of transistor (NPN), a parasitic NPN transistor operates by the N-layer of other elements
adjacent to the parasitic diode. The parasitic element is inevitably formed because of the IC construction.
The operation of the parasitic element gives rise to mutual interference between circuits and results in malfunction, and
eventually, breakdown. Consequently, take utmost care not to use the IC to operate the parasitic element such as
applying voltage lower than GND (P substrate) to the input terminal.
In addition, when the power supply voltage is not applied to IC, do not apply voltage to the input terminal, either.
Similarly, when the power supply voltage is applied, each input terminals shall be the voltage below the power supply
voltage or within the guaranteed values of electrical properties.
(13) GND wiring pattern
If there are a small signal GND and a high current GND, it is recommended to separate the patterns for the high current
GND and the small signal GND and provide a proper grounding to the reference point of the set not to affect the voltage
at the small signal GND with the change in voltage due to resistance component of pattern wiring and high current. Also for
GND wiring pattern of the component externally connected, pay special attention not to cause undesirable change to it.
Resistor Transistor(NPN)
N
N N P+ P
+
P
P-sub
GND
Terminal A
N
N P+ P+
P
GND
C B
E
N
GND
E
B C
GND
Parasitic element
Fig.20 Example of the basic structure of a bipolar IC
Terminal A
Terminal B Terminal B
Parasitic element Parasitic element
Parasitic
element
P-sub
BH6578FVM,BD7931F
Technical Note
8/8
Operating part numer
B H 6 5 7 8 F V M - T R
Part No
BH
BD
Part No
6578
7931
Package
FVM : MSOP8
F : SOP8
Packaging and forming specification
E2: Embossed tape and reel
(SOP8)
TR: Embossed tape and reel
(MSOP8)
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SOP8
0.9±0.15
0.3MIN
4
°
+
6
°
4
°
0.17 +0.1
-
0.05
0.595
6
43
8
2
5
1
7
5.0±0.2
6.2±0.3
4.4±0.2
(MAX 5.35 include BURR)
1.27
0.11
0.42±0.1
1.5±0.1
S
0.1 S
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
TR
()
1pin
(Unit : mm)
MSOP8
0.08 S
S
4.0±0.2
8
3
2.8±0.1
1
6
2.9±0.1
0.475
4
57
(MAX 3.25 include BURR)
2
1PIN MARK
0.9MAX
0.75±0.05
0.65
0.08±0.05
0.22 +0.05
0.04
0.6±0.2
0.29±0.15
0.145 +0.05
0.03
4°
+6°
4°
R1120
A
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Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
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