RT8009-25GJ5 - Richtek - Product.Network

RT8009

DS8009-07 March 2011 www.richtek.com

Features



2.5V to 5.5V Input Range



Adjustable Output From 0.5V to VIN



1.0V, 1.2V, 1.3V, 1.5V, 1.8V, 2.5V and 3.3V Fixed/

Adjustable Output Voltage



600mA Output Current



95% Efficiency



No Schottky Diode Required



1.25MHz Fixed Frequency PWM Operation



Small SOT-23-5 and TSOT-23-5 Package



RoHS Compliant and 100% Lead (Pb)-Free

Applications

Cellular Telephones

Personal Information Appliances

Wireless and DSL Modems

MP3 Players

Portable Instruments

1.25MHz, 600mA, High Efficiency PWM Step-Down

DC/DC Converter

General Description

The RT8009 is a high-efficiency pulse-width-modulated

(PWM) step-down DC/DC converter. Capable of delivering

600mA output current over a wide input voltage range from

2.5 to 5.5V, the RT8009 is ideally suited for portable

electronic devices that are powered from 1-cell Li-ion

battery or from other power sources within the range such

as cellular phones, PDAs and handy-terminals.

Internal synchronous rectifier with low RDS(ON) dramatically

reduces conduction loss at PWM mode. No external

Schottky diode is required in practical application. The

RT8009 automatically turns off the synchronous rectifier

while the inductor current is low and enters discontinuous

PWM mode. This can increase efficiency at light load

condition.

The RT8009 enters Low-Dropout mode when normal PWM

cannot provide regulated output voltage by continuously

turning on the upper P-MOSFET. RT8009 enter shutdown

mode and consumes less than 0.1μA when EN pin is pulled

low.

The switching ripple is easily smoothed-out by small

package filtering elements due to a fixed operation

frequency of 1.25MHz. This along with small SOT-23-5

and TSOT-23-5 package provides small PCB area

application. Other features include soft start, lower internal

reference voltage with 2% accuracy, over temperature

protection, and over current protection.

Note :

Richtek products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

Ordering Information

Pin Configurations

(TOP VIEW)

SOT-23-5/TSOT-23-5

VIN GND EN

LX FB/VOUT

RT8009(- )

Package Type

B : SOT-23-5

J5 : TSOT-23-5

Lead Plating System

P : Pb Free

G : Green (Halogen Free and Pb Free)

Output Voltage

Default : Adjustable

10 : 1.0V

12 : 1.2V

13 : 1.3V

15 : 1.5V

18 : 1.8V

25 : 2.5V

33 : 3.3V

Marking Information

For marking information, contact our sales representative

directly or through a Richtek distributor located in your

area.

RT8009

DS8009-07 March 2011www.richtek.com

Typical Application Circuit

Figure 1. Fixed Voltage Regulator

Figure 2. Adjustable Voltage Regulator

0.5VV

and 1MR2R1 with

1 x VV

REF(Typ.)

REFOUT

Ω≤+

⎟

⎠

⎞

⎜

⎝

⎛+=

Layout Guide

Layout note:

1. The distance that CIN connects to VIN is as close as possible (Under 2mm).

2. COUT should be placed near RT8009.

Figure 3

VIN

GND

VOUT

VIN

CIN

VOUT

GND

COUT

VIN

GND

VIN

CIN

VOUT

GND

VOUT

COUT

4.7µF

10µF

VIN LX

GND

RT8009

EN VOUT

4.7µH

2.5V to 5.5V

VIN VOUT

CIN

COUT

4.7µF

10µF

VIN LX

GND

RT8009

EN FB

4.7µH

2.5V to 5.5V

VIN VOUT

CIN

COUT

RT8009

DS8009-07 March 2011 www.richtek.com

Function Block Diagram

Functional Pin Description

Pin Number Pi n Name Pin Function

1 VIN Power Input.

2 GND Ground.

3 EN Chip Enable (Active High, do not leave EN pin floating, and VEN < VIN + 0. 6V).

4 FB/VOUT Feedback Input Pin.

5 LX Pin for Switching.

COMP

RS1

RS2

EN VIN

FB/VOUT

UVLO &

Power Good

Detector VREF

Slope

Compensation

Current

Sense

OSC &

Shutdown

Control

Zero

Detector

Current

Limit

Detector

Driver

Control

Logic

PWM

Comparator

Error

Amplifier

GND

RT8009

DS8009-07 March 2011www.richtek.com

Absolute Maximum Ratings (Note 1)

Supply Input Voltage ------------------------------------------------------------------------------------------------------ 6.5V

Enable, FB Voltage ------------------------------------------------------------------------------------------------------- VIN + 0.6V

Power Dissipation, PD @ TA = 25°C

SOT-23-5, TSOT-23-5 ----------------------------------------------------------------------------------------------------- 0.4W

Package Thermal Resistance (Note 2)

SOT-23-5, TSOT-23-5, θJA ----------------------------------------------------------------------------------------------- 250°C/W

SOT-23-5, TSOT-23-5, θJC ----------------------------------------------------------------------------------------------- 130°C/W

Junction Temperature Range -------------------------------------------------------------------------------------------- 150°C

Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C

Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C

ESD Susceptibility (Note 3)

HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV

MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V

Electrical Characteristics

(VIN = 3.6V, VOUT = 2.5V, VREF = 0.5V, L = 4.7μH, CIN = 4.7μF, C OUT = 10μF, T A = 25°C, IMAX = 600mA unless otherwise specified)

Parameter Symbol Test Conditions Min Typ Max Unit

Input Voltage Range VIN 2.5 -- 5.5 V

Quiescent Current IQ I

OUT = 0mA, VFB = VREF + 5% -- 50 100

μA

Shutdown Current ISHDN EN = GND -- 0.1 1 μA

Reference Voltage VREF For adjustable output voltage 0.49 0.5 0.51 V

Adjustable Output Range VOUT VREF -- VIN − 0.2 V

ΔVOUT VIN = 2.5 to 5.5V, VOUT = 1.0V

0A < IOUT < 600mA −3 -- 3 %

ΔVOUT VIN = 2.5 to 5.5V, VOUT = 1.2V

0A < IOUT < 600mA −3 -- 3 %

ΔVOUT VIN = 2.5 to 5.5V, VOUT = 1.3V

0A < IOUT < 600mA −3 -- 3 %

ΔVOUT VIN = 2.5 to 5.5V, VOUT = 1.5V

0A < IOUT < 600mA −3 -- 3 %

ΔVOUT VIN = 2.5 to 5.5V, VOUT = 1.8V

0A < IOUT < 600mA −3 -- 3 %

ΔVOUT VIN = VOUT + ΔV to 5.5V (Note 5)

VOUT = 2.5V, 0A < IOU T < 600mA −3 -- 3 %

ΔVOUT VIN = VOUT + ΔV to 5.5V (Note 5)

VOUT = 3.3V, 0A < IOU T < 600mA −3 -- 3 %

Output Voltage

Accuracy Fix

ΔVOUT VIN = VOUT + 0.2V to 5.5V

0A < IOUT < 600mA −3 -- 3 %

To be continued

Recommended Operating Conditions (Note 4)

Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.5V to 5.5V

Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C

Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C

RT8009

DS8009-07 March 2011 www.richtek.com

Parameter Symbol Test Conditions Min Typ Max Unit

Output Voltage

Accuracy Adjustable ΔVOU T VIN = VOUT + ΔV to 5.5V (Note 5)

0A < IOUT < 600mA −3 -- 3 %

FB Input Current IFB V

FB = VIN −50 -- 50 nA

VIN = 3.6V -- 0.3 0.65

RDS(ON) of P-Channel MOSFET RDS(ON)_P IOUT = 200mA VIN = 2.5V -- 0.4 0.80

VIN = 3.6V -- 0.25 0.55

RDS(ON) of N-Channel MOSFET RDS(ON)_N IOUT = 200mA VIN = 2.5V -- 0.35 0.65 Ω

P-Channel Current Limit ILIM_P VIN = 2.5V to 5.5 V 1 -- 1.8 A

EN High-Level Input Voltage VEN_H V

IN = 2.5V to 5.5V 1.5 -- -- V

EN Low-Level Input Voltage VEN_L V

IN = 2.5V to 5.5V -- -- 0.4 V

Under Voltage Lockout Threshold -- 1.8 -- V

Hysteresis -- 0.1 -- V

Oscillator Frequency fOSC V

IN = 3.6V, IOUT = 100mA 0.8 1.25 1.85 MHz

Thermal Shutdown Temperature TSD -- 160 -- °C

Min. On Time -- 50 -- ns

Max. Duty Cycle 100 -- -- %

LX Leakage Current VIN = 3.6V, VLX = 0V or VLX = 3.6V −1 -- 1

μA

Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended

periods may remain possibility to affect device reliability.

Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of

JEDEC 51-3 thermal measurement standard.

Note 3. Devices are ESD sensitive. Handling precaution recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. ΔV = IOUT x RDS(ON)_P

RT8009

DS8009-07 March 2011www.richtek.com

Typical Operating Characteristics

Load Regulation

1.770

1.775

1.780

1.785

1.790

1.795

1.800

1.805

1.810

0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6

Load Current (A)

Load Regulation (V

)

VIN = 3.3V

VIN = 5.5V

VIN = 2.5V

VOUT = 1.8V

Frequency vs. Input Voltage

1.14

1.16

1.18

1.20

1.22

1.24

1.26

2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5

Input Voltage (V)

Frequency (MHz

)

VOUT = 1.8V

Efficiency vs. Input Voltage

100

2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5

Input Voltage (V)

Efficiency (%)

IOUT = 600mA

IOUT = 300mA

VOUT = 1.8V

Current Limit vs. Input Voltage

0.00

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

2.25

2.50

2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5

Input Voltage (V)

Current Limit (A)

VOUT = 1.8V

Efficiency vs. Load Current

100

0.01 0.11 0.21 0.31 0.41 0.51 0.61

Load Current (A)

Efficiency (%)

VIN = 3.3V

VIN = 5V

VOUT = 1.8V

Frequency vs. Tem pe rature

1.10

1.12

1.14

1.16

1.18

1.20

1.22

1.24

1.26

-50 -25 0 25 50 75 100 125

Temperature (°C)

Frequency (MHz) 1

VIN = 3.3V, VOUT = 1.8V

RT8009

DS8009-07 March 2011 www.richtek.com

Output Ripple

Time (500ns/Div)

VOUT

(2mV/Div)

VLX

(5V/Div)

ILX

(500mA/Div)

VIN = 3.3V, VOUT = 1.8V, IOUT = 600mA

Load Transient Response

Time (100μs/Div)

IOUT

(500mA/Div)

VOUT

(20mV/Div)

VIN = 3.3V, VOUT = 1.8V, IOUT = 300mA to 600mA

Load Transient Response

Time (100μs/Div)

IOUT

(500mA/Div)

VOUT

(20mV/Div)

VIN = 3.3V, VOUT = 1.8V, IOUT = 150mA to 600mA

Power On

Time (100μs/Div)

VEN

(2V/Div)

VOUT

(1V/Div)

IIN

(200mA/Div)

VIN = 3.3V, VOUT = 1.8V, IOUT = 600mA

Reference vs. Input Voltage

0.40

0.42

0.44

0.46

0.48

0.50

0.52

0.54

0.56

0.58

0.60

2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5

Input Voltage (V)

Reference (V)

VOUT = 1.8V

Reference vs. Temperature

0.490

0.493

0.495

0.498

0.500

0.503

0.505

0.508

0.510

-50 -25 0 25 50 75 100 125

Temperature (°C)

Reference (V)

VIN = 3.3V, VOUT = 1.8V

RT8009

DS8009-07 March 2011www.richtek.com

⎥

⎦

⎤

⎢

⎣

⎡+≤

OUT

LOUT 8fC

ESR ΔIΔV

Applications Information

The basic RT8009 application circuit is shown in Typical

Application Circuit. External component selection is

determined by the maximum load current and begins with

the selection of the inductor value and operating frequency

followed by CIN and COUT.

Inductor Selection

For a given input and output voltage, the inductor value

and operating frequency determine the ripple current. The

ripple current ΔIL increases with higher VIN and decreases

with higher inductance.

Having a lower ripple current reduces the ESR losses in

the output capacitors and the output voltage ripple. Highest

efficiency operation is achieved at low frequency with small

ripple current. This, however, requires a large inductor.

A reasonable starting point for selecting the ripple current

is ΔIL = 0.4(IMAX). The largest ripple current occurs at the

highest VIN. To guarantee that the ripple current stays

below a specified maximum, the inductor value should be

chosen according to the following equation :

Inductor Core Selection

Once the value for L is known, the type of inductor must

be selected. High efficiency converters generally cannot

afford the core loss found in low cost powdered iron cores,

forcing the use of more expensive ferrite or mollypermalloy

cores. Actual core loss is independent of core size for a

fixed inductor value but it is very dependent on the

inductance selected. As the inductance increases, core

losses decrease. Unfortunately, increased inductance

requires more turns of wire and therefore copper losses

will increase.

Ferrite designs have very low core losses and are preferred

at high switching frequencies, so design goals can

concentrate on copper loss and preventing saturation.

Ferrite core material saturates “hard”, which means that

inductance collapses abruptly when the peak design

current is exceeded. This results in an abrupt increase in

⎥

⎦

⎤

⎢

⎣

⎡−

⎥

⎦

⎤

⎢

⎣

⎡

OUTOUT

ΔI

⎥

⎦

⎤

⎢

⎣

⎡−

⎥

⎦

⎤

⎢

⎣

⎡

Δ×

IN(MAX)

OUT

L(MAX)

OUT

inductor ripple current and consequent output voltage ripple.

Do not allow the core to saturate!

Different core materials and shapes will change the size/

current and price/current relationship of an inductor.

Toroid or shielded pot cores in ferrite or permalloy materials

are small and don’t radiate energy but generally cost

more than powdered iron core inductors with similar

characteristics. The choice of which style inductor to use

mainly depends on the price vs size requirements and

any radiated field/EMI requirements.

CIN and COUT Selection

The input capacitance, CIN, is needed to filter the

trapezoidal current at the source of the top MOSFET. To

prevent large ripple voltage, a low ESR input capacitor

sized for the maximum RMS current should be used. RMS

current is given by :

OUT

OUT(MAX)RMS −=

This formula has a maximum at VIN = 2VOUT, where IRMS

= IOUT/2. This simple worst-case condition is commonly

used for design because even significant deviations do

not offer much relief. Note that ripple current ratings from

capacitor manufacturers are often based on only 2000

hours of life which makes it advisable to further derate the

capacitor, or choose a capacitor rated at a higher

temperature than required. Several capacitors may also

be paralleled to meet size or height requirements in the

design.

The selection of COUT is determined by the effective series

resistance (ESR) that is required to minimize voltage ripple

and load step transients, as well as the amount of bulk

capacitance that is necessary to ensure that the control

loop is stable. Loop stability can be checked by viewing

the load transient response as described in a later section.

The output ripple, ΔVOUT, is determined by :

The output ripple is highest at maximum input voltage

since ΔIL increases with input voltage. Multiple capacitors

placed in parallel may be needed to meet the ESR and

RMS current handling requirements. Dry tantalum, special

RT8009

DS8009-07 March 2011 www.richtek.com

Output Voltage Programming

The resistive divider allows the VFB pin to sense a fraction

of the output voltage as shown in Figure 4.

)

(1VV REF

OUT +=

where VREF is the internal reference voltage (0.5V typ.)

Efficiency Considerations

The efficiency of a switching regulator is equal to the output

power divided by the input power times 100%. It is often

useful to analyze individual losses to determine what is

limiting the efficiency and which change would produce

the most improvement. Efficiency can be expressed as :

Efficiency = 100% − (L1+ L2+ L3+ ...)

where L1, L2, etc. are the individual losses as a percentage

of input power. Although all dissipative elements in the

circuit produce losses, two main sources usually account

for most of the losses : VIN quiescent current and I2R

losses. The VIN quiescent current loss dominates the

efficiency loss at very low load currents whereas the I2R

loss dominates the efficiency loss at medium to high load

currents. In a typical efficiency plot, the efficiency curve

at very low load currents can be misleading since the

actual power lost is of no consequence.

1. The VIN quiescent current is due to two components :

the DC bias current as given in the electrical characteristics

and the internal main switch and synchronous switch gate

charge currents. The gate charge current results from

switching the gate capacitance of the internal power

MOSFET switches. Each time the gate is switched from

high to low to high again, a packet of charge ΔQ moves

from VIN to ground.

The resulting ΔQ/Δt is the current out of VIN that is typically

larger than the DC bias current. In continuous mode,

IGATECHG = f(QT+QB)

where QT and QB are the gate charges of the internal top

and bottom switches. Both the DC bias and gate charge

losses are proportional to VIN and thus their effects will

be more pronounced at higher supply voltages.

2. I2R losses are calculated from the resistances of the

internal switches, RSW and external inductor RL. In

continuous mode the average output current flowing

through inductor L is “chopped” between the main switch

and the synchronous switch. Thus, the series resistance

looking into the LX pin is a function of both top and bottom

MOSFET RDS(ON) and the duty cycle (DC) as follows :

RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1−DC)

The RDS(ON) for both the top and bottom MOSFETs can be

obtained from the Typical Performance Characteristics

For adjustable about voltage mode, the output voltage is

set by an external resistive divider according to the following

equation :

polymer, aluminum electrolytic and ceramic capacitors are

all available in surface mount packages. Special polymer

capacitors offer very low ESR but have lower capacitance

density than other types. Tantalum capacitors have the

highest capacitance density but it is important to only

use types that have been surge tested for use in switching

power supplies. Aluminum electrolytic capacitors have

significantly higher ESR but can be used in cost-sensitive

applications provided that consideration is given to ripple

current ratings and long term reliability. Ceramic capacitors

have excellent low ESR characteristics but can have a

high voltage coefficient and audible piezoelectric effects.

The high Q of ceramic capacitors with trace inductance

can also lead to significant ringing.

Using Ceramic Input and Output Ca pacitors

Higher values, lower cost ceramic capacitors are now

becoming available in smaller case sizes. Their high ripple

current, high voltage rating and low ESR make them ideal

for switching regulator applications. However, care must

be taken when these capacitors are used at the input and

output. When a ceramic capacitor is used at the input

and the power is supplied by a wall adapter through long

wires, a load step at the output can induce ringing at the

input, VIN. At best, this ringing can couple to the output

and be mistaken as loop instability. At worst, a sudden

inrush of current through the long wires can potentially

cause a voltage spike at VIN large enough to damage the

part.

Figure 4. Setting the Output Voltage

RT8009

GND

VFB

VOUT

RT8009

DS8009-07 March 2011www.richtek.com

Checking Tran sient Response

The regulator loop response can be checked by looking

at the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, VOUT immediately shifts by an amount

equal to ΔILOAD (ESR), where ESR is the effective series

resistance of COUT. ΔILOAD also begins to charge or

discharge COUT generating a feedback error signal used

by the regulator to return VOUT to its steady-state value.

During this recovery time, VOUT can be monitored for

overshoot or ringing that would indicate a stability problem.

Layout Considerations

Follow the PCB layout guidelines for optimal performance

of RT8009.

` For the main current paths as indicated in bold lines in

Figure 6 keep their traces short and wide.

` Put the input capacitor as close as possible to the device

pins (VIN and GND).

` LX node is with high frequency voltage swing and should

be kept small area. Keep analog components away from

LX node to prevent stray capacitive noise pick-up.

curves. Thus, to obtain I2R losses, simply add RSW to RL

and multiply the result by the square of the average output

current.

Other losses including CIN and COUT ESR dissipative

losses and inductor core losses generally account for less

than 2% of the total loss.

Thermal Considerations

The maximum power dissipation depends on the thermal

resistance of IC package, PCB layout, the rate of

surroundings airflow and temperature difference between

junction to ambient. The maximum power dissipation can

be calculated by following formula :

PD(MAX) = ( TJ(MAX) - TA ) / θJA

Where TJ(MAX) is the maximum operation junction

temperature 125°C, TA is the ambient temperature and the

θJA is the junction to ambient thermal resistance.

For recommended operating conditions specification of

RT8009 DC/DC converter, where TJ (MAX) is the maximum

junction temperature of the die (125°C) and TA is the

maximum ambient temperature. The junction to ambient

thermal resistance θJA is layout dependent. For

SOT-23-5/TSOT-23-5 packages, the thermal resistance θJA

is 250°C/W on the standard JEDEC 51-3 single-layer

thermal test board. The maximum power dissipation at

TA = 25°C can be calculated by following formula :

PD(MAX) = ( 125°C - 25°C ) / 250 = 0.4 W for SOT-23-5/

TSOT-23-5 packages

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance θJA. For RT8009 packages, the Figure 5 of

derating curves allows the designer to see the effect of

rising ambient temperature on the maximum power

allowed.

The value of junction to case thermal resistance θJC is

popular for users. This thermal parameter is convenient

for users to estimate the internal junction operated

temperature of packages while IC operating. It's

independent of PCB layout, the surroundings airflow effects

and temperature difference between junction to ambient.

The operated junction temperature can be calculated by

following formula :

TJ = TC + PD x θJC

Where TC is the package case (Pin 2 of package leads)

temperature measured by thermal sensor, PD is the power

dissipation defined by user's function and the θJC is the

junction to case thermal resistance provided by IC

manufacturer. Therefore it's easy to estimate the junction

temperature by any condition.

Figure 5. Derating Curves for RT8009 Package

100

150

200

250

300

350

400

450

0 20 40 60 80 100 120 140

Ambient Temperature (°C)

Maximum Power Dissipation (mW)

Single Layer PCB

SOT-23-5, TSOT-23-5 Packages

RT8009

DS8009-07 March 2011 www.richtek.com

Figure 7. Top Layer

Figure 8. Bottom Layer

C om ponent Suppl ier S er ies Induct a nce ( μH) DCR (mΩ) C ur r ent Rati ng (mA ) Di m ensions (mm )

TAI YO YUDEN NR 3015 2.2 60 1480 3x3x1.5

TAI YO YUDEN NR 3015 4.7 120 1020 3x3x1.5

Sumi da CDRH2D14 2.2 75 1500 4.5x3.2x1.55

Sumi da CDRH2D14 4.7 135 1000 4.5x3.2x1.55

GOTREND GTSD32 2.2 58 1500 3.85x3.85x1.8

GOTREND GTSD32 4.7 146 1100 3.85x3.85x1.8

Table 1. Inductors

Co m pon ent Sup pl ie r P ar t N o. C apaci t ance (μF) Case Size

TDK C1608JB0J475M 4.7 0603

TDK C2012JB0J106M 10 0805

MURAT A GRM188R60J475KE19 4.7 0603

MURAT A GRM219R60J106ME19 10 0805

MURAT A GRM219R60J106KE19 10 0805

TAIYO YUDEN JMK107BJ475RA 4.7 0603

TAIYO YUDEN JMK107BJ106MA 10 0603

TAIYO YUDEN JMK212BJ106RD 10 0805

Table 2. Capacitors for CIN and COUT

Recommended component selection for Typical Application

` Connect feedback network behind the output capacitors.

Keep the loop area small. Place the feedback

components near the RT8009.

` Connect all analog grounds to a command node and

then connect the command node to the power ground

behind the output capacitors.

`An example of 2-layer PCB layout is shown in Figure 7

and Figure 8 for reference.

GND

RT8009

EN FB

VIN VOUT

VIN

10uF

4.7uF

4.7uH

Figure 6. EVB Schematic

RT8009

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Outline Dimension

AA1

SOT-23-5 Surface Mount Package

Dimensions In Millimeters Dimensions In Inches

Symbol Min Max Min Max

A 0.889 1.295 0.035 0.051

A1 0.000 0.152 0.000 0.006

B 1.397 1.803 0.055 0.071

b 0.356 0.559 0.014 0.022

C 2.591 2.997 0.102 0.118

D 2.692 3.099 0.106 0.122

e 0.838 1.041 0.033 0.041

H 0.080 0.254 0.003 0.010

L 0.300 0.610 0.012 0.024

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Headquarter

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789 Fax: (8863)5526611

Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit

design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be

guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.

Richtek Technology Corporation

Taipei Office (Marketing)

5F, No. 95, Minchiuan Road, Hsintien City

Taipei County, Taiwan, R.O.C.

Tel: (8862)86672399 Fax: (8862)86672377

Email: marketing@richtek.com

TSOT-23-5 Surface Mount Package

Dimensions In Millimeters Dimensions In Inches

Symbol Min Max Min Max

A 0.700 1.000 0.028 0.039

A1 0.000 0.100 0.000 0.004

B 1.397 1.803 0.055 0.071

b 0.300 0.559 0.012 0.022

C 2.591 3.000 0.102 0.118

D 2.692 3.099 0.106 0.122

e 0.838 1.041 0.033 0.041

H 0.080 0.254 0.003 0.010

L 0.300 0.610 0.012 0.024

AA1