TA8496FL/FLG
2006-3-6
1
Toshiba Bipolar Linear Integrated Circuit
Silicon Monolithic
TA8496FL/FLG
Magnetic Head R/W IC
This IC enables writing and detection of magnetic recording
signals.
Features
• Operating voltage range: VCC = 3.5 to 7 V
V
BAT = 1.8 to 7 V
• Output current: Iout = 20 mA (max)
• Constant current operating function
: IOC = (0.25 (V) × 160 (A))/RWR (typ.)
Weight: 0.05 g (typ.)
TA8496FLG:
The TA8496FLG is a Pb-free product.
The following conditions apply to solderability:
*Solderability
1. Use of Sn-37Pb solder bath
*solder bath temperatur e = 230°C
*dipping time = 5 seconds
*number of times = once
*use of R-type flux
2. Use of Sn-3.0Ag-0.5Cu solder bath
*solder bath temperatur e = 245°C
*dipping time = 5 seconds
*the number of times = once
*use of R-type flux
TA8496FL/FLG
2006-3-6
2
Block Diagram
30 kΩ
VCC − VF − 0.3 V
AMP3
AMP2
HEAD-AMP
COM-AMP
WRCNT
AIN3
CFIL
A
OUT3
3
14
10
13
H-SW control circuit
AOUT2
15
FCNT
12
T1
16
AIN2
17
HDOUT
18
HDFB
19
VCC
9
VREF 24
COMIN 8
ON/OFF 7
R/W 6
ENA 5
CLK 4
A
HDIN21
A
COM20
VBAT 2
HDIN
22
COM
23
WRGND
1RDGND
11
Control circuit
30 dB 20 dB 20 dB40 dB
Filter
30 kΩ
10 kΩ100 kΩ100 kΩ316 kΩ
10 kΩ
10 kΩ
10 kΩ
100 Ω
TA8496FL/FLG
2006-3-6
3
Pin Function
Pin Number Symbol Description
1 WRGND GND for write block
2 VBAT High-switch control power supply
3 WRCNT Write output setting pin
4 CLK High-switch operation control signal input
5 ENA High-switch enable signal input
6 R/W Read/write select signal input
7 ON/OFF Chip enable signal input
8 COMIN
Internal reference voltage setting
(fine adjustment)
9 VCC Power supply input pin
10 CFIL Power supply filter connecting pin (C = 0.1 µF)
11 RDGND GND for read block
12 FCNT Cut-off frequency setting pin
13 AOUT3 Amp 3 output
14 AIN3 Amp 3 input
15 AOUT2 Amp 2 output
16 T1 Amp 2 test pin
17 AIN2 Amp 2 input
18 HDOUT Head amp output
19 HDFB Head amp feedback input
20 ACOM COM amp output
21 AHDIN Head amp output
22 HDIN Write output
23 COM Write output
24 Vref V
CC filter output (internal power supply)
Absolute Maximum Rating (Ta = 25°C)
Characteristics Symbol Rating Unit
VCC 8 V
Power Supply Voltage VBAT 8 V
Input Voltage VI 6 V
Output Current IOUT 20 mA
Operating Temperature Topr −20 to 70 °C
Storage Temperature Tstg −50 to 150 °C
Recommended Operating Conditions
Characteristics Symbol Rating Unit
VCC 3.5 to 7.0
Power Supply Voltage VBAT 1.8 to 7.0 V
TA8496FL/FLG
2006-3-6
4
Functions
Input Write Unit
ON/OFF R/W ENA CLK COM HDin
Read Unit
H H/L H/L ∞ ∞ Enable
L H H L H Disable
L H L H L Disable
L L L L L Disable
H
L L H ∞ ∞ Disable
L H/L H/L H/L ∞ ∞ Disable
∞: High impedance
Electrical Characteristics
Interface Block (unless otherwise is specified, VCC = 5 V, VBAT = 3 V, Ta = 25°C)
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
VIN1-Hi ⎯ ENA, ON/OFF 2.5 ⎯ V
CC
VIN1-Lo ⎯ ENA, ON/OFF ⎯ ⎯ 1.0
VIN2-Hi ⎯ CLK, R/W 1.5 ⎯ V
CC
Input Voltage
VIN2-Lo ⎯ CLK, R/W ⎯ ⎯ 0.5
V
IIN1-Hi CLK, VIN = 5 V ― 15 25
IIN1-Lo CLK, VIN = 0 V ⎯ −85 −120
IIN2-Hi ENA, VIN = 5 V ⎯ 85 120
IIN3-Hi R/W, VIN = 5 V ⎯ 15 25
IIN3-Lo R/W, VIN = 0 V ⎯ −85 −120
Input Current
IIN4-Hi
1
ON/OFF, VIN = 5 V ⎯ 85 120
µA
TA8496FL/FLG
2006-3-6
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Read Block (unless otherwise is specified, VCC = 5 V, VBAT = 3 V, Ta = 25°C)
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
ICCR When read block in operation ⎯ 3.2 4.6 mA
Current Dissipation ICCO 2 When chip disabled
(on/off = low or open) ⎯ 0 1 µA
Head amp GH ⎯ ⎯ 40 ⎯
Amp 2 G2 ⎯ ⎯ 40 ⎯
Gain
Characteristics Amp 3 G3
3
⎯ ⎯ 30 ⎯
dB
En1 R
g = 0 Ω, fc = 19 kHz ⎯ 0.33 (0.64)*
Head Amp Input Conversion Noise En2 ― Rg = 0 Ω, fc = 1.7 kHz ⎯ 0.15 (0.26)*
µVrms
Reference Voltage VACOM 3 ⎯ 1.9 2.0 2.1 V
Head amp VHOS ⎯ −0.1 ±0.25
Amp 2 V2OS ⎯ +0.7 ±1.1
Output Offset
Voltage Amp 3 V3OS
3 ⎯
⎯ +0.1 ±0.25
V
Low V3OL ⎯ 0.2 ⎯
Amp 3 Output
Voltage Range High V3OH 4 RL = 10 kΩ ⎯ 4.1 ⎯ V
Output I3OUT ⎯ 2.0 ⎯ ⎯
Amp 3 Output
Current Input I3IN 4 ⎯ 0.1 0.2 0.3 mA
*: Guaranteed by design. Determined at design and does not change at manufacturing. Test not cond ucted.
Write Block (unless otherwise is specified, VCC = 5 V, VBAT = 3 V, Ta = 25°C)
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
ICCw During write, CLK = Low/High ⎯ 3.7 5.2
ICCe When write enabled ⎯ 1.9 2.8
ICCB When write in break ⎯ 4.4 6.1
Ibat During write, reactive current
(RWR = 5 kΩ) ⎯ 1.4 1.8
IbaB When write in break ⎯ 1.0 1.6
mA
Ibar During read ⎯ 0 1
Current Dissipation
Ibao
2
When chip disabled
(on/off = low or open) ⎯ 0 1 µA
VBAT = 2.0 V 8 10 12
Set Output Current IOC 5
IOC = 10 mA
(at VBAT = 2.0 V) VBAT = 5.0 V ⎯ 11 13
mA
TpLH1 0 to 10% (Note1) ⎯ 0.1 ⎯
TpLH2 0 to 90% (Note1) ⎯ 0.5 ⎯
TpHL1 0 to 10% (Note1) ⎯ 0.1 ⎯
CLK Output Transfer Time
TpHL2
6
0 to 90% (Note1) ⎯ 0.5 ⎯
µs
TpZH1 0 to 10% (Note1) ⎯ 0.3 ⎯
TpZH2 0 to 90% (Note1) ⎯ 0.5 ⎯
TpHZ1 0 to 10% (Note1) ⎯ 0.3 ⎯
ENA Output Transfer Time
TpHZ2
6
0 to 90% (Note1) ⎯ 0.5 ⎯
µs
Note 1: Load RL = 36 Ω, CL = 10 pF
TA8496FL/FLG
2006-3-6
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Input/Output Circuit
• CLK pin
• ENA pin
• R/W pin
• ON/OFF pin
• AOUT3 pin
VREF
CLK
GND
4
50 kΩ
1 kΩ
1.0 V
5
VREF
ENA
GND
50 kΩ
50 kΩ
6
VREF
R/W
GND
50 kΩ
1 kΩ
1.0 V
ON/OFF 7
VREF
GND
50 kΩ
50 kΩ
AOUT3
13
200 µA
VCC
GND
Secondly L.P.F characteristics (amp 2)
Control resistance (k
Ω
)
(FCNT)
Cut-off frequency (kHz)
(−3 dB)
30
0.3
0.1 1 3 10 30
1
3
10
100
TA8496FL/FLG
2006-3-6
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Test Circuit
1. Input Current(IIN1, IIN2, IIN3, IIN4)
VCC VBAT HDFB HDOUT AIN2 FCNT AOUT2 AIN3
RDGND CFIL WRCNT WRGND
ACOM
AHDIN
HDIN
COM
CLK
ENA
R/W
ON/OFF
TA8496FL/FLG
IIN1
IIN2
IIN3
IIN4
9 2 19 18 17 12 15 14
20
21
22
23
3 111 10
4
5
6
7
A
A
A
A
10 kΩ
0.1 µF
0.1 µF820 pF
RWR = 5 kΩ
5 V
5 V
3 V
0.1 µF
RL = 120 Ω
TA8496FL/FLG
2006-3-6
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2. Current Consumption(ICCR, ICCO, ICCW, ICCe, ICCB, Ibat, IbaB, Ibar, Ibao)
Input Sequence (H = 5 V, L = 0 V)
Current Consumption
(VCC, VBAT) ON/OFF R/W ENA CLK
ICCR H H L H
ICCO L/OPEN H H/L H
ICCW H L H H/L
ICCe H L L H
ICCB H L L L
I
bat (Note2) H L H H/L
IbaB H L L L
Ibar H H H/L H/L
Ibao L/OPEN H/L H/L H/L
Note 2: SW. OFF
VCC VBAT HDFB HDOUT AIN2 FCNT AOUT2 AIN3
RDGND CFIL WRCNT WRGND
ACOM
AHDIN
HDIN
COM
CLK
ENA
R/W
ON/OFF
TA8496FL/FLG
9 2 19 18 17 12 15 14
20
21
22
23
3 111 10
4
5
6
7
10 kΩ
0.1 µF
0.1 µF820 pF
RWR = 3.9 kΩ
5 V
5 V
3 V
0.1 µF
A A
RL = 120 Ω
SW.
TA8496FL/FLG
2006-3-6
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3. Gain Characteristics
(GH, G2, G3), Power Off-Set Voltage (VHOS, V2OS, V3OS)
GH = 20 ogl VHDOUT
VHDIN ,
G2 = 20 oglVAOUT2
VIN2 ,
G3 = 20 oglVAOUT3
VIN3
When off-set voltage is measured, SW turns ON.
VHOS = |VHDOUT|, V2OS = |VAOUT2|, V3OS = |VAOUT3|
4. Amp 3 Output Voltage Range (V3OL, V3OH), Amp 3 Output Current (I3OUT, I3IN)
Note 3: I3OUT must be measured on condition i nVIO >
=
4.0 V
13 6
VCC VBAT HDFB HDOUT AIN2 FCNT AOUT2 AIN3
RDGND CFIL WRGND
TA8496FL/FLG
9 2 19 18 17 12 15 14
111 10
10 kΩ
0.1 µF
0.1 µF820 pF
5 V
3 V
0.1 µF
R/W
ON/OFF
7
5 V
AOUT3
AHDIN
ACOM
21
20
I3IN
VCC
A
2 mA
V V
VIO
10 kΩ
V30H
V
V30L
100 µA
(Note3)
VCC VBAT HDFB HDOUT AIN2 FCNT AOUT2 AIN3
RDGND CFIL WRCNT WRGND
AOUT3
AHDIN
ACOM
R/W
ON/OFF TA8496FL/FLG
9 2 19 18 17 12 15 14
13
21
20
3 111 10
6
7
V
10 kΩ
0.1 µF
820 pF
RWR = 5 kΩ
5 V
5 V
3 V
VAOUT3
VIN2
VHDOUT
VACOM
SW. V
VIN3
VAOUT2
SW.
V
VHDIN
V
SW.
TA8496FL/FLG
2006-3-6
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5. Set Output Current (IOC)
Set RWR so that IOC = 10 mA (at VBAT = 2 V).
At this time, due to fluctuation in samples, IOC fluctuates in the range of 8 to 12 mA. Also, IOC fluctuates
depending on the power supply (VBAT) as follows: IOC = 10 mA (at VBAT = 2 V) → IOC ∼
−
13 mA (at VBAT =
5 V).
VCC VBAT
RDGND WRCNT WRGND
HDIN
COM
CLK
ENA
R/W
ON/OFF
TA8496FL/FLG IOC
9 2
22
23
3 111
4
5
6
7
A
RWR
5 V
5 V
2 V/5 V
RL = 120 Ω
TA8496FL/FLG
2006-3-6
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6. CLK, ENA Output Propagation Time (TpLH1/2, TpHL1/2, TpZH1/2, TpHZ1/2)
VCC VBAT HDFB HDOUT AIN2 FCNT AOUT2 AIN3
RDGND CFIL WRCNT WRGND
ACOM
AHDIN
HDIN
COM
CLK
ENA
R/W
ON/OFF
TA8496FL/FLG
9 2 19 18 17 12 15 14
20
21
22
23
3 111 10
4
5
6
7
10 kΩ
0.1 µF
0.1 µF820 pF
RWR
5 V
5 V
3 V
0.1 µF
CL = 10 pF
Current probe
RWR: IOC is set 10 mA.
RL = 36 Ω
CLK Input Voltage Waveform 50% 50%
Output Current Waveform 10%
90% +10 mA
−10 mA
GND
90%
10%
TpHL1
TpHL2
TpHZ2
TpHZ1
10% 90%
10%
90%
10% 10%
90%
TpHZ2
TpHZ1
ENA Input Voltage Waveform 50%
TpLH1
TpLH2
50%
TpZH2
TpZH1
90%
TpZH2
TpZH1 +10 mA
−10 mA
GND
TA8496FL/FLG
2006-3-6
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Example of Application Circuit
Note 4: Operating supply voltage range
V
CC = 3.5 to 7.0 V, VBAT = 1.8 to 7.0 V
However, set VCC so that VACOM <
=
VBAT + 0.5 V. VCC >
=
VBAT.
(VACOM = (VCC − VF − 0.3)/2)
By connecting a resistor to the COMIN pin, VACOM can be varied.
Note 5: Utmost care is necessary in the design of the output, VCC, VM, and GND lines since the IC may be destroyed b y short-circuiting between outputs, air contamination faults,
or faults due to improper grounding, or by short-circuiting between contigu ous pins.
30 kΩ
VCC − VF − 0.3 V
AMP3
AMP2
HEAD-AMP
COM-AMP
WRCNT
AIN3
CFIL
A
OUT3
3
14
10
13
High-switch control
block
AOUT2
15
FCNT12
T1 16
AIN2 17
HDOUT
18
HDFB19
VCC
9
VREF 24
COMIN 8
ON/OFF 7
R/W 6
ENA 5
CLK 4
A
HDIN
21
A
COM
20
VBAT
2
HDIN
22
COM
23
WRGND
1RDGND
11
Control block
30 dB20 dB 20 dB40 dB
Filter
30 kΩ
10 kΩ100 kΩ 100 kΩ316 kΩ
10 kΩ
10 kΩ
100 Ω
0.1 µF820 pF
0.25 V (typ.)
3.5 to 7.0 V
0.1 µF
1.8 to 7.0 V
CPU
0.1 µF
A
D
10 kΩ
HEAD
TA8496FL/FLG
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Requests Concerning Use of QON
Outline Drawing of Package
When using QON, please take into account the following items.
Caution
(1) Do not carry out soldering on the island section in the four corners of the package (the section shown
on the lower surface drawing with diagonal lines) with the aim of increasing mechanical strength.
(2) The island section exposed on the package surface (the section shown on the upper surface drawing
with diagonal lines) must be used as (Note 6) below while electrically insulated from outside.
Note 6: Ensure that the island section (the section shown on the lower surface drawing with diagonal
lines) does not come into contact with solder from through-holes o n the bo ard layout.
• When mounting or soldering, take care to ensure that neither static electricity nor electrical
overstress is applied to the IC (measu r e s to prevent anti-static, leaks, etc.).
• When incorporating into a set, adopt a set design that does not apply voltage directly to the island
section.
(Upper surface) (Lower surface)
TA8496FL/FLG
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Package Dimensions
Weight: 0.05 g (typ.)
TA8496FL/FLG
2006-3-6
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified
for explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for
explanatory purp oses.
3. Timing Charts
Timing charts ma y be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough
evaluation is required, especially at the m a ss production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of
application circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These
components and circuits are not guaranteed to prevent malfunction or failure from occurring in the
application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be
exceeded, even for a moment. Do n ot exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combusti on.
[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in
case of over current and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal
pulse noise occurs from the wiring or load, causing a large current to continuously flow and the
breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case
of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location,
are required.
[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into
the design to prevent device malfunction or breakdown caused by the current resulting from the
inrush current at power ON or the negative current resulting from the back electromotive force at
power OFF. IC breakdown may cause injury, smoke or ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is
unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause
injury, smoke or ignition.
[4] Do not insert de vices in the wrong ori entation or incorrectly.
Make sure that the posit iv e and negative terminals of power supplies are connected prop erly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combusti on.
In addition, do not use any devic e tha t is applied the current with inserting in the wrong orientation
or incorrectly ev en j u st one time.
TA8496FL/FLG
2006-3-6
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Points to remember on handling of ICs
(1) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s
power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the
device’s motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid
this problem, take the effect of back-EMF into consideration in system design.
TA8496FL/FLG
2006-3-6
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