LTM8001
1
8001fd
For more information www.linear.com/LTM8001
Typical applicaTion
FeaTures DescripTion
36VIN, 5A µModule
Regulator with 5-Output
Configurable LDO Array
The LT M
®
8001 is a 36VIN, 5A step-down μModule
®
regu-
lator with a 5-output configurable LDO array. Operating
over an input voltage range of 6V to 36V, the LTM8001
buck regulator supports an output voltage range of 1.2V
to 24V. Following the buck regulator is an array of five
1.1A linear regulators whose outputs may be connected
in parallel to accommodate a wide variety of load combi-
nations. Three of these LDOs are tied to the output of the
buck regulator, while the other two are tied together to
an undedicated input.
The low profile package (3.42mm) enables utilization of
unused space on the bottom of PC boards for high density
point of load regulation. The LTM8001 is packaged in a
thermally enhanced, compact (15mm × 15mm) and low
profile (3.42mm) overmolded ball grid array (BGA) pack-
age suitable for automated assembly by standard surface
mount equipment. The LTM8001 is available with SnPb
(BGA) or RoHS compliant terminal finish.
applicaTions
n Complete Step-Down Switch Mode Power Supply
with Configurable Array of Five LDOs
n Step-Down Switching Power Supply
– Adjustable 10% Accurate Output Current Limit
–Constant-Current, Constant-Voltage Operation
– Wide Input Voltage Range: 6V to 36V
– 1.2V to 24V Output Voltage
n Configurable Output LDO Array
– Five 1.1A Parallelable Outputs
– Outputs Adjustable from 0V to 24V
– Low Output Noise: 90μVRMS (100Hz to 1MHz)
n 15mm × 15mm × 3.42mm Surface Mount
BGA Package
n FPGA, DSP, ASIC and Microprocessor Supplies
n Servers and Storage Devices
n RF Transceivers L, LT , LTC, LTM , µModule, Linear Technology and the Linear logo are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 7199560, 7321203.
5A Output DC/DC µModule Converter
118k
350kHz
VOUT5
SET5
LDO 5
FBO
STEP-DOWN
SWITCHING
REGULATOR
VOUT4
SET4
LDO 4
VOUT3
SET3
BIAS123
BIAS45
COMP
SS
VREF
ILIM
SYNC
LDO 3
19.6k
RT
GND
10µF
VIN45
510k
3.3V
VOUT2
SET2
LDO 2
VOUT1
SET1
1.2V
1A
1.1V
1.5A
0.9V
1.5A
1.8V
1A
VIN0
RUN
VIN
6V TO 36V
VOUT0
LTM8001
LDO 1
45.3k
4.7µF 4.7µF 2.2µF
54.9k 121k
470µF
8001 TA01
100µF
+
LTM8001
2
8001fd
For more information www.linear.com/LTM8001
absoluTe MaxiMuM raTings
VIN0 ........................................................................... 40V
VIN45, BIAS45 ...........................................................25V
BIAS123 ....................................................................25V
FB0, RT, COMP, ILIM, VREF .........................................3V
VOUT0-5 .....................................................................25V
RUN, SYNC, SS ...........................................................6V
SET1-5 (Relative to VOUT1-5, Respectively) ............±0.3V
Current Into SET1-5 ............................................. ±10mA
Current Into RUN Pin ............................................100µA
Maximum Junction Temperature (Notes 2, 3) ....... 125°C
Peak Solder Reflow Body Temperature ................. 245°C
Storage Temperature.............................. 55°C to 125°C
(Note 1)
orDer inForMaTion
pin conFiguraTion
11
10
9
8
7
6
5
4
3
2
1
A B C D E F
BGA PACKAGE
121 PADS (15mm × 15mm × 3.42mm)
G H J K
SS RUN
FBO
COMP
SYNC
VREF ILIM
RT
SET1
VIN0
BANK 1
L
VOUT1
VOUT2
VOUT3
TOP VIEW
VOUT4
VOUT5
SET2SET3SET4
GND
BANK 2
SET5
BIAS45
VOUT0
BANK 4
BIAS123
VIN45
BANK 3
TJMAX = 125°C, θJA = 16.1°C/W, θJCbottom = 5.99°C/W, θJCtop = 13.4°C/W, θJB = 4.98°C/W
θ VALUES DETERMINED PER JEDEC 51-9, 51-12
WEIGHT = 1.8 GRAMS
PART NUMBER PAD OR BALL FINISH
PART MARKING* PACKAGE
TYPE
MSL
RATING
TEMPERATURE RANGE
(SEE NOTE 2)DEVICE FINISH CODE
LT M 8001EY#PBF SAC305 (RoHS) LT M 8001Y e1 BGA 3 –40°C to 125°C
LT M 8001IY#PBF SAC305 (RoHS) LT M 8001Y e1 BGA 3 –40°C to 125°C
LT M 8001IY SnPb (63/37) LT M 8001Y e0 BGA 3 –40°C to 125°C
LT M 8001MPY#PBF SAC305 (RoHS) LT M 8001Y e1 BGA 3 –55°C to 125°C
LT M 8001MPY SnPb (63/37) LT M 8001Y e0 BGA 3 –55°C to 125°C
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
Terminal Finish Part Marking:
www.linear.com/leadfree
Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
LGA and BGA Package and Tray Drawings:
www.linear.com/packaging
LTM8001
3
8001fd
For more information www.linear.com/LTM8001
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. RUN = 3V unless otherwise noted (Note 3).
PARAMETER CONDITIONS MIN TYP MAX UNITS
Buck Regulator
Minimum VIN0 Input Voltage l6 V
VOUT0 Output DC Voltage 0A < IOUT ≤ 3A, RFB0 Open
0A < IOUT ≤ 3A; RFB0 = 536Ω
1.2
24
V
V
VOUT0 Output DC Current 6V < VIN0 < 36V, VOUT = 3.3V 0 5 A
Quiescent Current Into VIN0 RUN = 0V
No Load
0.1
26
1
40
µA
mA
VOUT0 Line Regulation 6V < VIN0 < 36V, IOUT = 1A ±0.5 %
VOUT0 Load Regulation VIN0 = 24V, 0A < IOUT < 5A ±1.2 %
VOUT0 RMS Voltage Ripple VIN0 = 24V, IOUT = 5A 10 mV
Switching Frequency RT = 39.2k
RT = 200k
1000
200
kHz
kHz
Voltage at FB0 Pin l1.15 1.19 1.21 V
Internal FBO Resistor 10
RUN Pin Current RUN = 1.45V 5.5 µA
RUN Threshold Voltage (Falling) 1.49 1.61 V
RUN Threshold Voltage (Rising) 1.63 1.75 V
ILIM Control Range 0 1.5 V
ILIM Pin Current 100 nA
ILIM Current Limit Accuracy ILIM = 1.5V
ILIM = 0.75V
5.1
2.5
6.4
3.4
A
A
VREF Voltage 0.5mA Load 1.9 2 2.1 V
SS Pin Current 11 µA
SYNC Input Low Threshold fSYNC = 500kHz 0.8 V
SYNC Input High Threshold fSYNC = 500kHz 1.2 V
SYNC Input Current SYNC = 0V
SYNC = 2V
–0.1
0.1
µA
µA
LDO Array
SET1-5 Pin Current BIAS123 = BIAS45 = 2V, SETx = 0V, IOUT1-5 = 1mA
l
9.85
9.80
10
10
10.15
10.20
µA
µA
VOUTx – SETx Offset Voltage BIAS123 = BIAS45 = 2V, SETx = 0V, IOUT1-5 = 1mA
l
–4
–6.5
4
6.5
mV
mV
Line Regulation for SET Current 1V < VOUT0 = VIN45 < 22V, IOUTx = 1mA (Note 4) l11 nA
Line Regulation for VOUT1-5 1V < VOUT0 = VIN45 < 22V, IOUTx = 1mA (Note 4) 0.25 mV
Load Regulation for SETx Current IOUT1-5 = 1mA to 1.1A 25 nA
Load Regulation for VOUT1-5 IOUT1-5 = 1mA to 1.1A
l
34
52
mV
mV
Minimum Load Current for VOUT1-5 (Note 4) VOUT0 = VIN45 = BIAS123 = BIAS45 = 10V
VOUT0 = VIN45 = BIAS123 = BIAS45 = 22V
l
l
500
1
µA
mA
BIAS123, BIAS45 Dropout Voltage IOUT1-5 = 100mA
IOUT1-5 = 1.1A
l
1.2
1.6
V
V
VOUT0 to VOUT1-3 and VIN45 to VOUT4-5 Dropout
Voltage
IOUT1-5 = 100mA
IOUT1-5 = 1.1A
l
100
500
mV
mV
LTM8001
4
8001fd
For more information www.linear.com/LTM8001
Typical perForMance characTerisTics
Efficiency vs Output Current,
VOUT0 = 2.5V
Efficiency vs Output Current,
VOUT0 = 3.3V
Efficiency vs Output Current,
VOUT0 = 5V
(TA = 25°C unless otherwise noted. Configured per Table 1, where applicable.)
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. RUN = 3V unless otherwise noted (Note 3).
PARAMETER CONDITIONS MIN TYP MAX UNITS
Maximum VOUT0 to VOUT1-3 and VIN45 to
VOUT4-5 Differential Voltage (Note 5)
IOUT1-5 = 310mA
IOUT1-5 = 125mA
15
22
V
V
BIAS123, BIAS45 Pin Current IOUT1-5 = 100mA
IOUT1-5 = 1.1A
l
6
30
mA
mA
VOUT1-5 Current Limit (Note 5) VOUT1-5 = –0.1V 1.3 A
VOUT1-5 RMS Output Noise VOUT1-5 = 1V, IOUT1-5 = 1.1A, 100Hz to 1MHz 90 µVRMS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: This μModule regulator includes overtemperature protection that
is intended to protect the device during momentary overload conditions.
Junction temperature will exceed 125°C when overtemperature protection
is active. Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
Note 3: The LTM8001E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the full –40°C to
125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTM8001I is guaranteed to meet specifications over the full
–40°C to 125°C internal operating temperature range. The LTM8001MP
is guaranteed to meet specifications over the full –55°C to 125°C internal
operating temperature range. Note that the maximum internal temperature
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 4: No minimum load is required if the respective linear regulator is
off, such as when VOUT0 = 0V, VIN45 = 0V, BIAS123 = 0V or BIAS45 = 0V.
Note 5: The current limit may decrease to zero at input-to-output
differential voltages greater than 22V. Operation at voltages for VOUT0,
VIN45, BIAS123 and BIAS45 is allowed up to a maximum of 25V as long
as the difference between the linear regulator input and output voltage
is below the specified differential voltage. Line and load regulation
specifications are not applicable when the device is in current limit.
VOUT0 CURRENT (A)
0
80
85
90
4
8001 G01
75
70
1 2 3 5
65
60
55
EFFICIENCY (%)
VINO = 12V
VINO = 24V
VINO = 36V
VOUT0 CURRENT (A)
0
80
85
95
90
4
8001 G02
75
70
1 2 3 5
65
60
EFFICIENCY (%)
VINO = 12V
VINO = 24V
VINO = 36V
VOUT0 CURRENT (A)
0
90
95
100
4
8001 G03
85
80
1 2 3 5
75
70
65
EFFICIENCY (%)
VINO = 12V
VINO = 24V
VINO = 36V
LTM8001
5
8001fd
For more information www.linear.com/LTM8001
Typical perForMance characTerisTics
Efficiency vs Output Current,
VOUT0 = 8V
Efficiency vs Output Current,
VOUT0 = 12V
Efficiency vs Output Current,
VOUT0 = 18V
Efficiency vs Output Current,
VOUT0 = 24V
Input Current vs Output Current,
VOUT0 = 2.5V
Input Current vs Output Current,
VOUT0 = 3.3V
(TA = 25°C unless otherwise noted. Configured per Table 1, where applicable.)
Input Current vs Output Current,
VOUT0 = 5V
Input Current vs Output Current,
VOUT0 = 8V
Input Current vs Output Current,
VOUT0 = 12V
VOUT0 CURRENT (A)
0
90
95
100
4
8001 G04
85
80
1 2 3 5
75
70
EFFICIENCY (%)
VINO = 12V
VINO = 24V
VINO = 36V
VOUT0 CURRENT (A)
0
90
95
100
4
8001 G05
85
80
1 2 3 5
75
70
EFFICIENCY (%)
VINO = 24V
VINO = 36V
VOUT0 CURRENT (A)
0
EFFICIENCY (%)
90
95
100
4
8001 G06
85
80
75 1235
VINO = 28V
VINO = 36V
VOUT0 CURRENT (A)
0
EFFICIENCY (%)
90
95
100
4
8001 G07
85
80 1235
VINO = 28V
VINO = 36V
VOUT0 CURRENT (A)
0
INPUT CURRENT (A)
0.9
1.2
1.5
4
8001 G08
0.6
0.3
01235
VINO = 12V
VINO = 24V
VINO = 36V
VOUT0 CURRENT (A)
0
0
INPUT CURRENT (A)
0.2
0.6
0.8
1.0
245
1.8
8001 G09
0.4
1 3
1.2
1.4
1.6
VINO = 12V
VINO = 24V
VINO = 36V
VOUT0 CURRENT (A)
0
INPUT CURRENT (A)
1.5
2.0
2.5
4
8001 G10
1.0
0.5
01235
VINO = 12V
VINO = 24V
VINO = 36V
VOUT0 CURRENT (A)
0
INPUT CURRENT (A)
1.5
2.0
2.5
35
8001 G11
1.0
0.5
01 2 4
3.0
3.5
4.0 VINO = 12V
VINO = 24V
VINO = 36V
VOUT0 CURRENT (A)
0
2.0
2.5
3.0
4
8001 G12
1.5
1.0
1 2 3 5
0.5
0
INPUT CURRENT (A)
VINO = 24V
VINO = 36V
LTM8001
6
8001fd
For more information www.linear.com/LTM8001
Typical perForMance characTerisTics
Input Current vs Output Current,
VOUT0 = 18V
Input Current vs Output Current,
VOUT0 = 24V
Minimum VIN0 vs Output Current,
VOUT0 = 3.3V and Below
Minimum VIN0 vs Output Current,
VOUT0 = 5V
Minimum VIN0 vs Output Current,
VOUT0 = 8V
Minimum VIN0 vs Output Current,
VOUT0 = 12V
(TA = 25°C unless otherwise noted. Configured per Table 1, where applicable.)
Minimum VIN0 vs Output Current,
VOUT0 = 18V
Minimum VIN0 vs Output Current,
VOUT0 = 24V
Output Voltage vs Output Current,
VOUT0 = 2.5V
VOUT0 CURRENT (A)
0
INPUT CURRENT (A)
1.5
2.0
2.5
35
8001 G13
1.0
0.5
01 2 4
3.0
3.5
4.0
VINO = 28V
VINO = 36V
VOUT0 CURRENT (A)
0
INPUT CURRENT (A)
3.0
4.0
5.0
4
8001 G14
2.0
1.0
2.5
3.5
4.5
1.5
0.5
01235
VINO = 28V
VINO = 36V
VOUT0 CURRENT (A)
0
6
7
4
8001 G1
5
1 2 3 5
4
MINIMUM VIN0 VOLTAGE (V)
VOUT0 CURRENT (A)
0
6.75
6.80
4
8001 G16
6.70
1 2 3 5
6.65
MINIMUM VIN0 VOLTAGE (V)
VOUT0 CURRENT (A)
0
9.80
9.85
4
8001 G17
9.75
1 2 3 5
9.70
MINIMUM VIN0 VOLTAGE (V)
VOUT0 CURRENT (A)
0
13.85
13.90
13.95
4
8001 G18
13.80
13.75
1 2 3 5
13.70
13.65
MINIMUM VIN0 VOLTAGE (V)
VOUT0 CURRENT (A)
0
19.69
19.70
19.71
4
8001 G19
19.68
19.67
1 2 3 5
19.66
19.65
19.64
MINIMUM VIN0 VOLTAGE (V)
VOUT0 CURRENT (A)
0
MINIMUM VIN0 VOLTAGE (V)
25.70
26.00
26.05
26.10
24
8001 G20
25.60
25.90
25.80
25.65
25.95
25.55
25.85
25.75
135
LOAD CURRENT (A)
–10
2.0
2.5
3.5
5
8001 G21
1.5
1.0
–5 0 10
0.5
0
3.0
OUTPUT VOLTAGE (V)
LTM8001
7
8001fd
For more information www.linear.com/LTM8001
Typical perForMance characTerisTics
ILIM Voltage vs Maximum IOUT0
Output Current
VIN0 Input Current vs Voltage,
VOUT0 Shorted
Temperature Rise vs VOUT0 Current,
Buck Regulator, VOUT0 = 3.3V
Temperature Rise vs VOUT0 Current,
Buck Regulator, VOUT0 = 5V
Temperature Rise vs VOUT0 Current,
Buck Regulator, VOUT0 = 2.5V
Temperature Rise vs VOUT0 Current,
Buck Regulator, VOUT0 = 8V
(TA = 25°C unless otherwise noted. Configured per Table 1, where applicable.)
Temperature Rise vs VOUT0 Current,
Buck Regulator, VOUT0 = 12V
Temperature Rise vs VOUT0 Current,
Buck Regulator, VOUT0 = 18V
Temperature Rise vs VOUT0 Current,
Buck Regulator, VOUT0 = 24V
ILIM VOLTAGE (V)
0
6
4
2
0
–2
–4
–6
–8 0.75 1.25
8001 G22
0.25 0.5 1 1.5
MAXIMUM CURRENT (A)
VIN0 VOLTAGE (V)
0
0
VIN0 INPUT CURRENT (mA)
100
200
300
400
600
612 18 24
8001 G23
30 36
500
VOUT0 CURRENT (A)
0
0
TEMPERATURE RISE (°C)
10
20
30
40
50
60
1 2 3 4
8001 G24
5
12VIN
24VIN
36VIN
VOUT0 CURRENT (A)
0
0
TEMPERATURE RISE (°C)
10
20
30
40
50
60
1 2 3 4
8001 G25
5
12VIN
24VIN
36VIN
VOUT0 CURRENT (A)
0
50
60
70
4
8001 G26
40
30
1 2 3 5
20
10
0
TEMPERATURE RISE (°C)
12VIN
24VIN
36VIN
VOUT0 CURRENT (A)
0
TEMPERATURE RISE (°C)
30
40
50
35
8001 G27
20
10
01 2 4
60
70
80
12VIN
24VIN
36VIN
VOUT0 CURRENT (A)
0
TEMPERATURE RISE (°C)
60
80
100
4
40
20
50
70
90
30
10
01235
24VIN
36VIN
VOUT0 CURRENT (A)
0
0
TEMPERATURE RISE (°C)
20
40
60
80
100
120
1 2 3 4
8001 G29
5
28VIN
36VIN
VOUT0 CURRENT (A)
0
TEMPERATURE RISE (°C)
60
80
100
4
8001 G30
40
20
50
70
90
30
10
01235
36VIN
LTM8001
8
8001fd
For more information www.linear.com/LTM8001
Typical perForMance characTerisTics
LDO Input-to-Output Dropout
Voltage vs Output Current
LDO VBIAS-to-Output Dropout
Voltage vs Output Current
LDO Current Limit vs Input-to-
Output Differential Voltage
LDO Temperature Rise vs LDO
Output Current (VIN = 24V,
VOUT0 = 12V, 1 LDO Powered)
LDO Temperature Rise vs LDO
Output Current (VIN = 24V,
VOUT0 = 12V, 5 LDOs in Parallel)
(TA = 25°C unless otherwise noted. Configured per Table 1, where applicable.)
LDO Input Voltage Ripple Rejection
(VOUT4 = 2.5V,
VIN45 = VBIAS45 = 4.5V)
LDO Input Voltage Ripple Rejection
(VOUT4 = 2.5V, VBIAS45 = 4.5V,
VIN45 = 3.5V)
OUTPUT CURRENT (mA)
0
INPUT-TO-OUTPUT DROPOUT VOLTAGE (mV)
150
200
250
600 1000
8001 G31
100
50
0200 400 800
300
350
400
OUTPUT CURRENT (mA)
0
BIAS-TO-OUTPUT DROPOUT VOLTAGE (V)
1.40
1.42
1.44
600 1000
8001 G32
1.38
1.36
1.34 200 400 800
1.46
1.48
1.52
1.50
INPUT-TO-OUTPUT DIFFERENTIAL (V)
0
LDO CURRENT LIMIT (mA)
800
1000
1200
40
8001 G33
600
400
010 20 30
200
1600
1400
LDO OUTPUT CURRENT (mA)
0
0
TEMPERATURE RISE (°C)
20
40
60
80
120
500 1000
8001 G34
1500
LDO
INPUT-TO-OUTPUT
DIFFERENTIAL
VOLTAGE
100
0.5V
1.6V
2.4V
4V
7V
9.5V
11.9V
TOTAL LDO OUTPUT CURRENT (A)
0
0
TEMPERATURE RISE (°C)
20
40
60
80
120
1234
8001 G35
5
LDO
INPUT-TO-OUTPUT
DIFFERENTIAL
VOLTAGE
100
0.5V
0.9V
2V
4V
7V
8.7V
11.9V
FREQUENCY (Hz)
10
RIPPLE REJECTION (dB)
60
80
100
8001 G36
40
20
50
70
90
30
10
0102103104105106
ILOAD = 100mA
ILOAD = 1.1A
FREQUENCY (Hz)
10
RIPPLE REJECTION (dB)
60
80
100
8001 G37
40
20
50
70
90
30
10
0102103104105106
ILOAD = 100mA
ILOAD = 1.1A
LTM8001
9
8001fd
For more information www.linear.com/LTM8001
pin FuncTions
VIN0 (Bank 1): The VIN0 bank supplies current to the
LTM8001’s internal regulator and to the internal power
switches. This pin must be locally bypassed with an ex-
ternal, low ESR capacitor; see Table 1 for recommended
values.
GND (Bank 2): Tie these GND pins to a local ground plane
below the LTM8001 and the circuit components. In most
applications, the bulk of the heat flow out of the LTM8001
is through these pads, so the printed circuit design has a
large impact on the thermal performance of the part. See
the PCB Layout and Thermal Considerations sections for
more details. Return the feedback divider (RFB0) to this net.
VIN45 (Bank 3): Input to the LDOs connected to VOUT4 and
VOUT5. It must be locally bypassed with a low ESR capacitor.
VOUT0 (Bank 4): Switching Power Converter Output Pins.
Apply the output filter capacitor and the output load between
these pins and the GND pins. In most cases, an output
capacitance made up of a combination of ceramic and elec-
trolytic capacitors yields the optimal volumetric solution.
BIAS45 (Pin A8): This pin is the supply pin for the control
circuitry of the LDOs connected to VOUT4 and VOUT5. For
the LDOs to regulate, this voltage must be more than
1.2V to 1.6V greater than the output voltage (see Dropout
specifications).
BIAS123 (Pin B8): This pin is the supply pin for the
control circuitry of the LDOs connected to VOUT1-VOUT3.
For the LDOs to regulate, this voltage must be more than
1.2V to 1.6V greater than the output voltage (see Dropout
specifications).
SS (Pin K4): The Soft-Start Pin. Place an external capacitor
to ground to limit the regulated current during start-up
conditions. The soft-start pin has an 11μA charging current.
SYNC (Pin K7): Frequency Synchronization Pin. This pin
allows the switching frequency to be synchronized to
an external clock. The RT resistor should be chosen to
operate the internal clock at 20% slower than the SYNC
pulse frequency. This pin should be grounded when not
in use. Do not leave this pin floating. When laying out the
board, avoid noise coupling to or from the SYNC trace.
See the Switching Frequency Synchronization section in
Applications Information.
VREF (Pin K8): Buffered 2V Reference Capable of 0.5mA
Drive.
RUN (Pin L4): The RUN pin acts as an enable pin and
turns on the internal circuitry. The pin does not have any
pull up or pull down, requiring a voltage bias for normal
part operation. The RUN pin is internally clamped, so it
may be pulled up to a voltage source that is higher than
Typical perForMance characTerisTics
(TA = 25°C unless otherwise noted. Configured per Table 1, where applicable.)
LDO VBIAS Ripple Rejection
(VOUT4 = 2.5V, VBIAS45 = 4.5V,
VIN45 = 3.5V) LDO Output Ripple
FREQUENCY (Hz)
10
RIPPLE REJECTION (dB)
60
80
100
8001 G38
40
20
50
70
90
30
10
0102103104105106
ILOAD = 100mA
ILOAD = 1.1A
2µs/DIV
VOUT = 1.2V AT 700mA
COUT1 = 22µF
CSET1 = 1nF
VIN = 12V
VOUT0 = 1.8V LOADED TO
A TOTAL CURRENT OF 5A
100MHz BW
8001 G39
1mV/DIV
LTM8001
10
8001fd
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block DiagraM
CURRENT
MODE
CONTROLLER
2.2µH
10k
0.2µF 2.2µF
VIN0
RUN
COMP
ILIM
VREF
SYNC
SS
RSENSE VOUT0
VOUT1
SET1
INTERNAL
REGULATOR
VIN0
GND RT FB0 BIAS123 BIAS45 VIN45
1.1A LDO
VOUT2
SET2
1.1A LDO
VOUT3
SET3
1.1A LDO
VOUT4
SET4
1.1A LDO
VOUT5
SET5
8001 BD
1.1A LDO
the absolute maximum voltage rating of 6V through a
resistor, provided the pin current does not exceed 100µA.
FB0 (Pin L5): The LTM8001 regulates its FB0 pin to 1.19V.
Connect the adjust resistor from this pin to ground. The
value of RFB0 is given by the equation:
RFBO =
11.9
V
OUT
1.19
where RFB0 is in kΩ.
COMP (Pin L6): Compensation Pin. This pin is generally
not used. The LTM8001 is internally compensated, but
some rare situations may arise that require a modifica-
tion to the control loop. This pin connects directly to the
input PWM comparator of the LTM8001. In most cases,
no adjustment is necessary. If this function is not used,
leave this pin open.
RT (Pin L7): The RT pin is used to program the switch-
ing frequency of the LTM8001 by connecting a resistor
from this pin to ground. The Applications Information
section of the data sheet includes a table to determine the
recommended resistance value and switching frequency.
When using the SYNC function, set the frequency to be
20% lower than the SYNC pulse frequency. Do not leave
this pin open.
ILIM (Pin L8): The ILIM pin reduces the maximum regulated
output current of the LTM8001. The maximum control volt-
age range is 1.5V. ILIM voltages above 1.5V have little or
no effect. If this function is not used, tie this pin to VREF.
SET1, SET2, SET3, SET4, SET5 (Pins L9, H11, G11, D11,
A9): These pins set the regulation point for each LDO. A
fixed current of 10μA flows out of this pin through a single
external resistor, which programs the output voltage of
the device. Output voltage range is zero to the absolute
maximum rated output voltage. The transient performance
can be improved by adding a small capacitor from the
SET pin to ground.
VOUT1 (Pins L10, L11), VOUT2 (Pins J11, K11), VOUT3 (Pins
E11, F11), VOUT4 (Pins B11, C11), VOUT5 (Pins A10, A11):
These are the power outputs of the individual LDOs. There
must be a minimum load current of 1mA or the output may
not regulate. The internal LDOs are rated for positive volt-
ages between their inputs and outputs. Avoid applications
where the internal LDOs can experience a negative voltage,
even during start-up and turn-off transients
pin FuncTions
LTM8001
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operaTion
The LTM8001 consists of two major parts: the first is a
standalone nonisolated step-down switching DC/DC power
converter that can deliver up to 5A of output current. The
second part is an array of five parallelable 1.1A LDOs. The
DC/DC converter provides a precisely regulated output
voltage programmable via one external resistor from 1.2V
to 24V. The input voltage range is 6V to 36V. Given that it
is a step-down converter, make sure that the input volt-
age is high enough to support the desired output voltage
and load current. The linear regulator array consists of
five low drop-out regulators, of which three inputs are
dedicated to the buck converter’s output (VOUT0) and two
tie to an undedicated input (VIN45). Each individual linear
regulator may be set to a unique voltage through its SET
pin, or may be paralleled with other LDOs by tying their
respective SET and VOUT pins together.
The LTM8001 step-down switching converter utilizes fixed
frequency, average current mode control to accurately
regulate the output current. This results in a constant-
voltage, constant-current output characteristic, making
the LTM8001’s step-down regulator well suited for many
supercapacitor and battery charging applications. As shown
in the Typical Performance Characteristics, the current limit
works in both directions. The control loop will regulate the
current in the internal inductor. Once the VOUT0 output has
reached the regulation voltage determined by the resistor
from the FBO pin to ground, the voltage regulation loop will
reduce the output current and maintain the output voltage.
The ILIM input may be used to set the maximum allowable
current output of the LTM8001. The analog control range
of the ILIM pin is from 0V to 1.5V. If the ILIM pin is raised
above 1.5V, there is little or no effect.
The RUN pin functions as a precision enable for the step-
down switching converter connected to VOUT0. If all VOUT1-3
LDO inputs including BIAS are tied to VOUT0, the RUN pin
will also implicitly enable or disable these LDOs as well. If
an external power source is applied to BIAS123 alone or
in combination with VOUT0, RUN will not disable VOUT1-3.
Refer to the Applications Information section Shorted
Input Protection if VOUT0 is forced above VIN0. When the
voltage at the RUN pin is lower than 1.55V, switching is
terminated. Below the turn-on threshold, the RUN pin sinks
5.5μA. This current can be used with a resistor between
RUN and VIN0 to set hysteresis. Please refer to the UVLO
and Shutdown section in the Applications Information
for further details. During start-up, the SS pin is held low
until the part is enabled, after which the capacitor at the
soft-start pin is charged with an 11μA current source.
The LTM8001 is equipped with thermal shutdown circuitry
to protect the device during momentary overload condi-
tions. It is set above the 125°C absolute maximum internal
temperature rating to avoid interfering with normal speci-
fied operation, so internal device temperatures will exceed
the absolute maximum rating when the overtemperature
protection is active. Thus, continuous or repeated activa-
tion of the thermal shutdown may impair device reliability.
During thermal shutdown, all switching is terminated and
the SS pin is driven low.
The switching frequency is determined by a resistor at
the RT pin. The LTM8001 may also be synchronized to
an external clock through the use of the SYNC pin. Please
see the Switching Frequency Synchronization section in
the Applications Information for further details.
The VOUT1-5 linear regulators are easy to use and have
all the protection features expected in high performance
regulators. Included are short-circuit protection and safe
operating area protection, as well as thermal shutdown.
These linear regulators are especially well suited to ap-
plications needing multiple rails. Their architecture allows
their outputs to be adjusted down to zero volts. The output
voltage is set by a single resistor, handling modern low
voltage digital ICs as well as allowing easy parallel opera-
tion and simplified thermal management.
The linear regulators can be operated in two modes. One
mode has the BIAS123 and BIAS45 pins connected to the
linear regulator power input pins (VOUT0 and VIN45) which
gives a limitation of about 1.6V dropout. In the other mode,
the BIAS123 and BIAS45 pins can be tied to a voltage at
least 1.6V above their highest respective outputs. The linear
regulator power input (VOUT0 and VIN45) can then be set
to a lower voltage that meets the dropout requirement,
minimizing the power dissipation.
LTM8001
12
8001fd
For more information www.linear.com/LTM8001
applicaTions inForMaTion
For most applications, the design process is straight
forward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input range and VOUT0 output voltage.
2. Apply the recommended CIN0, COUT0, RFB0 and RT val-
ues. Note that ceramic and electrolytic capacitors are
recommended. These are intended to work in concert
to optimize performance and solution size; apply both
capacitors.
3. Apply the set resistors for the VOUT1, VOUT2, VOUT3,
VOUT4 and VOUT5 regulators. To set the voltage of each
linear regulator, use the equation
RSETX =
V
OUTX
10µA
where the value of RSET is in Ohms. Note that there is
no minimum positive output voltage for the regulator,
but a minimum load current is required to maintain
regulation regardless of output voltage, (please see
Electrical Characteristics table). For true zero voltage
output operation, this minimum load current must be
returned to a negative supply voltage. If paralleling the
linear regulators, set the output of each regulator to
the same voltage by tying the SETx pins together and
applying a single resistor. The value of the single set
resistor is given by the equation:
R
SET =
V
OUT
10µA n
where n is the number of regulators paralleled.
4. Apply the output capacitors for the VOUT1, VOUT2, VOUT3,
VOUT4 and VOUT5 regulators. A minimum output capaci-
tor of 2.2μF with an ESR of 0.5Ω or less is recommended
to prevent oscillations.
While these component combinations have been tested for
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions. Bear in mind that the maximum
output current is limited by junction temperature, the rela-
tionship between the input and output voltage magnitude
and other factors. Please refer to the graphs in the Typical
Performance Characteristics section for guidance.
The maximum frequency (and attendant RT value) at
which the LTM8001 should be allowed to switch is given
in Table 1 in the fMAX column, while the recommended
frequency (and RT value) for optimal efficiency over the
given input condition is given in the fOPTIMAL column.
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Switching Frequency Synchronization section for details.
Capacitor Selection Considerations
The CIN and COUT capacitor values in Table 1 are the
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
necessary. Again, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions.
Ceramic capacitors are small, robust and have very low ESR.
However, not all ceramic capacitors are suitable. X5R and
X7R types are stable over temperature, applied voltage and
give dependable service. Other types, including Y5V and
Z5U have very large temperature and voltage coefficients
of capacitance. In an application circuit they may have
only a small fraction of their nominal capacitance result-
ing in much higher output voltage ripple than expected.
Many of the output capacitances given in Table 1 specify
an electrolytic capacitor. Ceramic capacitors may also be
used in the application, but it may be necessary to use
more of them. Many high value ceramic capacitors have a
large voltage coefficient, so the actual capacitance of the
component at the desired operating voltage may be only
a fraction of the specified value. Also, the very low ESR of
ceramic capacitors may necessitate additional capacitors
for acceptable stability margin.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8001. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8001 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot Plugging Safely section.
LTM8001
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8001fd
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applicaTions inForMaTion
LTM8001 Table 1: Recommended Component Values and Configuration for VOUT0 (TA = 25°C)
VIN0 VOUT0 CIN0 COUT0 (CERAMIC) COUT0 (ELECTROLYTIC) RFB0 fOPTIMAL RT(OPTIMAL) fMAX RT(MIN)
6V to 36V 1.2V 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
Open 200kHz 200k 250kHz 169k
6V to 36V 1.5V 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
38.3k 300kHz 140k 350kHz 118k
6V to 36V 1.8V 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
19.6k 350kHz 118k 400kHz 102k
6V to 36V 2.5V 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M 9.09k 450kHz 90.9k 525kHz 78.7k
6V to 36V 3.3V 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M 5.62k 550kHz 75.0k 625kHz 64.9k
7V to 36V 5V 10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON,
16SVPC120M
3.09k 600kHz 68.1k 700kHz 57.6k
10V to 36V 8V 10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON,
16SVPC120M
1.74k 625kHz 64.9k 750kHz 53.6k
15V to 36V 12V 10µF, 50V, 1210 47µF, 16V, 1210 120µF, 16V, 27mΩ, OS-CON,
16SVPC120M
1.10k 650kHz 61.9k 800kHz 49.9k
22V to 36V 18V 10µF, 50V, 1210 22µF, 25V, 1210 47µF, 20V, 45mΩ, OS-CON, 20SVPS47M 715Ω 675kHz 59.0k 900kHz 44.2k
28V to 36V 24V 4.7µF, 50V,
1210
10µF, 50V, 1206 47µF, 35V, 30mΩ, OS-CON, 35SVPC47M 523Ω 700kHz 57.6k 1MHz 39.2k
9V to 15V 1.2V 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
Open 200kHz 200k 525kHz 78.7k
9V to 15V 1.5V 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
38.3k 300kHz 140k 650kHz 61.9k
9V to 15V 1.8V 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
19.6k 350kHz 118k 800kHz 49.9k
9V to 15V 2.5V 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M 9.09k 450kHz 90.9k 1MHz 39.2k
9V to 15V 3.3V 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M 5.62k 550kHz 75.0k 1MHz 39.2k
9V to 15V 5V 10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON,
16SVPC120M
3.09k 600kHz 68.1k 1MHz 39.2k
10V to 15V 8V 10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON,
16SVPC120M
1.74k 625kHz 64.9k 1MHz 39.2k
18V to 36V 1.2V 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
Open 200kHz 200k 250kHz 169k
18V to 36V 1.5V 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
38.3k 300kHz 140k 350kHz 118k
18V to 36V 1.8V 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
19.6k 350kHz 118k 400kHz 102k
18V to 36V 2.5V 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M 9.09k 450kHz 90.9k 525kHz 78.7k
18V to 36V 3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M 5.62k 550kHz 75.0k 625kHz 64.9k
18V to 36V 5V 10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON,
16SVPC120M
3.09k 600kHz 68.1k 700kHz 57.6k
18V to 36V 8V 10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON,
16SVPC120M
1.74k 625kHz 64.9k 750kHz 53.6k
18V to 36V 12V 10µF, 50V, 1210 47µF, 16V, 1210 120µF, 16V, 27mΩ, OS-CON,
16SVPC120M
1.10k 650kHz 61.9k 800kHz 49.9k
Note: An input bulk capacitor is required.
LTM8001
14
8001fd
For more information www.linear.com/LTM8001
applicaTions inForMaTion
Programming Switching Frequency
The LTM8001 has an operational switching frequency
range between 200kHz and 1MHz. This frequency is
programmed with an external resistor from the RT pin to
ground. Do not leave this pin open under any condition.
See Table 2 for resistor values and the corresponding
switching frequencies.
Table 2. RT Resistor Values and Their Resultant Switching
Frequencies
SWITCHING FREQUENCY (MHz) RT (kΩ)
1 39.2
0.75 53.6
0.5 82.5
0.3 140
0.2 200
Switching Frequency Trade-Offs
It is recommended that the user apply the optimal RT resis-
tor value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8001 is flexible enough to accommodate a wide range
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8001 in some fault conditions. A frequency that is too
low can result in a final design that has too much output
ripple or too large of an output capacitor.
Switching Frequency Synchronization
The nominal switching frequency of the LTM8001 is
determined by the resistor from the RT pin to GND and
may be set from 200kHz to 1MHz. The internal oscillator
may also be synchronized to an external clock through
the SYNC pin. The external clock applied to the SYNC pin
must have a logic low below 0.8V and a logic high greater
than 1.2V. The input frequency must be 20% higher than
the frequency determined by the resistor at the RT pin.
The SYNC pin must be tied to GND if the synchroniza-
tion to an external clock is not required. When SYNC is
grounded, the switching frequency is determined by the
resistor at the RT pin.
Soft-Start
The soft-start function controls the slew rate of the power
supply output VOUT0 voltage during start-up. A controlled
output voltage ramp minimizes output voltage overshoot,
reduces inrush current from the VIN0 supply, and facili-
tates supply sequencing. A capacitor connected from the
SS pin to GND programs the slew rate. The capacitor is
charged from an internal 11μA current source to produce
a ramped output voltage.
Maximum Output Current Adjust
The LTM8001 features an adjustable accurate current
limit. To adjust the load current limit, an analog voltage
is applied to the ILIM pin. Varying the voltage between
0V and 1.5V adjusts the maximum current between the
minimum and the maximum current, 5.6A typical. Above
1.5V, the control voltage has no effect on the regulated
inductor current. Graphs of the output current vs ILIM volt-
ages are given in the Typical Performance Characteristics
section. The LTM8001 provides a 2V reference voltage for
conveniently applying resistive dividers to set the current
limit. The current limit can be set as shown in Figure 1
with the following equation:
IMAX =7.47
R2
R1+R2
A convenient value of R1 may be 10k. In that case,
R2=
10 I
MAX
7.47 I
MAX
kΩ
LTM8001
VREF
R1
2V
R2
8001 F01
ILIM
Figure 1. Setting the Output Current Limit, IMAX
LTM8001
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Load Current Derating Using the ILIM Pin
In high current applications, derating the maximum cur-
rent based on operating temperature may prevent damage
to the load. In addition, many applications have thermal
limitations that will require the regulated current to be
reduced based on the load and/or board temperature. To
achieve this, the LTM8001 uses the ILIM pin to reduce
the effective regulated current in the load. While ILIM
programs the regulated current in the load, it may also
be configured to reduce the regulated current. The load/
board temperature derating is programmed using a resistor
divider with a temperature dependant resistance, as shown
in Figure 2. When the board/load temperature rises, the
ILIM voltage will decrease.
Thermal Shutdown
If the part is too hot, the LTM8001 engages its thermal
shutdown, terminates switching and discharges the soft-
start capacitor. When the part has cooled, the part automati-
cally restarts. This thermal shutdown is set to engage at
temperatures above the 125°C absolute maximum internal
operating rating to ensure that it does not interfere with
functionality in the specified operating range. This means
that internal temperatures will exceed the 125°C absolute
maximum rating when the overtemperature protection is
active, possibly impairing the device’s reliability.
UVLO and Shutdown
The LTM8001 VOUT0 step-down regulator has an internal
UVLO that terminates switching, resets all logic, and dis-
charges the soft-start capacitor for input voltages below
4.2V. The LTM8001 also has a precision RUN function
that enables switching when the voltage at the RUN pin
rises to 1.68V and shuts down the LTM8001 when the
RUN pin voltage falls to 1.55V. There is also an internal
current source that provides 5.5μA of pull-down current to
program additional UVLO hysteresis. For RUN rising, the
current source is sinking 5.5µA until RUN = 1.68V, after
which it turns off. For RUN falling, the current source is
off until the RUN = 1.55V, after which it sinks 5.5µA. The
following equations determine the voltage divider resis-
tors for programming the falling UVLO voltage and rising
enable voltage (VENA) as configured in Figure 4.
R2=
V
ENA
1.084 UVLO
5.5µA
R1=1.55 R2
UVLO1.55
applicaTions inForMaTion
LTM8001
VREF
RNTC RX
RVRV
R2
R1
(OPTION A TO D)
8001 F02
ILIM
B
RNTC
A
RNTC R
X
D
RNTC
C
Figure 2. Load Current Derating vs
Temperature Using an NTC Resistor
VOUT0 Output Overvoltage Protection
The LTM8001 switching regulator uses the FB0 pin to both
regulate the output voltage and to provide a high speed
overvoltage lockout to avoid high voltage output condi-
tions. If the output voltage exceeds 125% of the regulated
voltage level (1.5V at the FB0 pin), the LTM8001 terminates
switching and shuts down switching for a brief period. The
output voltage at which output overvoltage protection en-
gages must be greater than 1.5V and is set by the equation:
VOUT =1.5V 1+10k
RFB0
where RFB0 is shown in Figure 3.
If the output overvoltage protection engages, the LTM8001
will stop switching. If this is due to some external power
source connected to VOUT0, this source will be free to pull
up VOUT0. If the VOUT0 voltage exceeds the VIN0 input, an
internal power diode will clamp the output to a diode drop
above the input.
LTM8001
VOUT
VOUT
RFB0
8001 F03
FB0
Figure 3. Voltage Regulation and Overvoltage
Protection Feedback Connections
LTM8001
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The RUN pin has an absolute maximum voltage of 6V.
To accommodate the largest range of applications, there
is an internal Zener diode that clamps this pin, so that it
can be pulled up to a voltage higher than 6V through a
resistor that limits the current to less than 100µA. For
applications where the supply range is greater than 4:1,
size R2 greater than 375k.
Input Precautions
The LTM8001 contains a step-down switching regulator
that operates at a user-selectable frequency in forced
continuous mode. Step-down switching regulators that
operate in forced continuous mode are capable of both
sinking and sourcing current to maintain output voltage
regulation
When the LTM8001 is sinking current, it maintains its
output voltage regulation by power conversion, not power
dissipation. This means that the energy provided to the
LTM8001 is in turn delivered to its input power bus.
There must be something on this power bus to accept or
use the energy, or the LTM8001’s input voltage will rise.
Left unchecked, the energy can raise the input voltage
above the absolute maximum voltage rating and damage
the LTM8001.
In many cases, the system load on the LTM8001 input
bus will be sufficient to absorb the energy delivered by the
μModule regulator. The power required by other devices
will consume more than enough to make up for what
the LTM8001 delivers. In cases where the LTM8001 is
the largest or only power converter, this may not be true
and some means may need to be devised to prevent the
LTM8001’s input from rising too high. Figure 5a shows a
passive crowbar circuit that will dissipate energy during
momentary input overvoltage conditions. The breakdown
voltage of the zener diode is chosen in conjunction with
the resistor R to set the circuit’s trip point. The trip point
is typically set well above the maximum VIN voltage under
normal operating conditions. This circuit does not have a
precision threshold, and is subject to both part-to-part and
temperature variations, so it is not suitable for applications
where high accuracy is required or large voltage margins
are not available.
The circuit in Figure 5b also dissipates energy during mo-
mentary overvoltage conditions, but is more precise than
that in Figure 5a. It uses an inexpensive comparator and
the VREF output of the LTM8001 to establish a reference
voltage. The optional hysteresis resistor in the comparator
circuit avoids MOSFET chatter. Figure 5c shows a circuit
that latches on and crowbars the input in an overvoltage
applicaTions inForMaTion
Load Sharing
The VOUT0 step-down switching converter operates in
fixed frequency forced continuous mode, so it is able to
source and sink current. It is therefore not suitable for
load current sharing.
The linear regulators connected to VOUT1-VOUT5 are inter-
nally ballasted and may be paralleled. To do this, simply
tie the VOUTx and SETx terminals together. When the SET
pins of the regulators are tied together, the RSET resistor
is determined by the equation:
RSET =
V
OUT
n10µA
where n is the number of linear regulator outputs tied
together.
All paralleled LDOs must be active in order for this equa-
tion to be true, as it is assumed that all paralleled LDOs
are contributing 10µA to a single voltage set resistor. If
any LDO is off or inactive, it will be unable to contribution
its share of the set current and the output voltage will be
lower than expected.
When paralleling LDOs, tie all of the VOUTx and all of the
SETx pins together. Examples are shown in the Typical
Applications section.
LTM8001
VIN
R2
V
IN
R1
8001 F04
RUN
Figure 4. UVLO Configuration
LTM8001
17
8001fd
For more information www.linear.com/LTM8001
event. The SCR latches when the input voltage threshold
is exceeded, so this circuit should be used with a fuse, as
shown, or employ some other method to interrupt current
from the load.
As mentioned, the LTM8001 sinks current by energy
conversion and not dissipation. Thus, no matter what
protection circuit that is used, the amount of power that the
protection circuit must absorb depends upon the amount
of power at the input. For example, if the output voltage is
2.5V and can sink 5A, the input protection circuit should
be designed to absorb at least 7.5W. In Figures 5a and 5b,
let us say that the protection activation threshold is 30V.
Then the circuit must be designed to be able to dissipate
7.5W and accept 7.5W/30V = 250mA.
Figures 5a through 5c are crowbar circuits, which attempt
to prevent the input voltage from rising above some level
by clamping the input to GND through a power device. In
some cases, it is possible to simply turn off the LTM8001
when the input voltage exceeds some threshold. This
is possible when the voltage power source that drives
current into VOUT never exceeds VIN. An example of this
circuit is shown in Figure 5d. When the power source on
the output drives VIN above a predetermined threshold,
the comparator pulls down on the RUN pin and stops
switching in the LTM8001. When this happens, the input
capacitance needs to absorb the energy stored within the
LTM8001’s internal inductor, resulting in an additional
voltage rise. As shown in the Block Diagram, the internal
applicaTions inForMaTion
VIN
ZENER
DIODE
R
Q
8001 F05a
LTM8001
LOAD
CURRENT
GND
VOUT0
SOURCING
LOAD
VIN
VREF
8001 F05b
Q
LTM8001
LOAD
CURRENT
GND
VOUT0
SOURCING
LOAD
OPTIONAL
HYSTERESIS
RESISTOR
+
VIN
ZENER
DIODE
SCR
8001 F05a
LTM8001
LOAD
CURRENT
GND
VOUT0
FUSE
SOURCING
LOAD
VIN
RUN
8001 F05d
10µF
LTM8001
LOAD
CURRENT
GND
VOUT0
SOURCING
LOAD
EXTERNAL
REFERENCE
VOLTAGE
+
Figure 5a. The MOSFET Q Dissipates Momentary Energy to
GND. The Zener Diode and Resistor Are Chosen to Ensure That
the MOSFET Turns On Above the Maximum VIN Voltage Under
Normal Operation
Figure 5b. The Comparator in This Circuit Activates the Q
MOSFET at a More Precise Voltage Than the One Shown in
Figure 5a. The Reference for the Comparator is Derived from
the VREF Pin of the LTM8001
Figure 5c. The SCR Latches On When the Activation Threshold is
Reached, So a Fuse or Some Other Method of Disconnecting the
Load Should be Used
Figure 5d. This Comparator Circuit Turns Off the LTM8001 if
the Input Rises Above a Predetermined Threshold. When the
LTM8001 Turns Off, the Energy Stored in the Internal Inductor
Will Raise VIN a Small Amount Above the Threshold.
LTM8001
18
8001fd
For more information www.linear.com/LTM8001
inductor value is 2.2uH. If the LTM8001 negative current
limit is set to 5A, for example, the energy that the input
capacitance must absorb is 1/2 LI2 = 27.5μJ. Suppose
the comparator circuit in Figure 5d is set to pull the RUN
pin down when VTRIP = 15V. The input voltage will rise
according to the capacitor energy equation:
1
2
C VIN2 VTRIP2
( )
=27.5µJ
If the total input capacitance is 10μF, the input voltage
will rise to:
27.5µJ=
1
2
10µF VIN215V2
( )
VIN = 15.2V
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8001. The LTM8001 is neverthe-
less a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 6
for a suggested layout. Ensure that the grounding and heat
sinking are acceptable. A few rules to keep in mind are:
1. Place the RSETx, RFB0 and RT resistors as close as pos-
sible to their respective pins.
2. Place the CIN0 capacitor as close as possible to the VIN0
and GND connection of the LTM8001.
3. Place the ceramic COUT0 capacitor as close as possible
to the VOUT0 and GND connection of the LTM8001. The
electrolytic COUT0 capacitor may be farther from the
LTM8001. Place the remaining COUTx output capacitors
as close as possible to the VOUTx pins.
4. Place the CIN0 and COUT0 capacitors such that their
ground currents flow directly adjacent or underneath
the LTM8001.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8001.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 6. The LTM8001 can benefit from
the heat sinking afforded by vias that connect to internal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
applicaTions inForMaTion
Figure 6. Layout Showing Suggested External Components,
GND Plane and Thermal Vias
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8001. However, these capacitors
can cause problems if the LTM8001 is plugged into a live
input supply (see Application Note 88 for a complete dis-
cussion). The low loss ceramic capacitor combined with
stray inductance in series with the power source forms an
underdamped tank circuit, and the voltage at the VIN0 pin
of the LTM8001 can ring to more than twice the nominal
input voltage, possibly exceeding the LTM8001’s rating
VOUT1
VIN0
VREF
SYNC RT
COMP
FBO
SS RUN
ILIM
VOUT2
VOUT3
VOUT4
VOUT5
VIN45
VOUT0
COUT0
COUT5
GND
8001 F06
GND
CIN0
THERMAL VIAS
SET5
SET4 SET3 SET2
SET1
BIAS45
BIAS123
COUT1
COUT2
COUT3
COUT4
GNDGND
LTM8001
19
8001fd
For more information www.linear.com/LTM8001
and damaging the part. If the input supply is poorly con-
trolled or the user will be plugging the LTM8001 into an
energized supply, the input network should be designed
to prevent this overshoot. This can be accomplished by
installing a small resistor in series to VIN0, but the most
popular method of controlling input voltage overshoot is
to add an electrolytic bulk capacitor to the VIN0 net. This
capacitor’s relatively high equivalent series resistance
damps the circuit and eliminates the voltage overshoot.
The extra capacitor improves low frequency ripple filtering
and can slightly improve the performance of the circuit,
though it may be physically large.
Shorted Input Protection
Care needs to be taken in systems where the VOUT0 out-
put will be held high when the input to the LTM8001 is
absent. If the VIN0 is allowed to float and the RUN pin is
held high (either by a logic signal or because it is tied to
VIN0), then the LTM8001’s internal circuitry will pull its
quiescent current through its internal power switch. This
is fine if your system can tolerate this state. If the RUN pin
is pulled low, the input current will drop to essentially zero.
However, if the VIN0 is grounded while the VOUT0 output is
held high, then parasitic diodes inside the LTM8001 can
pull large currents from the output through the VIN0 pin.
Figure 7 shows a circuit that will run only when the input
voltage is present and that protects against a shorted or
reversed input.
Charging Applications
The LTM8001s internal switching step-down regula-
tor’s CVCC operation makes it well suited for battery or
supercapacitor charging applications. A schematic of the
LTM8001 charging a supercapacitor and then distribut-
ing power to various loads through the onboard LDOs is
shown in the Typical Applications section. In this applica-
tion, the supercapacitor is charged through the step-down
switching regulator and not the LDOs. Each LDO is rated
for positive and differential voltages between its input
and output, but may experience a negative voltage during
start-up or turn-off transients if its output is connected to
a battery, supercapacitor or energized load. Avoid using
the LTM8001 in applications where the internal LDOs can
experience a negative voltage.
Thermal Considerations
The LTM8001 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristics section can be used as a guide. These curves
were generated by the LTM8001 mounted to a 59cm2
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
For increased accuracy and fidelity to the actual application,
many designers use finite element analysis (FEA) to predict
thermal performance. To that end, the Pin Configuration
of this data sheet typically gives four thermal coefficients:
θJA: Thermal resistance from junction to ambient
θJCbottom: Thermal resistance from junction to the bottom
of the product case
θJCtop: Thermal resistance from junction to top of the
product case
θJB: Thermal resistance from junction to the printed
circuit board
applicaTions inForMaTion
VIN
RUN
RT
VOUT0
GND
8001 F07
LTM8001
VIN VOUT
Figure 7. The Input Diode Prevents a Shorted Input
from Discharging a Backup Battery Tied to the Output.
It Also Protects the Circuit from a Reversed Input. The
LTM8001 Runs Only When the Input is Present
LTM8001
20
8001fd
For more information www.linear.com/LTM8001
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
θJA is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
θJCbottom is the junction-to-board thermal resistance with
all of the component power dissipation flowing through the
bottom of the package. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient envi-
ronment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
θJCtop is determined with nearly all of the component power
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule regulator are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junc-
tion to the top of the part. As in the case of θJCbottom, this
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
θJB is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule regulator and into the board, and is really the
sum of the θJCbottom and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two sided,
two layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that none
of these thermal coefficients reflects an actual physical
operating condition of a µModule regulator. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in this product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is Figure 8. The blue resistances are contained within the
µModule regulator, and the green are outside.
The die temperature of the LTM8001 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8001. The bulk of the heat flow out of the LTM8001
is through the bottom of the module and the BGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, result-
ing in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
applicaTions inForMaTion
LTM8001
21
8001fd
For more information www.linear.com/LTM8001
applicaTions inForMaTion
8001 F08
µMODULE DEVICE
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
CASE (TOP)-TO-AMBIENT
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
JUNCTION At
CASE (BOTTOM)-TO-BOARD
RESISTANCE
Figure 8. Thermal Resistances Among μModule Device Printed Circuit Board and Ambient Environment
LTM8001
22
8001fd
For more information www.linear.com/LTM8001
Typical applicaTions
Dual Input, 2.5V 5A DC/DC µModule Converter Using a Single LTM8001
(External 3.3V Turns On Before or Simultaneously with 12V)
82.5k
VOUT5
SET5
LDO 5
FBO
500kHz
STEP-DOWN
SWITCHING
REGULATOR
VOUT4
SET4
LDO 4
VOUT3
SET3
BIAS123
BIAS45
COMP
SS
VREF
ILIM
SYNC
LDO 3
6.65k
RT
GND
10µF
10µF VIN45
510k
VOUT2
SET2
LDO 2
VOUT1
SET1
2.5V
5A
3V
VIN0
RUN
VIN
12V
EXTERNAL
3.3V
VOUT0
LTM8001
LDO 1
22µF
10nF 49.9k
470µF
8001 TA03
100µF
+
Five Output DC/DC µModule Regulator
68.1k
600kHz
+
VOUT5
SET5
LDO 5
FBO
STEP-DOWN
SWITCHING
REGULATOR
VOUT4
SET4
LDO 4
VOUT3
SET3
COMP
SS
VREF
ILIM
SYNC
LDO 3
953Ω 1.21M
2.2µF
RT
GND
VIN45
BIAS123BIAS45
510k
10µF
VOUT2
SET2
LDO 2
VOUT1
SET1
12V1
300mA
12V2
300mA
47µF
120µF
12V3
300mA
12V4
300mA
12V5
300mA
VIN0
RUN
VIN
18V TO 36V
VOUT0
(13.5V)
LTM8001
LDO 1
1.21M
2.2µF
1.21M
2.2µF
1.21M
2.2µF
1.21M
8001 TA02
2.2µF
LTM8001
23
8001fd
For more information www.linear.com/LTM8001
Typical applicaTions
Supercapacitor Charger and Tw o Output Regulator
68.1k 3.09k
VOUT5
SET5
LDO 5
FBO
600kHz
STEP-DOWN
SWITCHING
REGULATOR
VOUT4
SET4
LDO 4
VOUT3
SET3
BIAS123
BIAS45
COMP
SS
VREF
ILIM
SYNC
LDO 3
RT
GND
10µF
VIN45
200k
48.7k
VOUT2
SET2
LDO 2
VOUT1
SET1
2.5V
0.5A
3.3V
1A
5V
VIN0
RUN
VIN
9V TO 15V
VOUT0
LTM8001
LDO 1
4.7µF
124k
10µF
110k
47µF
8001 TA04
1.5F
5V SUPERCAP
PM-5ROV155-R
LTM8001
24
8001fd
For more information www.linear.com/LTM8001
Use Tw o LTM8001s to Implement a 2.5VOUT 10A DC/DC µModule Converter
Typical applicaTions
82.5k
VOUT5
SET5
LDO 5
FBO
500kHz
500kHz
STEP-DOWN
SWITCHING
REGULATOR
VOUT4
SET4
LDO 4
VOUT3
SET3
BIAS123
BIAS45
COMP
SS
VREF
ILIM
SYNC
LDO 3
6.65k
RT
GND
10µF
×2
VIN45
510k
VOUT2
SET2
LDO 2
VOUT1
SET1
3V
VIN0
RUN
VIN1
12V
VOUT0
LTM8001
LDO 1
22µF
24.9k
100µF
8001 TA05
470µF
2.5V
10A
+
82.5k
VOUT5
SET5
LDO 5
FBO
STEP-DOWN
SWITCHING
REGULATOR
VOUT4
SET4
LDO 4
VOUT3
SET3
BIAS123
BIAS45
COMP
SS
VREF
ILIM
SYNC
LDO 3
6.65k
RT
GND
VIN45
VOUT2
SET2
LDO 2
VOUT1
SET1
3V
VIN0
RUN
VOUT0
LTM8001
LDO 1
100µF 470µF
+
LTM8001
25
8001fd
For more information www.linear.com/LTM8001
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
PACKAGE TOP VIEW
4
PIN “A1”
CORNER
YX
aaa Z
aaa Z
DETAIL A
PACKAGE BOTTOM VIEW
3
SEE NOTES
L
K
J
H
G
F
E
D
C
B
A
123891011 4567
PIN 1
BGA Package
121-Lead (15.00mm × 15.00mm × 3.42mm)
(Reference LTC DWG# 05-08-1923 Rev A)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
BALL DESIGNATION PER JESD MS-028 AND JEP95
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. SOLDER BALL COMPOSITION CAN BE 96.5% Sn/3.0% Ag/0.5% Cu
OR Sn Pb EUTECTIC
4
3
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
DETAIL A
Øb (121 PLACES)
DETAIL B
SUBSTRATE
A
A1
b1
ccc Z
DETAIL B
PACKAGE SIDE VIEW
MOLD
CAP
Z
MX YZddd
MZeee
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
H1
H2
aaa
bbb
ccc
ddd
eee
MIN
3.22
0.50
2.72
0.60
0.60
0.27
2.45
NOM
3.42
0.60
2.82
0.75
0.63
15.00
15.00
1.27
12.70
12.70
0.32
2.50
MAX
3.62
0.70
2.92
0.90
0.66
0.37
2.55
0.15
0.10
0.20
0.30
0.15
NOTES
DIMENSIONS
TOTAL NUMBER OF BALLS: 121
A2
D
E
e
b
F
G
SUGGESTED PCB LAYOUT
TOP VIEW
0.000
3.810
5.080
3.810
6.350
5.080
6.350
2.540
1.270
2.540
1.270
6.350
5.080
1.270
6.350
5.080
3.810
2.540
1.270
0.3175
0.3175
3.810
2.540
0.000
// bbb Z
Z
H2
H1
0.635 ±0.025 Ø 121x
LTMXXXXXX
µModule
BGA 121 1112 REV A
TRAY PIN 1
BEVEL PACKAGE IN TRAY LOADING ORIENTATION
COMPONENT
PIN “A1”
7 PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
!
7
SEE NOTES
LTM8001
26
8001fd
For more information www.linear.com/LTM8001
package DescripTion
package phoTo
Table 3. LTM8001 Pinout (Sorted by Pin Number)
PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME
A1 GND B1 GND C1 GND D1 GND E1 GND F1 GND
A2 GND B2 GND C2 GND D2 GND E2 GND F2 GND
A3 VOUT0 B3 VOUT0 C3 VOUT0 D3 GND E3 GND F3 GND
A4 VOUT0 B4 VOUT0 C4 VOUT0 D4 GND E4 GND F4 GND
A5 VOUT0 B5 VOUT0 C5 VOUT0 D5 GND E5 GND F5 GND
A6 VIN45 B6 VIN45 C6 VIN45 D6 GND E6 GND F6 GND
A7 VIN45 B7 VIN45 C7 VIN45 D7 GND E7 GND F7 GND
A8 BIAS45 B8 BIAS123 C8 GND D8 GND E8 GND F8 GND
A9 SET5 B9 GND C9 GND D9 GND E9 GND F9 GND
A10 VOUT5 B10 GND C10 GND D10 GND E10 GND F10 GND
A11 VOUT5 B11 VOUT4 C11 VOUT4 D11 SET4 E11 VOUT3 F11 VOUT3
PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME
G1 GND H1 GND J1 VIN0 K1 VIN0 L1 VIN0
G2 GND H2 GND J2 VIN0 K2 VIN0 L2 VIN0
G3 GND H3 GND J3 VIN0 K3 VIN0 L3 VIN0
G4 GND H4 GND J4 GND K4 SS L4 RUN
G5 GND H5 GND J5 GND K5 GND L5 FB0
G6 GND H6 GND J6 GND K6 GND L6 COMP
G7 GND H7 GND J7 GND K7 SYNC L7 RT
G8 GND H8GND J8 GND K8 VREF L8 ILIM
G9 GND H9 GND J9 GND K9 GND L9 SET1
G10 GND H10 GND J10 GND K10 GND L10 VOUT1
G11 SET3 H11 SET2 J11 VOUT2 K11 VOUT2 L11 VOUT1
LTM8001
27
8001fd
For more information www.linear.com/LTM8001
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 09/13 Update Features section
Update test conditions and limits
Correct input power pin name
1
3, 4
11
B 02/14 Add SnPb BGA package option 1, 2
C 08/14 Add MP-grade option 2, 3
D 08/15 Modified maximum VOUT conditions
Amended VOUT RUN description
4
11
LTM8001
28
8001fd
For more information www.linear.com/LTM8001
LINEAR TECHNOLOGY CORPORATION 2013
LT 0815 REV D • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTM8001
relaTeD parTs
Typical applicaTion
Three Output DC/DC µModule Converter
118k
VOUT5
SET5
LDO 5
FBO
350kHz
STEP-DOWN
SWITCHING
REGULATOR
VOUT4
SET4
LDO 4
VOUT3
SET3
BIAS123
BIAS45
COMP
SS
VREF
ILIM
SYNC
LDO 3
19.6k
RT
GND
10µF
10k
20.5k
VIN45
510k
VOUT2
SET2
LDO 2
VOUT1
SET1
1V
2.2A
1.2V
1.3A
1.8V
1A
VIN0
RUN
VIN
9V TO 18V
VOUT0
LTM8001
LDO 1
60.4k
4.7µF 10µF
33.2k
470µF
8001 TA06
100µF
+
PART NUMBER DESCRIPTION COMMENTS
LTM8026 36VIN, 5A Step-Down µModule Regulator with
Adjustable Current Limit
6V ≤ VIN ≤ 36V, 1.2V ≤ VOUT ≤ 24V, Adjustable Current Limit, Parallelable
Outputs, CLK Input, 11.25mm × 15mm × 2.82mm LGA
LTM8052 36VIN, ±5A Step-Down µModule Regulator with
Adjustable Current Limit
6V ≤ VIN ≤ 36V, 1.2V ≤ VOUT ≤ 24V, –5V ≤ IOUT ≤ 5A, Adjustable Current
Limit, CLK Input, 11.25mm × 15mm × 2.82mm LGA, Pin Compatible with
LTM8026
LTM8061 32V, 2A Step-Down µModule Battery Charger with
Programmable Input Current Limit
Suitable for CC-CV Charging Single and Dual Cell Li-Ion or Li-Poly Batteries,
4.95V ≤ VIN ≤ 32V, C/10 or Adjustable Timer Charge Termination, NTC
Resistor Monitor Input, 9mm × 15mm × 4.32mm LGA
LTM8062A 32V, 2A Step-Down µModule Battery Charger with
Integrated Maximum Peak Power Tracking (MPPT) for
Solar applications
Suitable for CC-CV Charging Method Battery Chemistries (Li-Ion, Li-Poly,
Lead-Acid, LiFePO4), User Adjustable MPPT Servo Voltage, 4.95V ≤ VIN
≤ 32V, 3.3V ≤ VBATT ≤ 18.8V Adjustable, C/10 or Adjustable Timer Charge
Termination, NTC Resistor Monitor Input, 9mm × 15mm × 4.32mm LGA
LTM8033 36V, 3A EN55022 Class B Certified DC/DC Step-Down
µModule Regulator
3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 24V, Synchronizable, 11.25mm × 15mm ×
4.32mm LGA
LTM4613 36VIN, 8A EN55022 Class B Certified DC/DC Step-
Down µModule Regulator
5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, PLL input, VOUT Tracking and Margining,
15mm × 15mm × 4.32mm LGA
LTM8048 1.5W, 725VDC Galvanically Isolated µModule Converter
with LDO Post regulator
3.1V ≤ VIN ≤ 32V, 2.5V ≤ VOUT ≤ 12V, 1mVP-P Output Ripple, Internal Isolated
Transformer, 9mm × 11.25mm × 4.92mm BGA
LTC2978 Octal Digital Power Supply Manager with EEPROM I2C/PMBus Interface, Configuration EEPROM, Fault Logging, 16-Bit ADC with
±0.25% TUE, 3.3V to 15V Operation
LTC2974 Quad Digital Power Supply Manager with EEPROM I2C/PMBus Interface, Configuration EEPROM, Fault Logging, per Channel
Voltage, Current and Temperature Measurements
LTC3880 Dual Output PolyPhase
®
Step-Down DC/DC Controller
with Digital Power System Management
I2C/PMBus Interface, Configuration EEPROM, Fault Logging, ±0.5% Output
Voltage Accuracy, MOSFET Gate Drivers