2SP0115T2Ax-FF600R06ME3
Preliminary Data Sheet
IGBT-Driver.com Page 5
6) Undervoltage monitoring of the primary-side supply voltage (VCC to GND). If the voltage drops below
this limit, a fault is transmitted to the corresponding outputs and the IGBTs are switched off.
7) Undervoltage monitoring of the secondary-side supply voltage (Visox to Veex and Veex to COMx
which correspond with the approximate turn-on and turn-off gate-emitter voltages). If the
corresponding voltage drops below this limit, the IGBT is switched off and a fault is transmitted to the
corresponding output.
8) The input impedance can be modified to values < 18 kΩ (customer-specific solution).
9) Turn-on and turn-off threshold values can be increased (customer-specific solution).
10) The resulting pulse width of the direct output of the gate drive unit for short-circuit type I (excluding
the delay of the gate resistors) is the sum of response time plus delay to IGBT turn-off.
11) The turn-off event of the IGBT is delayed by the specified time after the response time.
12) Factory set value. The blocking time can be reduced with an external resistor. Refer to the
“Description & Application Manual for 2SP0115T SCALE-2 IGBT Drivers”.
13) Measured from the transition of the turn-on or turn-off command at the driver input to direct output
of the gate drive unit (excluding the delay of the gate resistors).
14) Output rise and fall times are measured between 10% and 90% of the nominal output swing with an
output load of 10Ω and 40nF. The values are given for the driver side of the gate resistors. The time
constant of the output load in conjunction with the present gate resistors leads to an additional delay
at the load side of the gate resistors.
15) Transmission delay of the fault state from the secondary side to the primary status outputs.
16) The gate resistors can be leaded or surface mounted. CONCEPT reserves the right to determine which
type will be used. Typically, higher quantities will be produced with SMD resistors and small quantities
with leaded resistors.
17) HiPot testing (= dielectric testing) must generally be restricted to suitable components. This gate
driver is suited for HiPot testing. Nevertheless, it is strongly recommended to limit the testing time to
1s slots as stipulated by EN 50178. Excessive HiPot testing at voltages much higher than 850VAC(eff)
may lead to insulation degradation. No degradation has been observed over 1min. testing at
3800VAC(eff). Every production sample shipped to customers has undergone 100% testing at the given
value or higher (<5100Veff) for 1s.
18) Partial discharge measurement is performed in accordance with IEC 60270 and isolation coordination
specified in EN 50178. The partial discharge extinction voltage between primary and either secondary
side is coordinated for safe isolation to EN 50178.
19) Jitter measurements are performed with input signals INx switching between 0V and 15V referred to
GND, with a corresponding rise time and fall time of 8ns.
20) A version with extended operating temperature range of –40°C…85°C (2SP0115T2B0) can also be
supplied.
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