ESD1P0RFS - Infineon Technologies AG

2011-07-20

ESD1P0RF...

RF ESD Protection Diodes

• ESD / transient protection of RF antenna /

interfaces or ultra high speed data lines acc. to:

IEC61000-4-2 (ESD): ± 20 kV (contact)

IEC61000-4-4 (EFT): 40 A (5/50 ns)

IEC61000-4-5 (surge): 10 A (8/20 µs)

• Ultra low capacitance of 1 pF typ.

(0.5 pF per diode)

• Low clamping voltage

• Pb-free (ROHS compliant) package

Applications in anti-parallel configuration

• For low RF signal levels without superimposed

DC voltage: e.g. GPS, WLAN, Bluetooth

Applications in rail-to-rail configuration

• For high RF signal levels or low RF signal levels

with superimposed DC voltage: e.g. HDMI, S-ATA,

Gbit Ethernet

ESD1P0RFSESD1P0RFW

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Type Package Configuration Marking

ESD1P0RFS

ESD1P0RFW

SOT363

SOT323

2 channels

1 channel

E6s

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Maximum Ratings at T

= 25°C, unless otherwise specified

Parameter Symbol Value Unit

ESD contact discharge1) VESD 20 kV

Peak pulse current (t

= 8 / 20 µs)2) I

10 A

Operating temperature range To

-55...150 °C

Storage temperature Tst

-65...150

Electrical Characteristics at T

= 25°C, unless otherwise specified

Parameter Symbol Values Unit

min. typ. max.

Characteristics -

Reverse working voltage3) VRWM - - 70 V

Reverse current

VR = 70 V

IR- - 100 nA

Forward clamping voltage2)

IPP = 3 A, tp = 8/20 µs

IPP = 10 A, tp = 8/20 µs

VFC

Line capacitance4)

VR = 0 V, f = 1 MHz

VR = 0 V, f = 1 MHz, for Application example 4

0.5

1.5

0.75

Series inductance (per diode)

SOT323

SOT363

1.4

1.6

1VESD according to IEC61000-4-2, only valid in anti-parallel or rail-to-rail connection.

Please refer to the application examples.

2Ipp according to IEC61000-4-5, only valid in anti-parallel or rail-to-rail connection.

Please refer to the application examples.

3Only valid in rail-to-rail configuration VCC ≥ VRWM

4Total capacitance line to ground (2 diodes in parallel)

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ESD1P0RF...

Forward clamping voltage VFC = ƒ(IPP)

tp = 8 / 20 µs

12345678A10

Ipp

VFC

Reverse current IR = ƒ(VR)

TA = Parameter

in rail-to-rail configuration

0 10 20 30 40 50 V70

-12

-11

-10

-9

-8

-7

-6

-5

-40°C

25°C

85°C

125°C

Forward current IF = ƒ (VF)

TA = Parameter

in anti-parallel configuration

-600 -400 -200 0 200 mV 600

-100

-80

-60

-40

-20

µA

100

-40°C

25°C

85°C

125°C

Line capacitance CT = ƒ (f)

VR = 0 V

0 500 1000 MHz 2000

0.5

1.5

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Insertion loss |S21|2 = ƒ(f)

VR = 0 V, line to ground, Z = 50 Ω

0 250 500 750 1000 1250 1500 MHz 2000

-0.75

-0.625

-0.5

-0.375

-0.25

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ESD1P0RF...

1. Application example ESD1P0RFW

1 channel, anti-parallel configuration

ESD

sensitive

circuit

I/O

1 2

The protection diode should

be placed very close to the

location where the ESD or

other transients can occur to

keep loops and inductances

as small as possible.

Pins 1 and 2 should be

connected in parallel directly

to a ground plane on the

board.

1 protected signal line,

superimposed DC voltage up to

±VF (diode forward voltage)

Line capacitance to

ground = 1 pF

2. Application example ESD1P0RFW

1 channel, rail-to-rail configuration

ESD

sensitive

circuit

I/O

Pin 2 should be connected

to the positive supply

voltage and pin 1 should be

connected directly to a

ground plane on the board.

Clamped input voltage at I/O

port is limited to Vcc + VF at

positive transients and 0V -

VF at negative transients

(VF ... diode forward voltage

drop).

1 protected signal line,

superimposed DC voltage up to

+Vcc (voltage supply)

1 2

+Vcc

Line capacitance to

ground = 1 pF

3. Application example ESD1P0RFS

2 channels, anti-parallel configuration

ESD

sensitive

device

I/O

2 protected signal lines,

superimposed DC voltage up to

±VF (diode forward voltage)

Pins 1, 2 and 4, 5 should be

connected in parallel directly

to a ground plane on the

board. Clamped input

voltage at I/O port is limited

to ± VCL (clamping voltage)

at positive resp. negative

transients.

I/O

Line capacitance to ground = 1 pF

4 3

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ESD1P0RF...

4. Application example ESD1P0RFS

1 channel, low capacitance anti-parallel configuration

ESD

sensitive

device

Pins 1 and 4 should be

connected directly to a

ground plane on the board.

Pins 3, 6 are not connected.

Clamped input voltage at I/O

port is limited to ± 2 x VCL

(clamping voltage) at

positive resp. negative

transients.

Line capacitance to ground = 0.5 pF

I/O

1 protected signal line,

superimposed DC voltage up to

± 2 x VF (diode forward voltage)

43 (n.c.)

(n.c.) 6

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Package SOT323

Package Outline

Foot Print

Marking Layout (Example)

Standard Packing

Reel ø180 mm = 3.000 Pieces/Reel

Reel ø330 mm = 10.000 Pieces/Reel

1.25

±0.1

0.1 MAX.

2.1

±0.1

0.15 +0.1

-0.05

0.3+0.1

±0.1

0.9

±0.2

-0.05

0.650.65

0.1

0.1 MIN.

0.1

0.2 A

0.2

2.15 1.1

2.3

Pin 1

2005, June

Date code (YM)

BCR108W

Type code

0.6

0.8

1.6

0.65

Manufacturer

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ESD1P0RF...

Package SOT363

Package Outline

Foot Print

Marking Layout (Example)

Standard Packing

Reel ø180 mm = 3.000 Pieces/Reel

Reel ø330 mm = 10.000 Pieces/Reel

For symmetric types no defined Pin 1 orientation in reel.

Small variations in positioning of

Date code, Type code and Manufacture are possible.

Manufacturer

2005, June

Date code (Year/Month)

BCR108S

Type code

Pin 1 marking

Laser marking

0.3

0.70.9

0.65

1.6

0.2

2.15 1.1

2.3

Pin 1

marking

+0.1

0.2

5 4

±0.2

+0.1

-0.05

0.15

±0.1

1.25

0.1 MAX.

0.9 ±0.1

-0.05 6x

0.1 M

0.650.65

2.1

±0.1

0.1

0.1 MIN.

0.2 A

Pin 1

marking

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ESD1P0RF...

Edition 2009-11-16

Published by

Infineon Technologies AG

81726 Munich, Germany

 2009 Infineon Technologies AG

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of conditions or characteristics. With respect to any examples or hints given herein,

any typical values stated herein and/or any information regarding the application of

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please contact the nearest Infineon Technologies Office (<www.infineon.com>).

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