Rev.4.5_00
BATTERY PROTECTION IC
FOR 1-CELL PACK S-8211D Series
Seiko Instruments Inc. 1
The S-8211D Series are protection ICs for single-cell lithium-ion
/ lithium-polymer rechargeable batteries and include high-
accuracy voltage detectors and delay circuits.
These ICs are suitable for protecting single-cell rechargeable
lithium-ion / lithium-polymer battery packs from overcharge,
overdischarge, and overcurrent.
Features
(1) High-accuracy voltage detection circuit
• Overcharge detection voltage 3.9 to 4.4 V (5 mV steps) Accuracy ±25 mV (+25 °C)
Accuracy ±30 mV (−5 to +55 °C)
• Overcharge release voltage 3.8 to 4.4 V*1 Accuracy ±50 mV
• Overdischarge detection voltage 2.0 to 3.0 V (10 mV steps) Accuracy ±50 mV
• Overdischarge release voltage 2.0 to 3.4 V*2 Accuracy ±100 mV
• Discharge overcurrent detection voltage 0.05 to 0.30 V (10 mV steps) Accuracy ±15 mV
• Load short-circuiting detection voltage 0.5 V (fixed) Accuracy ±200 mV
(2) Detection delay times are generated by an internal circuit (external capacitors are unnecessary).
Accuracy ±20%
(3) High-withstanding-voltage device is used for charger connection pins (VM pin and CO pin : Absolute maximum
rating = 28 V)
(4) 0 V battery charge function available / unavailable are selectable.
(5) Shutdown function yes / no are selectable.
(6) Wide operating temperature range −40 to +85 °C
(7) Low current consumption
• Operation mode 3.0 µA typ., 5.5 µA max. (+25 °C)
• Power-down mode 0.2 µA max. (+25 °C)
(8) Small package: SOT-23-5, SNT-6A
(9) Lead-free product
*1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage
(Overcharge hysteresis voltage can be selected as 0 V or from a range of 0.1 to 0.4 V in 50 mV steps.)
*2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage
(Overdischarge hysteresis voltage can be selected as 0 V or from a range of 0.1 to 0.7 V in 100 mV steps.)
Applications
• Lithium-ion rechargeable battery packs
• Lithium-polymer rechargeable battery packs
Packages
Drawing Code
Package Name Package Tape Reel Land
SOT-23-5 MP005-A MP005-A MP005-A
−
SNT-6A PG006-A PG006-A PG006-A PG006-A
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
2
Block Diagram
−
+
−
+
VM
VSS
VDD
CO
DO
−
+
−
+
R
VMD
R
VMS
Load short-circuiting detection
comparator
Discharge overcurrent detection
comparator
Charger detection circuit
0 V battery charge circuit
or 0 V battery charge
inhibition circuit
Divider control
circuit
Output control circuit
Oscillator control
circuit
Overdischarge
detection
comparator
Overcharge
detection
comparator
Remark All diodes shown in figure are parasitic diodes.
Figure 1
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 3
Product Name Structure
1. Product Name
S-8211D xx - xxxx G
Package name (abbreviation) and IC packing specifications *1
M5T1 : SOT-23-5, Tape
I6T1 : SNT-6A, Tape
Serial code *2
Sequentially set from AA to ZZ
*1. Refer to the taping specifications.
*2. Refer to the “2. Product Name List”.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
4
2 Product Name List
(1) SOT-23-5
Table 1
Product Name / Item
Overcharge
Detection
Voltage
V
CU
Overcharge
Release
Voltage
V
CL
Over-discharge
Detection
Voltage
V
DL
Over-discharge
Release
Voltage
V
DU
Discharge
Overcurrent
Detection
Voltage
V
DIOV
0 V Battery
Charge
Function
Delay Time
Combination
*1
Shutdown
Function
S-8211DAB-M5T1G 4.250 V 4.050 V 2.60 V 2.90 V 0.12 V Unavailable (1) No
S-8211DAE-M5T1G 4.280 V 4.180 V 2.50 V 2.70 V 0.19 V Unavailable (1) Yes
S-8211DAH-M5T1G 4.275 V 4.175 V 2.30 V 2.40 V 0.10 V Available (1) Yes
S-8211DAI-M5T1G 4.325 V 4.075 V 2.50 V 2.90 V 0.15 V Unavailable (1) Yes
S-8211DAJ-M5T1G 4.280 V 4.080 V 3.00 V 3.00 V 0.08 V Available (1) Yes
S-8211DAK-M5T1G 4.280 V 4.080 V 2.30 V 2.30 V 0.13 V Unavailable (1) Yes
S-8211DAL-M5T1G 4.280 V 4.080 V 2.80 V 2.80 V 0.10 V Available (1) Yes
S-8211DAM-M5T1G 4.275 V 4.075 V 2.50 V 2.90 V 0.15 V Unavailable (1) Yes
*1. Refer to the Table 3 about the details of the delay time combinations (1).
Remark Please contact our sales office for the products with detection voltage value other than those specified
above.
(2) SNT-6A
Table 2
Product Name / Item
Overcharge
Detection
Voltage
V
CU
Overcharge
Release
Voltage
V
CL
Over-discharge
Detection
Voltage
V
DL
Over-discharge
Release
Voltage
V
DU
Discharge
Overcurrent
Detection
Voltage
V
DIOV
0 V Battery
Charge
Function
Delay Time
Combination
*1
Shutdown
Function
S-8211DAB-I6T1G 4.250 V 4.050 V 2.60 V 2.90 V 0.12 V Unavailable (1) No
S-8211DAE-I6T1G 4.280 V 4.180 V 2.50 V 2.70 V 0.19 V Unavailable (1) Yes
S-8211DAF-I6T1G 4.250 V 4.050 V 2.40 V 2.90 V 0.10 V Available (2) No
S-8211DAG-I6T1G 4.280 V 4.080 V 2.30 V 2.30 V 0.08 V Available (1) No
*1. Refer to the Table 3 about the details of the delay time combinations (1) and (2).
Remark Please contact our sales office for the products with detection voltage value other than those specified
above.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 5
Table 3
Delay Time
Combination
Overcharge
Detection
Delay Time
tCU
Overdischarge
Detection
Delay Time
tDL
Discharge Overcurrent
Detection
Delay Time
tDIOV
Load Short-circuiting
Detection
Delay Time
tSHORT
(1) 1.2 s 150 ms 9 ms 300 µs
(2) 1.2 s 75 ms 9 ms 300 µs
Remark The delay times can be changed within the range listed Table 4. For details, please contact our sales office.
Table 4
Delay Time
Symbol
Selection Range
Remark
Overcharge detection delay time
t
CU
143 ms 573 ms 1.2 s
Select a value from the left.
Overdischarge detection delay time
t
DL
38 ms 150 ms 300 ms
Select a value from the left.
Discharge overcurrent detection delay time
t
DIOV
4.5 ms 9 ms 18 ms
Select a value from the left.
Load short-circuiting detection delay time
t
SHORT
−
300
µ
s 560
µ
s
Select a value from the left.
Remark The value surrounded by bold lines is the delay time of the standard products.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
6
Pin Configurations
Table 5
Pin No. Symbol Description
1 VM
Voltage detection between VM pin and VSS pin
(Overcurrent / charger detection pin)
2 VDD Connection for positive power supply input
3 VSS Connection for negative power supply input
4 DO
Connection of discharge control FET gate
(CMOS output)
5 CO
Connection of charge control FET gate
(CMOS output)
SOT-23-5
Top view
5
4
3
2
1
Figure 2
Table 6
Pin No. Symbol Description
1
NC*1 No connection
2 CO
Connection of charge control FET gate
(CMOS output)
3 DO
Connection of discharge control FET gate
(CMOS output)
SNT-6A
To
p
view
1
2
3 4
6
5
4 VSS Connection for negative power supply input
Figure 3 5 VDD Connection for positive power supply input
6 VM
Voltage detection between VM pin and VSS pin
(Overcurrent / charger detection pin)
*1. The NC pin is electrically open.
The NC pin can be connected to VDD or VSS.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 7
Absolute Maximum Ratings
Table 7
(Ta = 25 °C unless otherwise specified)
Item Symbol Applied pin Absolute Maximum Ratings Unit
Input voltage between VDD pin and
VSS pin VDS VDD
VSS − 0.3 to VSS + 12 V
VM pin input voltage VVM VM VDD − 28 to VDD + 0.3 V
DO pin output voltage VDO DO VSS − 0.3 to VDD + 0.3 V
CO pin output voltage VCO CO VVM − 0.3 to VDD + 0.3 V
− 250 (When not mounted on board) mW
SOT-23-5 − 600*1 mW
Power dissipation
SNT-6A
PD
− 400*1 mW
Operating ambient temperature Topr − − 40 to + 85 °C
Storage temperature Tstg − − 55 to + 125 °C
*1. When mounted on board
[Mounted board]
(1) Board size: 114.3 mm × 76.2 mm × t1.6 mm
(2) Board name: JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
050 100 150
700
400
0
Power Dissi
p
ation
(
PD
)
[
mW
]
Ambient Tem
p
erature
(
Ta
)
[
°C
]
200
600
500
300
100
SNT-6A
SOT-23-5
Figure 4 Power Dissipation of Package (When Mounted on Board)
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
8
Electrical Characteristics
1. Except Detection Delay Time (25 °C)
Table 8 (Ta = 25 °C unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Condi-
tion
Test
Circuit
DETECTION VOLTAGE
Overcharge detection voltage V
CU
3.90 to 4.40 V, Adjustable V
CU
−
0.025
V
CU
V
CU
+
0.025 V 1 1
3.90 to 4.40 V, Adjustable,
Ta =
−
5 to
+
55
°
C
*1
V
CU
−
0.03
V
CU
V
CU
+
0.03 V 1 1
V
CL
≠
V
CU
V
CL
−
0.05
V
CL
V
CL
+
0.05 V 1 1
Overcharge release voltage V
CL
3.80 to 4.40 V,
Adjustable V
CL
= V
CU
V
CL
−
0.05
V
CL
V
CL
+
0.025 V 1 1
Overdischarge detection voltage V
DL
2.00 to 3.00 V, Adjustable V
DL
−
0.05
V
DL
V
DL
+
0.05 V 2 2
V
DU
≠
V
DL
V
DU
−
0.10
V
DU
V
DU
+
0.10 V 2 2
Overdischarge release voltage V
DU
2.00 to 3.40 V,
Adjustable V
DU
= V
DL
V
DU
−
0.05
V
DU
V
DU
+
0.05 V 2 2
Discharge overcurrent detection voltage V
DIOV
0.05 to 0.30 V, Adjustable V
DIOV
−
0.015
V
DIOV
V
DIOV
+
0.015 V 3 2
Load short-circuiting detection voltage
*2
V
SHORT
−
0.30 0.50 0.70 V 3 2
Charger detection voltage V
CHA
−
−
1.0
−
0.7
−
0.4 V 4 2
0 V BATTERY CHARGE FUNCTION
0 V battery charge starting charger voltage V
0CHA
0 V battery charging function “available”
1.2
−
−
V
10 2
0 V battery charge inhibition battery voltage V
0INH
0 V battery charging function “unavailable”
−
−
0.5 V
11 2
INTERNAL RESISTANCE
Resistance between VM pin and VDD pin R
VMD
V
DD
= 1.8 V, V
VM
= 0 V 100 300 900
k
Ω
5 3
Resistance between VM pin and VSS pin R
VMS
V
DD
= 3.5 V, V
VM
= 1.0 V 10 20 40 k
Ω
5 3
[INPUT VOLTAGE]
Operating voltage between VDD pin and VSS pin
V
DSOP1
−
1.5
−
8 V
−
−
Operating voltage between VDD pin and VM pin
V
DSOP2
−
1.5
−
28 V
−
−
INPUT CURRENT (Shutdown Function Yes)
Current consumption during operation I
OPE
V
DD
= 3.5 V, V
VM
= 0 V 1.0 3.0 5.5
µ
A 4 2
Current consumption at power-down I
PDN
V
DD
= V
VM
= 1.5 V
−
−
0.2
µ
A 4 2
INPUT CURRENT (Shutdown Function No)
Current consumption during operation I
OPE
V
DD
= 3.5 V, V
VM
= 0 V 1.0 3.0 5.5
µ
A 4 2
Current consumption during overdischarge I
OPED
V
DD
= V
VM
= 1.5 V 0.3 2.0 3.5
µ
A 4 2
OUTPUT RESISTANCE
CO pin resistance “H” R
COH
V
CO
= 3.0 V, V
DD
= 3.5 V, V
VM
= 0 V 2.5 5 10 k
Ω
6 4
CO pin resistance “L” R
COL
V
CO
= 0.5 V, V
DD
= 4.5 V, V
VM
= 0 V 2.5 5 10 k
Ω
6 4
DO pin resistance “H” R
DOH
V
DO
= 3.0 V, V
DD
= 3.5 V, V
VM
= 0 V 2.5 5 10 k
Ω
7 4
DO pin resistance “L” R
DOL
V
DO
= 0.5 V, V
DD
=V
VM
= 1.8 V 2.5 5 10 k
Ω
7 4
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
*2. In any conditions, Load short-circuiting detection voltage (VSHORT) is higher Discharge overcurrent detection voltage
(VDIOV).
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 9
2. Except Detection Delay Time (−40 to +85°C *1)
Table 9 (−40 to +85°C *1 unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Condi-
tion
Test
Circuit
DETECTION VOLTAGE
Overcharge detection voltage
V
CU
3.90 to 4.40 V, Adjustable V
CU
−
0.060
V
CU
V
CU
+
0.040 V 1 1
V
CL
≠
V
CU
V
CL
−
0.08
V
CL
V
CL
+
0.065 V 1 1
Overcharge release voltage
V
CL
3.80 to 4.40 V,
Adjustable V
CL
= V
CU
V
CL
−
0.08
V
CL
V
CL
+
0.04 V 1 1
Overdischarge detection voltage
V
DL
2.00 to 3.00 V, Adjustable V
DL
−
0.11
V
DL
V
DL
+
0.13 V 2 2
V
DU
≠
V
DL
V
DU
−
0.15
V
DU
V
DU
+
0.19 V 2 2
Overdischarge release voltage
V
DU
2.00 to 3.40 V,
Adjustable V
DU
= V
DL
V
DU
−
0.11
V
DU
V
DU
+
0.13 V 2 2
Discharge overcurrent detection voltage
V
DIOV
0.05 to 0.30 V, Adjustable V
DIOV
−
0.021
V
DIOV
V
DIOV
+
0.024 V 3 2
Load short-circuiting detection voltage
*2
V
SHORT
−
0.16 0.50 0.84 V 3 2
Charger detection voltage V
CHA
−
−
1.2
−
0.7
−
0.2 V 4 2
0 V BATTERY CHARGE FUNCTION
0 V battery charge starting charger voltage
V
0CHA
0 V battery charging function “available”
1.7
−
−
V 10 2
0 V battery charge inhibition battery voltage
V
0INH
0 V battery charging function “unavailable”
−
−
0.3
V 11 2
INTERNAL RESISTANCE
Resistance between VM pin and VDD pin
R
VMD
V
DD
= 1.8 V, V
VM
= 0 V 78 300 1310
k
Ω
5 3
Resistance between VM pin and VSS pin
R
VMS
V
DD
= 3.5 V, V
VM
= 1.0 V 7.2 20 44
k
Ω
5 3
INPUT VOLTAGE
Operating voltage between VDD pin and VSS pin
V
DSOP1
−
1.5
−
8
V
−
−
Operating voltage between VDD pin and VM pin
V
DSOP2
−
1.5
−
28
V
−
−
INPUT CURRENT (Shutdown Function Yes)
Current consumption during operation
I
OPE
V
DD
= 3.5 V, V
VM
= 0 V 0.7 3.0 6.0
µ
A 4 2
Current consumption at power-down
I
PDN
V
DD
= V
VM
= 1.5 V
−
−
0.3
µ
A 4 2
INPUT CURRENT (Shutdown Function No)
Current consumption during operation
I
OPE
V
DD
= 3.5 V, V
VM
= 0 V 0.7 3.0 6.0
µ
A 4 2
Current consumption during overdischarge
I
OPED
V
DD
= V
VM
= 1.5 V 0.2 2.0 3.8
µ
A 4 2
OUTPUT RESISTANCE
CO pin resistance “H”
R
COH
V
CO
= 3.0 V, V
DD
= 3.5 V, V
VM
= 0 V 1.2 5 15
k
Ω
6 4
CO pin resistance “L”
R
COL
V
CO
= 0.5 V, V
DD
= 4.5 V, V
VM
= 0 V 1.2 5 15
k
Ω
6 4
DO pin resistance “H”
R
DOH
V
DO
= 3.0 V, V
DD
= 3.5 V, V
VM
= 0 V 1.2 5 15
k
Ω
7 4
DO pin resistance “L”
R
DOL
V
DO
= 0.5 V, V
DD
= V
VM
= 1.8 V 1.2 5 15
k
Ω
7 4
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
*2. In any conditions, Load short-circuiting detection voltage (VSHORT) is higher Discharge overcurrent detection voltage
(VDIOV).
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
10
3. Detection Delay Time
(1) S-8211DAB, S-8211DAE, S-8211DAG, S-8211DAH, S-8211DAI, S-8211DAJ, S-8211DAK, S-8211DAL,
S-8211DAM
Table 10
Item Symbol Condition Min. Typ. Max. Unit
Test
Condi-
tion
Test
Circuit
DELAY TIME (Ta = 25°C)
Overcharge detection delay time t
CU
−
0.96 1.2 1.4 s 8 5
Overdischarge detection delay time t
DL
−
120 150 180 ms 8 5
Discharge overcurrent detection delay time t
DIOV
−
7.2 9 11 ms 9 5
Load short-circuiting detection delay time t
SHORT
−
240 300 360
µ
s 9 5
DELAY TIME (Ta =
−
40 to
+
85°C)
*1
Overcharge detection delay time t
CU
−
0.7 1.2 2.0 s 8 5
Overdischarge detection delay time t
DL
−
83 150 255 ms 8 5
Discharge overcurrent detection delay time t
DIOV
−
5 9 15
ms 9 5
Load short-circuiting detection delay time t
SHORT
−
150 300 540
µ
s 9 5
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
(2) S-8211DAF
Table 11
Item Symbol Condition Min. Typ. Max. Unit
Test
Condi-
tion
Test
Circuit
DELAY TIME (Ta = 25°C)
Overcharge detection delay time t
CU
−
0.96 1.2 1.4 s 8 5
Overdischarge detection delay time t
DL
−
61 75 90
ms 8 5
Discharge overcurrent detection delay time t
DIOV
−
7.2 9 11
ms 9 5
Load short-circuiting detection delay time t
SHORT
−
240 300 360
µ
s 9 5
DELAY TIME (Ta =
−
40 to
+
85°C)
*1
Overcharge detection delay time t
CU
−
0.7 1.2 2.0
s 8 5
Overdischarge detection delay time t
DL
−
41 75 128
ms 8 5
Discharge overcurrent detection delay time t
DIOV
−
5 9 15
ms 9 5
Load short-circuiting detection delay time t
SHORT
−
150 300 540
µ
s 9 5
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 11
Test Circuits
Caution Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (VCO) and DO pin (VDO) are
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
VVM and the DO pin level with respect to VSS.
(1) Overcharge Detection Voltage, Overcharge Release Voltage
(Test Condition 1, Test Circuit 1)
Overcharge detection voltage (VCU) is defined as the voltage between the VDD pin and VSS pin at which VCO goes
from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 = 3.5 V. Overcharge
release voltage (VCL) is defined as the voltage between the VDD pin and VSS pin at which VCO goes from “L” to “H”
when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (VHC) is defined as the difference
between overcharge detection voltage (VCU) and overcharge release voltage (VCL).
(2) Overdischarge Detection Voltage, Overdischarge Release Voltage
(Test Condition 2, Test Circuit 2)
Overdischarge detection voltage (VDL) is defined as the voltage between the VDD pin and VSS pin at which VDO goes
from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = 3.5 V, V2 = 0 V.
Overdischarge release voltage (VDU) is defined as the voltage between the VDD pin and VSS pin at which VDO goes
from “L” to “H” when the voltage V1 is then gradually increased. Overdischarge hysteresis voltage (VHD) is defined as
the difference between overdischarge release voltage (VDU) and overdischarge detection voltage (VDL).
(3) Discharge Overcurrent Detection Voltage
(Test Condition 3, Test Circuit 2)
Discharge overcurrent detection voltage (VDIOV) is defined as the voltage between the VM pin and VSS pin whose
delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of discharge
overcurrent delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting condition of V1 = 3.5
V, V2 = 0 V.
(4) Load Short-circuiting Detection Voltage
(Test Condition 3, Test Circuit 2)
Load short-circuiting detection voltage (VSHORT) is defined as the voltage between the VM pin and VSS pin whose
delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of load short-circuiting
delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting condition of V1 = 3.5 V, V2 = 0 V.
(5) Operating Current Consumption
(Test Condition 4, Test Circuit 2)
The operating current consumption (IOPE) is the current that flows through the VDD pin (IDD) under the set conditions
of V1 = 3.5 V and V2 = 0 V (normal status).
(6) Charger detection voltage (= the detection voltage for irregular charging current)
(Test Condition 4, Test Circuit 2)
The charger detection voltage (VCHA) is the voltage between the VM and VSS pin; when gradually increasing V1 at
V1 = 1.8 V, V2 = 0 V to set V1 = VDL+(VHD/2), after that, decreasing V2 gradually from 0 V so that VDO goes “L” to “H”.
Measurement of the charger detection voltage is available for the product with overdischarge hysteresis VHD ≠ 0 only.
The detection voltage for irregular charging current is the voltage between the VM and VSS pin; when gradually
decreasing V2 at V1 = 3.5 V, V2 = 0 V and VCO goes “H” to “L”.
The value of the detection voltage for irregular charging current is equal to the charger detection voltage (VCHA).
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
12
(7) Power-down Current Consumption, Overdischarge Current Consumption
(Test Condition 4, Test Circuit 2)
Shutdown function yes product
The power-down current consumption (IPDN) is the current that flows through the VDD pin (IDD) under the set
conditions of V1 = V2 = 1.5 V (overdischarge status).
Shutdown function no product
The overdischarge current consumption (IOPED) is the current that flows through the VDD pin (IDD) under the set
conditions of V1 = V2 = 1.5 V (overdischarge status).
(8) Resistance between VM Pin and VDD Pin
(Test Condition 5, Test Circuit 3)
The resistance between VM pin and VDD pin (RVMD) is the resistance between VM pin and VDD pin under the set
conditions of V1 = 1.8 V, V2 = 0 V.
(9) Resistance between VM Pin and VSS Pin
(Test Condition 5, Test Circuit 3)
The resistance between VM pin and VSS pin (RVMS) is the resistance between VM pin and VSS pin under the set
conditions of V1 = 3.5 V, V2 = 1.0 V.
(10) CO Pin Resistance “H”
(Test Condition 6, Test Circuit 4)
The CO pin resistance “H” (RCOH) is the resistance at the CO pin under the set conditions of V1 = 3.5 V, V2 =
0 V, V3 = 3.0 V.
(11) CO Pin Resistance “L”
(Test Condition 6, Test Circuit 4)
The CO pin resistance “L” (RCOL) is the resistance at the CO pin under the set conditions of V1 = 4.5 V, V2 =
0 V, V3 = 0.5 V.
(12) DO Pin Resistance “H”
(Test Condition 7, Test Circuit 4)
The DO pin H resistance (RDOH) is the resistance at the DO pin under the set conditions of V1 = 3.5 V, V2 =
0 V, V4 = 3.0 V.
(13) DO Pin Resistance “L”
(Test Condition 7, Test Circuit 4)
The DO pin L resistance (RDOL) is the resistance at the DO pin under the set conditions of V1 = 1.8 V, V2 =
0 V, V4 = 0.5 V.
(14) Overcharge Detection Delay Time
(Test Condition 8, Test Circuit 5)
The overcharge detection delay time (tCU) is the time needed for VCO to change from “H” to “L” just after the voltage
V1 momentarily increases (within 10 µs) from overcharge detection voltage (VCU) −0.2 V to overcharge detection
voltage (VCU) +0.2 V under the set conditions of V2 = 0 V.
(15) Overdischarge Detection Delay Time
(Test Condition 8, Test Circuit 5)
The overdischarge detection delay time (tDL) is the time needed for VDO to change from “H” to “L” just after the voltage
V1 momentarily decreases (within 10 µs) from overcharge detection voltage (VDL) +0.2 V to overcharge detection
voltage (VDL) −0.2 V under the set condition of V2 = 0 V.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 13
(16) Discharge Overcurrent Detection Delay Time
(Test Condition 9, Test Circuit 5)
Discharge overcurrent detection delay time (tDIOV) is the time needed for VDO to go to “L” after the voltage V2
momentarily increases (within 10 µs) from 0 V to 0.35 V under the set conditions of V1 = 3.5 V, V2 =
0 V.
(17) Load Short-circuiting Detection Delay Time
(Test Condition 9, Test Circuit 5)
Load short-circuiting detection delay time (tSHORT) is the time needed for VDO to go to “L” after the voltage V2
momentarily increases (within 10 µs) from 0 V to 1.6 V under the set conditions of V1 = 3.5 V, V2 =
0 V.
(18) 0 V Battery Charge Starting Charger Voltage (Products with 0 V Battery Charging Function Is “Available”)
(Test Condition 10, Test Circuit 2)
The 0 V charge starting charger voltage (V0CHA) is defined as the voltage between the VDD pin and VM pin at which
VCO goes to “H” (VVM +0.1 V or higher) when the voltage V2 is gradually decreased from the starting condition of V1 =
V2 = 0 V.
(19) 0 V Battery Charge Inhibition Battery Voltage (Products with 0 V Battery Charging Function Is
“Unavailable”)
(Test Condition 11, Test Circuit 2)
The 0 V charge inhibition charger voltage (V0INH) is defined as the voltage between the VDD pin and VSS pin at which
VCO goes to “H” (VVM +0.1 V or higher) when the voltage V1 is gradually increased from the starting condition of V1 =
0 V, V2 = −4 V.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
14
V V
DO
V V
CO
CO
DO
VSS
VDD
VM
S-8211D Series
R1 =
220 Ω
V1
COM
VVDO V VCO
CO
DO
VSS
VDD
VM
S-8211D Series
V1
V2
COM
A
IDD
Figure 5 Test Circuit 1 Figure 6 Test Circuit 2
CO DO
VSS
VDD
VM
S-8211D Series
V1
V2
COM
A
IDD
AIVM
AIDO A ICO
CO
DO
VSS
VDD
VM
S-8211D Series
V1
V2
COM
V4 V3
Figure 7 Test Circuit 3 Figure 8 Test Circuit 4
CO DO
VSS
VDD
VM
S-8211D Series
V1
V2
COM
Oscilloscope Oscilloscope
Figure 9 Test Circuit 5
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 15
Operation
Remark Refer to the “Battery Protection IC Connection Example”.
1. Normal Status
This IC monitors the voltage of the battery connected between the VDD pin and VSS pin and the voltage difference
between the VM pin and VSS pin to control charging and discharging. When the battery voltage is in the range from
overdischarge detection voltage (VDL) to overcharge detection voltage (VCU), and the VM pin voltage is not more than
the discharge overcurrent detection voltage (VDIOV), the IC turns both the charging and discharging control FETs on.
This condition is called the normal status, and in this condition charging and discharging can be carried out freely.
The resistance (RVMD) between the VM pin and VDD pin, and the resistance (RVMS) between the VM pin and VSS pin
are not connected in the normal status.
Caution When the battery is connected for the first time, discharging may not be enabled. In this case, short
the VM pin and VSS pin or connect the charger to restore the normal status.
2. Overcharge Status
When the battery voltage becomes higher than overcharge detection voltage (VCU) during charging in the normal
status and detection continues for the overcharge detection delay time (tCU) or longer, the S-8211D Series turns the
charging control FET off to stop charging. This condition is called the overcharge status.
The resistance (RVMD) between the VM pin and VDD pin, and the resistance (RVMS) between the VM pin and VSS pin
are not connected in the overcharge status.
The overcharge status is released in the following two cases ( (1) and (2) ).
(1) In the case that the VM pin voltage is higher than or equal to charger detection voltage (VCHA), and is lower than
the discharge overcurrent detection voltage (VDIOV), S-8211D Series releases the overcharge status when the
battery voltage falls below the overcharge release voltage (VCL).
(2) In the case that the VM pin voltage is higher than or equal to the discharge overcurrent detection voltage (VDIOV),
S-8211D Series releases the overcharge status when the battery voltage falls below the overcharge detection
voltage (VCU).
When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises more
than the voltage at VSS pin due to the Vf voltage of the parasitic diode. This is because the discharge current
flows through the parasitic diode in the charging control FET. If this VM pin voltage is higher than or equal to the
discharge overcurrent detection voltage (VDIOV), S-8211D Series releases the overcharge status when the battery
voltage is lower than or equal to the overcharge detection voltage (VCU).
Cautions 1. If the battery is charged to a voltage higher than overcharge detection voltage (VCU) and the
battery voltage does not fall below overcharge detection voltage (VCU) even when a heavy load is
connected, discharge overcurrent detection and load short-circuiting detection do not function
until the battery voltage falls below overcharge detection voltage (VCU). Since an actual battery
has an internal impedance of tens of mΩ, the battery voltage drops immediately after a heavy
load that causes overcurrent is connected, and discharge overcurrent detection and load short-
circuiting detection function.
2. When a charger is connected after overcharge detection, the overcharge status is not released
even if the battery voltage is below overcharge release voltage (VCL). The overcharge status is
released when the VM pin voltage goes over charger detection voltage (VCHA) by removing the
charger.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
16
3. Overdischarge Status
With shutdown function
When the battery voltage falls below overdischarge detection voltage (VDL) during discharging in the normal status
and the detection continues for the overdischarge detection delay time (tDL) or longer, the S-8211D Series turns the
discharging control FET off to stop discharging. This condition is called the overdischarge status. Under the
overdischarge status, the VM pin voltage is pulled up by the resistor between the VM pin and VDD pin in the IC
(RVMD). When voltage difference between the VM pin and VDD pin then is 1.3 V (Typ.) or lower, the current
consumption is reduced to the power-down current consumption (IPDN). This condition is called the power-down
status.
The resistance (RVMS) between the VM pin and VSS pin is not connected in the power-down status and the
overdischarge status.
The power-down status is released when a charger is connected and the voltage difference between the VM pin and
VDD pin becomes 1.3 V (typ.) or higher.
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is lower
than charger detection voltage (VCHA), the S-8211D Series releases the overdischarge status and turns the
discharging FET on when the battery voltage reaches overdischarge detection voltage (VDL) or higher.
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is not
lower than charger detection voltage (VCHA), the S-8211D Series releases the overdischarge status when the battery
voltage reaches overdischarge release voltage (VDU) or higher.
Without shutdown function
When the battery voltage falls below overdischarge detection voltage (VDL) during discharging in the normal status
and the detection continues for the overdischarge detection delay time (tDL) or longer, the S-8211D Series turns the
discharging control FET off to stop discharging. This condition is called the overdischarge status. Under the
overdischarge status, the VM pin voltage is pulled up by the resistor between the VM pin and VDD pin in the IC
(RVMD).
The resistance (RVMS) between the VM pin and VSS pin is not connected in the overdischarge status.
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is lower
than charger detection voltage (VCHA), the S-8211D Series releases the overdischarge status and turns the
discharging FET on when the battery voltage reaches overdischarge detection voltage (VDL) or higher.
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is not
lower than charger detection voltage (VCHA), the S-8211D Series releases the overdischarge status when the battery
voltage reaches overdischarge release voltage (VDU) or higher.
4. Discharge Overcurrent Status (Discharge Overcurrent, Load Short-circuiting)
When a battery in the normal status is in the status where the voltage of the VM pin is equal to or higher than the
discharge overcurrent detection voltage because the discharge current is higher than the specified value and the
status lasts for the discharge overcurrent detection delay time, the discharge control FET is turned off and
discharging is stopped. This status is called the discharge overcurrent status.
In the discharge overcurrent status, the VM pin and VSS pin are shorted by the resistor between VM pin and VSS pin
(RVMS) in the IC. However, the voltage of the VM pin is at the VDD potential due to the load as long as the load is
connected. When the load is disconnected, the VM pin returns to the VSS potential.
This IC detects the status when the impedance between the EB+ pin and EB− pin (Refer to the Figure 13) increases
and is equal to the impedance that enables automatic restoration and the voltage at the VM pin returns to discharge
overcurrent detection voltage (VDIOV) or lower, the discharge overcurrent status is restored to the normal status.
Even if the connected impedance is smaller than automatic restoration level, the S-8211D Series will be restored to
the normal status from discharge overcurrent detection status when the voltage at the VM pin becomes the discharge
overcurrent detection voltage (VDIOV) or lower by connecting the charger.
The resistance (RVMD) between the VM pin and VDD pin is not connected in the discharge overcurrent detection
status.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 17
5. Detection for irregular charging current
During charging a battery which is in the normal status, if the VM pin voltage becomes lower than the charger
detection voltage (VCHA) and this status is held longer than the overcharge detection delay time (tCU), S-8211D turns
off the charge-control FET to stop charging. This is detection for irregular charging current.
This function works in the case that the DO pin voltage is in “H”, and the VM pin voltage becomes lower than the
charger detection voltage (VCHA). Thus if the irregular charger current flows in the battery in the overdischarge status,
S-8211D turns off the charge-control FET to stop charging; the DO pin voltage goes in “H” so that the battery voltage
becomes higher than the overdischarge detection voltage, and after the overcharge detection delay time (tcu).
The status irregular charging current detection is released by the lower potential difference between the VM and VSS
pin than the charger detection voltage (VCHA).
6. 0 V Battery Charging Function “Available”
This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V
battery charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB+ and EB− pins by
connecting a charger, the charging control FET gate is fixed to the VDD pin voltage.
When the voltage between the gate and source of the charging control FET becomes equal to or higher than the turn-
on voltage due to the charger voltage, the charging control FET is turned on to start charging. At this time, the
discharging control FET is off and the charging current flows through the internal parasitic diode in the discharging
control FET. When the battery voltage becomes equal to or higher than overdischarge release voltage (VDU), the S-
8211D Series enters the normal status.
Caution Some battery providers do not recommend charging for a completely self-discharged battery.
Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charging
function.
7. 0 V Battery Charging Function “Unavailable”
This function inhibits recharging when a battery that is internally short-circuited (0 V battery) is connected. When the
battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charging control FET gate is
fixed to the EB− pin voltage to inhibit charging. When the battery voltage is the 0 V battery charge inhibition battery
voltage (V0INH) or higher, charging can be performed.
Caution Some battery providers do not recommend charging for a completely self-discharged battery.
Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charging
function.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
18
9. Delay Circuit
The detection delay times are determined by dividing a clock of approximately 3.5 kHz by the counter.
Remark1. The discharge overcurrent detection delay time (tDIOV) and the load short-circuiting detection delay time
(tSHORT) start when the discharge overcurrent detection voltage (VDIOV) is detected. When the load short-
circuiting detection voltage (VSHORT) is detected over the load short-circuiting detection delay time (tSHORT)
after the detection of discharge overcurrent detection voltage (VDIOV), the S-8211D turns the discharging
control FET off within tSHORT from the time of detecting VSHORT.
DO Pin
VM Pin
V
DD
V
DD
Time
V
DIOV
V
SS
V
SS
V
SHORT
Load short-circuiting detection delay time (t
SHORT
)
Time
t
D
0 ≤ t
D
≤ t
SHORT
Figure 10
2. With shutdown function
When any overcurrent is detected and the overcurrent continues for longer than the overdischarge
detection delay time (tDL) without the load being released, the status changes to the power-down status at
the point where the battery voltage falls below overdischarge detection voltage (VDL).
When the battery voltage falls below overdischarge detection voltage (VDL) due to overcurrent, the S-
8211D Series turns the discharging control FET off via overcurrent detection. In this case, if the recovery
of the battery voltage is so slow that the battery voltage after the overdischarge detection delay time is
still lower than the overdischarge detection voltage, S-8211D Series shifts to the power-down status.
Without shutdown function
When any overcurrent is detected and the overcurrent continues for longer than the overdischarge
detection delay time (tDL) without the load being released, the status changes to the overdischarge status
at the point where the battery voltage falls below overdischarge detection voltage (VDL).
When the battery voltage falls below overdischarge detection voltage (VDL) due to overcurrent, the S-
8211D Series turns the discharging control FET off via overcurrent detection. In this case, if the recovery
of the battery voltage is so slow that the battery voltage after the overdischarge detection delay time is
still lower than the overdischarge detection voltage, S-8211D Series shifts to the overdischarge status.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 19
Timing Chart
(1) Overcharge Detection, Overdischarge Detection
VCU
VDU (VDL + VHD)
VDL
VCL (VCU − VHC)
Battery voltage
VSS
CO pin voltage
VDD
DO pin voltage
VSS
Charger connection
Load connection
Mode
*1
Overcharge detection delay time (
t
CU
)Overdischarge detection delay time (
t
DL
)
(1) (2) (1) (3) (1)
VDIOV
VSS
VM pin voltage
VDD
VEB−
VDD
VEB−
*1. (1) : Normal mode
(2) : Overcharge mode
(3) : Overdischarge mode
Remark The charger is assumed to charge with a constant current.
Figure 11
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
20
(2) Discharge Overcurrent Detection
V
DD
V
SS
V
SHORT
(1) (2) (1) (1)
Load short-circuiting
detection delay time (t
SHORT
)
(2)
V
DIOV
Discharge overcurrent
detection delay time (t
DIOV
)
V
CU
V
DU
(V
DL
+ V
HD
)
V
DL
V
CL
(V
CU
− V
HC
)
Battery voltage
V
SS
CO pin voltage
V
DD
DO pin voltage
V
SS
Load connection
Mode
*1
VM pin voltage
V
DD
*1. (1) : Normal mode
(2) : Discharge overcurrent mode
Remark The charger is assumed to charge with a constant current.
Figure 12
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 21
(3) Charger Detection
V
DD
DO pin voltage
V
SS
V
DD
V
SS
CO pin voltage
V
DD
V
SS
VM pin voltage
V
CHA
V
CU
V
DU
(V
DL
+
V
HD
)
V
DL
V
CL
(V
CU
−
V
HC
)
Battery voltage
Mode
*1
Load connection
Overdischarge detection
delay time (t
DL
)
(1)
In case VM pin voltage < V
CHA
Overdischarge is released at the
overdischarge detection voltage (V
DL
)
Charger connection
(2)(1)
*1. (1) : Normal mode
(2) : Overdischarge mode
Remark The charger is assumed to charge with a constant current.
Figure 13
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
22
(4) Detection for irregular charging current
V
DD
DO pin voltage
V
SS
V
DD
V
SS
CO pin voltage
V
DD
V
SS
VM pin voltage
V
CHA
V
CU
V
DU
(V
DL
+
V
HD
)
V
DL
V
CL
(V
CU
−
V
HC
)
Battery voltage
Charger connection
Abnormal charging current detection delay time
( = Overcharge detection delay time (t
CU
))
Mode
*1
Load connection
Overdischarge detection
delay time (t
DL
)
(1)
(2) (3)
(1)
(1)
*1. (1) : Normal mode
(2) : Overdischarge mode
(3) : Overcharge mode
Remark The charger is assumed to charge with a constant current.
Figure 14
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 23
Battery Protection IC Connection Example
R1
Battery C1
VSS
DO
VDD
CO VM
S-8211D Series
FET1 FET2
EB
−
EB
+
R2
Figure 15
Table 12 Constants for External Components
Symbol Part Purpose Typ. Min. Max. Remark
FET1 N-channel
MOS FET Discharge control
Threshold voltage ≤ Overdischarge detection
voltage *1
Gate to source withstanding voltage ≥
Charger voltage *2
FET2 N-channel
MOS FET Charge control
Threshold voltage ≤ Overdischarge detection
voltage *1
Gate to source withstanding voltage ≥
Charger voltage *2
R1 Resistor
ESD protection,
For power fluctuation 220 Ω 100 Ω 330 Ω
Resistance should be as small as possible to
avoid lowering the overcharge detection
accuracy due to current consumption. *3
C1 Capacitor For power fluctuation 0.1 µF 0.022 µF 1.0 µF Connect a capacitor of 0.022 µF or higher
between VDD pin and VSS pin. *4
R2 Resistor
Protection for reverse
connection of a charger 2 kΩ 300 Ω 4 kΩ
Select as large a resistance as possible to
prevent current when a charger is connected
in reverse. *5
*1. If the threshold voltage of an FET is low, the FET may not cut the charging current. If an FET with a threshold voltage
equal to or higher than the overdischarge detection voltage is used, discharging may be stopped before overdischarge is
detected.
*2. If the withstanding voltage between the gate and source is lower than the charger voltage, the FET may be destroyed.
*3. If R1 has a high resistance, the voltage between VDD pin and VSS pin may exceed the absolute maximum rating when a
charger is connected in reverse since the current flows from the charger to the IC. Insert a resistor of 100 Ω or higher as
R1 for ESD protection.
*4. If a capacitor of less than 0.022 µF is connected to C1, DO pin may oscillate when load short-circuiting is detected. Be
sure to connect a capacitor of 0.022 µF or higher to C1.
*5. If R2 has a resistance higher than 4 kΩ, the charging current may not be cut when a high-voltage charger is connected.
Caution 1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do not
guarantee proper operation. Perform through evaluation using the actual application to set the
constant.
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
24
Precautions
• The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 25
Characteristics (Typical Data)
1. Current Consumption
(1) IOPE vs. Ta (2) IPDN vs. Ta
−40 −25 0 25 50 75 85
6
5
4
3
2
1
0
Ta [ °C]
I
OPE
[µA]
−40 −25 0 25 50 7585
Ta [°C]
0.16
0.14
0.12
0.10
0.08
0.06
0
I
PDN
[µA]
0.04
0.02
(3) IOPE vs. VDD
0 2 4 6
V
DD
[V]
6
5
4
3
2
1
0
I
OPE
[µA]
8
2. Overcharge Detection / Release Voltage, Overdischarge Detection / Release Voltage, Overcurrent
Detection Voltage, and Delay Time
(1) VCU vs. Ta (2) VCL vs. Ta
−40 −25 0 25 50 75 85
Ta [ °C]
4.350
4.345
4.340
4.335
4.330
4.325
4.300
V
CU
[V]
4.320
4.315
4.310
4.305
−40−25 0 25 50 75 85
Ta [°C]
4.125
4.115
4.105
4.095
4.085
4.075
4.025
V
CL
[V]
4.065
4.055
4.045
4.035
(3) VDU vs. Ta (4) VDL vs. Ta
−40 −25 0 25 50 75 85
Ta [ °C]
2.95
2.94
2.93
2.92
2.91
2.90
2.85
V
DU
[V]
2.89
2.88
2.87
2.86
−40 −25 0 25 50 75 85
Ta [ °C]
2.60
2.58
2.56
2.54
2.52
2.50
2.40
V
DL
[V]
2.48
2.46
2.44
2.42
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
26
(5) tCU vs. Ta (6) tCL vs. Ta
−40 −25 0 25 50 7585
Ta [°C]
1.50
1.45
1.40
1.35
1.30
1.25
1.00
t
CU
[s]
1.20
1.15
1.10
1.05
−40 −25 0 25 50 7585
Ta [°C]
50
48
46
44
42
40
30
t
CL
[s]
38
36
34
32
(7) tDU vs. Ta (8) tDL vs. Ta
−40 −25 0 25 50 7585
Ta [ °C]
2.85
2.75
2.65
2.55
2.45
2.35
1.85
t
DU
[ms]
2.25
2.15
2.05
1.95
−40 −25 0 25 50 7585
Ta [°C]
200
190
180
170
160
150
100
t
DL
[ms]
140
130
120
110
(9) VDIOV vs. Ta (10) tDIOV vs. VDD
−40 −25 0 25 50 7585
Ta [ °C]
0.175
0.170
0.165
0.160
0.155
0.150
0.125
VDIOV [V]
0.145
0.140
0.135
0.130
3.0 3.5 4.0 4.5
VDD [V]
14
13
12
11
10
9
4
tDIOV [ms]
8
7
6
5
(11) tDIOV vs. Ta
−40 −25 0 25 50 75 85
Ta [°C]
14
13
12
11
10
9
4
tDIOV [ms]
8
7
6
5
BATTERY PROTECTION IC FOR 1-CELL PACK
Rev.4.5_00 S-8211D Series
Seiko Instruments Inc. 27
(12) VSHORT vs. Ta (13) tSHORT vs. VDD
0.75
0.70
0.65
0.60
0.55
0.50
0.25
VSHORT [V]
0.45
0.40
0.35
0.30
−40 −25 0 25 50 7585
Ta [ °C]
3.0 3.5 4.0 4.5
V
DD
[V]
0.65
0.63
0.61
0.59
0.57
0.55
0.45
t
SHORT
[ms]
0.53
0.51
0.49
0.47
(14) tSHORT vs. Ta
−40 −25 0 25 50 7585
Ta [°C]
1.0
0.9
0.8
0.7
0.6
0.5
0
t
SHORT
[ms]
0.4
0.3
0.2
0.1
3. CO pin / DO pin
(1) ICOH vs. VCO (2) ICOL vs. VCO
0
−0.1
−0.2
−0.5
I
COH
[mA]
−0.3
−0.4
0 1 2 3 4
V
CO
[V]
0.5
0.4
0.3
0
I
COL
[mA]
0.2
0.1
0 1 2 3 4
V
CO
[V]
(3) IDOH vs. VDO (4) IDOL vs. VDO
0 1 2 3 4
VDO [V]
0
−0.05
−0.10
−0.15
−0.30
IDOH [mA]
−0.20
−0.25
0 0.5 1.0 1.5
VDO [V]
0.20
0.15
0.10
0
IDOL [mA]
0.05
BATTERY PROTECTION IC FOR 1-CELL PACK
S-8211D Series Rev.4.5_00
Seiko Instruments Inc.
28
Marking Specifications
(1) SOT-23-5
(1) to (3): Product Code (refer to Product Name vs. Product Code)
(4) : Lot number
1
SOT-23-5
To
p
view
2 3
4
(1) (2) (3) (4)
5
Product Name vs. Product Code
Product Code
Product Name (1) (2) (3)
S-8211DAB-M5T1G R 2 B
S-8211DAE-M5T1G R 2 E
S-8211DAH-M5T1G R 2 H
S-8211DAI-M5T1G R 2 I
S-8211DAJ-M5T1G R 2 J
S-8211DAK-M5T1G R 2 K
S-8211DAL-M5T1G R 2 L
S-8211DAM-M5T1G R 2 M
Remark Please contact our sales office for the products other than those specified above.
(2) SNT-6A
(1) to (3): Product Code (refer to Product Name vs. Product Code)
(4) to (6): Lot number
SNT-6A
To
p
view
1
2
3 4
6
5
(1)
(4)
(2)
(5)
(3)
(6)
Product Name vs. Product Code
Product Code
Product Name (1) (2) (3)
S-8211DAB-I6T1G R 2 B
S-8211DAE-I6T1G R 2 E
S-8211DAF-I6T1G R 2 F
S-8211DAG-I6T1G R 2 G
Remark Please contact our sales office for the products other than those specified above.
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
2.9±0.2
1.9±0.2
0.95±0.1
0.4±0.1
0.16 +0.1
-0.06
123
4
5
No. MP005-A-P-SD-1.2
MP005-A-P-SD-1.2
SOT235-A-PKG Dimensions
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
ø1.5 +0.1
-0 2.0±0.05
ø1.0 +0.2
-0 4.0±0.1
1.4±0.2
0.25±0.1
3.2±0.2
123
45
No. MP005-A-C-SD-2.1
MP005-A-C-SD-2.1
SOT235-A-Carrier Tape
Feed direction
4.0±0.1(10 pitches:40.0±0.2)
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
QTY. 3,000
No. MP005-A-R-SD-1.1
MP005-A-R-SD-1.1
SOT235-A-Reel
Enlarged drawing in the central part
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-6A-A-PKG Dimensions
PG006-A-P-SD-2.0
No. PG006-A-P-SD-2.0
0.2±0.05
0.48±0.02
0.08 +0.05
-0.02
0.5
1.57±0.03
123
45
6
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5
1.85±0.05 0.65±0.05
0.25±0.05
5°
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
PG006-A-C-SD-1.0
SNT-6A-A-Carrier Tape
No. PG006-A-C-SD-1.0
+0.1
-0
1
2
4
3
56
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
QTY.
No. PG006-A-R-SD-1.0
PG006-A-R-SD-1.0
Enlarged drawing in the central part
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-6A-A-Reel
5,000
No.
TITLE
SCALE
UNIT mm
SNT-6A-A-Land Recommendation
Seiko Instruments Inc.
PG006-A-L-SD-3.0
No. PG006-A-L-SD-3.0
0.3
0.20.3
0.20.3
0.52
1.36
0.52
Caution Making the wire pattern under the package is possible. However, note that the package
may be upraised due to the thickness made by the silk screen printing and of a solder
resist on the pattern because this package does not have the standoff.
•
The information described herein is subject to change without notice.
• Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
• When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
• Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
• The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
• Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.
