ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT GENERAL DESCRIPTION FEATURES The ICS8302I-01 is a low skew, 1-to-2 LVCMOS/LVTTL Fanout Buffer w/Complementary Output. The ICS8302I-01 has a single ended clock input. The single ended clock input accepts LVCMOS or LVTTL input levels. The ICS8302I-01 is characterized at full 3.3V for input VDD, and mixed 3.3V and 2.5V for output operating supply modes (VDDO). Guaranteed output and part-to-part skew characteristics make the ICS8302I-01 ideal for clock distribution applications demanding well defined performance and repeatability. * Complementary LVCMOS / LVTTL output * LVCMOS / LVTTL clock input accepts LVCMOS or LVTTL input levels * Maximum output frequency: 250MHz * Output skew: 165ps (maximum) * Part-to-part skew: 800ps (maximum) * Small 8 lead SOIC package saves board space * Full 3.3V or 3.3V core/2.5V output supply modes * -40C to 85C ambient operating temperature * Available in both standard and lead-free compliant packages BLOCK DIAGRAM PIN ASSIGNMENT VDDO VDD CLK GND Q CLK 1 2 3 4 8 7 6 5 Q GND VDDO nQ ICS8302I-01 nQ 8-Lead SOIC 3.8mm x 4.8mm, x 1.47mm package body M Package Top View 8302AMI-01 www.idt.com 1 REV. A JULY 29, 2010 ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT TABLE 1. PIN DESCRIPTIONS Number Name 1, 6 VDDO Power Type Output supply pins. 2 VDD Power Power supply pin. Pulldown Description 3 CLK Input 4,7 GND Power Power supply ground. LVCMOS / LVTTL clock input. 5 nQ Output Complementary clock output. LVCMOS / LVTTL interface levels. 8 Q Output Clock output. LVCMOS / LVTTL interface levels. NOTE: Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter CIN Input Capacitance CPD Power Dissipation Capacitance (per output) RPULLDOWN Input Pulldown Resistor ROUT Output Impedance 8302AMI-01 Test Conditions Minimum Typical Maximum Units 4 pF VDD, VDDO = 3.465V 22 pF VDD = 3.465V, VDDO = 2.625V 16 pF 51 k 5 www.idt.com 2 7 12 REV. A JULY 29, 2010 ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5 V Outputs, VO -0.5V to VDDO + 0.5V Package Thermal Impedance, JA 112.7C/W (0 lfpm) Storage Temperature, TSTG -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 3.3V5% OR 2.5V5%, TA = -40C TO 85C Symbol Parameter VDD Power Supply Voltage Test Conditions VDDO Output Power Supply Voltage IDD IDDO Minimum Typical Maximum Units 3.135 3.3 3.465 V 3.135 3.3 3.465 V 2.375 2.5 2.625 V Power Supply Current 13 mA Output Supply Current 4 mA TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 3.3V5% OR 2.5V5%, TA = -40C TO 85C Symbol Parameter Maximum Units VIH Input High Voltage Test Conditions Minimum 2 Typical VDD + 0.3 V VIL Input Low Voltage -0.3 0.8 V 150 A IIH Input High Current CLK VDD = VIN = 3.465V IIL Input Low Current CLK VDD = 3.465V, VIN = 0V -5 A VDDO = 3.465, 50 to VDDO/2 2.6 V VDDO = 3.465, IOH = -100A 2.9 V VDDO = 2.625, 50 to VDDO/2 1.8 V VDDO = 2.625, IOH = -100A 2.2 VOH VOL 8302AMI-01 Output High Voltage Output Low Voltage V VDDO = 3.465, 50 to VDDO/2 0.5 V VDDO = 3.465, IOL = 100A 0.2 V VDDO = 2.625, 50 to VDDO/2 0.5 V VDDO = 2.625, IOL = 100A 0.2 V www.idt.com 3 REV. A JULY 29, 2010 ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT TABLE 4A. AC CHARACTERISTICS, VDD = VDDO = 3.3V5%, TA = -40C TO 85C Symbol Parameter fMAX Output Frequency tpLH Propagation Delay, Low-to-High; NOTE 1 Test Conditions Minimum Typical 1.8 Maximum Units 250 MHz 2.7 ns tsk(o) Output Skew; NOTE 2, 4 165 ps tsk(pp) Par t-to-Par t Skew; NOTE 3, 4 800 ps t R / tF Output Rise/Fall Time ps odc Output Duty Cycle 20% to 80% 300 800 133MHz 45 55 % 60 % Maximum Units 250 MHz 2.9 ns 133MHz < 250MHz 40 NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. TABLE 4B. AC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 2.5V5%, TA = -40C TO 85C Symbol Parameter fMAX Output Frequency tpLH Propagation Delay, Low-to-High; NOTE 1 Test Conditions Minimum Typical 1.9 tsk(o) Output Skew; NOTE 2, 4 250 ps tsk(pp) Par t-to-Par t Skew; NOTE 3, 4 900 ps t R / tF Output Rise/Fall Time ps odc Output Duty Cycle 20% to 80% 100 850 133MHz 45 55 % 60 % 133MHz < 250MHz 40 NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. 8302AMI-01 www.idt.com 4 REV. A JULY 29, 2010 ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT PARAMETER MEASUREMENT INFORMATION 1.65V5% 2.05V5% 1.25V5% SCOPE VDD, VDDO VDDO Qx LVCMOS SCOPE VDD Qx LVCMOS GND GND -1.65V5% -1.25V5% 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT V CLK 3.3V/2.5V OUTPUT LOAD AC TEST CIRCUIT V DD DDO 2 V DDO 2 Q nQ Q 2 nQ V DDO 2 V DDO 2 tsk(o) t PD OUTPUT SKEW PROPAGATION DELAY PART 1 V DD Q 80% 80% tR tF 2 PART 2 V DDO Clock Outputs 2 Q nQ 20% 20% V DDO 2 tsk(pp) PART-TO-PART SKEW OUTPUT RISE/FALL TIME nQ VDDO VDDO 2 Q 2 t PW t PERIOD odc = t PW t PERIOD OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 8302AMI-01 www.idt.com 5 REV. A JULY 29, 2010 ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT RELIABILITY INFORMATION TABLE 5. JAVS. AIR FLOW TABLE FOR 8 LEAD SOIC JA by Velocity (Linear Feet per Minute) Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 0 200 500 153.3C/W 112.7C/W 128.5C/W 103.3C/W 115.5C/W 97.1C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TRANSISTOR COUNT The transistor count for ICS8302I-01 is: 322 8302AMI-01 www.idt.com 6 REV. A JULY 29, 2010 ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT PACKAGE OUTLINE - SUFFIX M FOR 8 LEAD SOIC TABLE 6. PACKAGE DIMENSIONS SYMBOL Millimeters MINIMUN N A MAXIMUM 8 1.35 1.75 A1 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 4.80 5.00 E 3.80 4.00 e H 1.27 BASIC 5.80 6.20 h 0.25 0.50 L 0.40 1.27 0 8 Reference Document: JEDEC Publication 95, MS-012 8302AMI-01 www.idt.com 7 REV. A JULY 29, 2010 ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT TABLE 7. ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature 8302AMI-01 302AI01 8 lead SOIC tube -40C to 85C 8302AMI-01T 302AI01 8 lead SOIC 2500 tape & reel -40C to 85C 8302AMI-01LF 302AI01L 8 lead "Lead-Free" SOIC tube -40C to 85C 8302AMI-01LFT 302AI01L 8 lead "Lead-Free" SOIC 2500 tape & reel -40C to 85C NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology, Inc. (IDT) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. 8302AMI-01 www.idt.com 8 REV. A JULY 29, 2010 ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT REVISION HISTORY SHEET Rev Table Page A T7 8 10 8302AMI-01 Description of Change Updated datasheet's header/footer with IDT from ICS. Removed ICS prefix from Par t/Order Number column. Added Contact Page. www.idt.com 9 Date 7/29/10 REV. A JULY 29, 2010 ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT We've Got Your Timing Solution. 6024 Silver Creek Valley Road San Jose, CA 95138 Sales Tech Support 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 netcom@idt.com (c) 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA 8302AMI-01 www.idt.com 10 REV. A JULY 29, 2010