DS04-27233-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP For Power Supply Applications
(General Purpose DC/DC Converter)
1-ch DC/DC Converter IC
for low voltage
MB39A105
■
■■
■DESCRIPTION
The MB39A105 is 1-channel DC/DC conver ter IC using pulse width modulation (PWM). This IC is ideal for up
conversion.
The minimum operating voltage is low (1.8 V) , and the MB39A105 is best for built-in pow er supply such as LCD
monitors. Also the short-circuit protection detection output function pre vents input/output short on a chopper type
up-converter.
This product is covered by US Patent Number 6,147,477.
■
■■
■FEATURES
• Power supply voltage range : 1.8 V to 6 V
• Reference voltage accuracy : ± 1 %
• High-frequency operation capability : 1 MHz (Max)
• Built-in standby function: 0 µA (Typ)
• Built-in timer-latch short-circuit protection circuit
• Built-in short-circuit protection detection output function
• Built-in soft-start circuit independent of loads
• Built-in totem-pole type output for Nch MOS FET
• Package : TSSOP-8P (Thickness 1.1 mm Max)
■
■■
■PACKAGE
8-pin plastic TSSOP
(FPT-8P-M05)
MB39A105
2
■
■■
■PIN ASSIGNMENT
(TOP VIEW)
(FPT-8P-M05)
−INE
CSCP
VCC
SCPOD
1
2
3
4
FB
RT
GND
OUT
8
7
6
5
MB39A105
3
■
■■
■PIN DESCRIPTION
Pin No. Symbol I/O Descriptions
1−INE I Error amplifiers (Error Amp) inverted input terminal
2CSCPTimer-latch short-circuit protection capacitor connection terminal
3VCCPower supply terminal
4SCPODO
Open drain output terminal for short-circuit protection detection
During timer-latch short-circuit protection operation : Output “High-Z”
During normal operation : Output “L”
5 OUT O External Nch FET gate drive terminal
6GNDGround terminal
7RTTriangular wave oscillation frequency setting resistor connection terminal
8 FB O Error Amplifier (Error Amp) output terminal
MB39A105
4
■
■■
■BLOCK DIAGRAM
+
−
−
+
+
+
−
+
−
1
8
2
−INE
FB
CSCP
7
RT
6
5
GND
OUT
43 SCPODVCC
VREF
VREF
Error Amp
SCP
Comp.
PWM
Comp. Drive
Nch
IO = 400 mA
at VCC = 3.3 V
(0.5 V ± 1%)
±10%
(1.0 V)
UVLO
OSC
SQ
R
(0.9 V)
(0.7 V)
(0.3 V)
bias
RT Current
VREF Power
ON/OFF
CTL
VREF
(1.27 V)
L : UVLO release
MB39A105
5
■
■■
■ABSOLUTE MAXIMUM RATINGS
* : The packages are mounted on the epoxy board (10 cm × 10 cm).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■
■■
■RECOMMENDED OPERATING CONDITIONS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
Parameter Symbol Condition Rating Unit
Min Max
Power supply voltage VCC VCC terminal 7V
Output current IOOUT terminal 35 mA
Output peak current IOP Duty ≤ 5% (t = 1/fOSC×Duty) 700 mA
Power dissipation PDTa ≤ +25 °C490* mW
Storage temperature TSTG −55 +125 °C
Parameter Symbol Condition Value Unit
Min Typ Max
Power supply voltage VCC VCC terminal 1.8 6V
Input voltage VINE −INE terminal 0 VCC − 0.9 V
SCPOD terminal output voltage VSCPOD SCPOD terminal 0 6V
SCPOD terminal output current ISCPOT SCPOD terminal 0 2mA
Output current IOOUT terminal −30 +30 mA
Oscillation frequency fosc 100 500 1000 kHz
Timing resistor RTRT terminal 3.3 7.5 33 kΩ
Short-circuit detection capacitor CSCP CSCP terminal 0.22 1.0 µF
Operating ambient temperature Ta −30 +25 +85 °C
MB39A105
6
■
■■
■ELECTRICAL CHARACTERISTICS (VCC = 3.3 V, Ta = +25 °C)
*: Standard design value.
Parameter Symbol Pin
No Conditions Value Unit
Min Typ Max
1. Under voltage
lockout
protection circuit
block [UVLO]
Threshold voltage VTLH 3VCC = 1.15 1.35 1.55 V
2. Short-circuit
protection block
[SCP]
Threshold voltage VTH 20.95 1.00 1.05 V
Short-circuit detection time
setting difference voltage ∆VCSCP 20.15 0.20 0.25 V
Input source current ICSCP 2CSCP = 0.85 V −1.76 −0.88 −0.44 µA
Reset voltage VRST 3VCC = 1.1 1.3 1.5 V
SCPOD terminal output
leak current ILEAK 4SCPOD = 3.3 V 01.0µA
SCPOD terminal output on
resistor RON 4SCPOD = 1 mA 50 100 Ω
3. Triangular
wave oscillator
block [OSC]
Oscillation frequency fosc 5 RT = 7.5 kΩ450 500 550 kHz
Frequency temperature
variation ∆fOSC/
fOSC 5Ta = 0 °C to +85 °C1* %
4. Soft-start block
[CS] Charge current ICS 2CSCP = 0 V −16 −11 −6µA
5. Error amplifier
block [Error Amp]
Threshold voltage VTH 1FB = 0.5 V 0.495 0.5 0.505 V
Input bias current IB1−INE = 0 V −120 −30 nA
Voltage gain AV8DC 70* dB
Frequency band width BW 8 AV = 0 dB 1.1* MHz
Output voltage VOH 81.17 1.27 1.37 V
VOL 840 200 mV
Output source current ISOURCE 8FB = 0.5 V −80 −50 µA
Output sink current ISINK 8FB = 0.5 V 100 300 µA
6. PWM compar-
ator block
[PWM Comp.] Maximum duty cycle Dtr 5 RT = 7.5 kΩ85 90 95 %
7.Output block
[Drive]
Output source current ISOURCE 5OUT = 0 V,
Duty ≤ 5%
(t = 1/fosc×Duty) −400* mA
Output sink current ISINK 5OUT = 3.3 V,
Duty ≤ 5%
(t = 1/fosc×Duty) 400* mA
Output ON resistor ROH 5OUT = −15 mA 4.0* Ω
ROL 5OUT = 15 mA 3.0 6.0 Ω
8. General block Standby current ICCS 3RT = OPEN 010µA
Power supply current ICC 3RT = 7.5 kΩ1.2 1.8 mA
MB39A105
7
■
■■
■TYPICAL CHARACTERISTICS
(Continued)
Power supply current ICC (mA)
Power supply current ICC (mA)
Power Supply Current vs. Power Supply Voltage Power Supply Current vs. RT Terminal Current
Power supply voltage VCC (V) RT terminal current IRT (µA)
Error Amplifier Threshold
Voltage VTH (V)
Power supply voltage VCC (V)
Error Amplifier Threshold Voltage vs.
Power Supply Voltage
Error Amplifier Threshold
Voltage VTH (V)
Error Amplifier Threshold Voltage vs.
Ambient Temperature
Ambient temperature Ta (°C)
Triangular Wave Oscillation
Frequency fOSC (kHz)
Ta = +25 °C
RT = 7.5 kΩ
5
4
3
2
1
00246810
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0 0 1020304050
Ta = +25 °C
VCC = 3.3 V
ICC
Ta = +25 °C
VCC = 3.3 V
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0 0246810
VCC = 3.3 V
RT = 7.5 kΩ
0.52
0.51
0.50
0.49
0.48−40 −20 0 20 40 60 80 100
Ta = +25 °C
RT = 7.5 kΩ
600
550
500
450
400 1234567
Triangular Wave Oscillation Frequency vs.
Power supply voltage
Power supply voltage VCC (V)
MB39A105
8
(Continued)
Triangular Wave Oscillation Frequency
vs. Timing Resistor
Triangular wave oscillation
frequency fOSC (kHz)
Timing resistor RT (kΩ)
Triangular Wave Oscillation Frequency
vs. Ambient Temperature
Triangular wave oscillation
frequency fOSC (kHz)
Ambient temperature Ta (°C)
Error Amplifier Gain and Phase
vs. Frequency
Frequency f (Hz)
Max On Duty (%)
Max On Duty vs.
Triangular Wave Oscillation Frequency
Triangular wave oscillation frequency fOSC (kHz)
Ta = +25 °C
VCC = 3.3 V
10000
1000
100
10 1 10 100
VCC = 3.3 V
RT = 7.5 kΩ
600
550
500
450
400−40 −20 0 20 40 60 80 100
Ta = +25 °C
VCC = 3.3 V
100
95
90
85
80
75
7010 100 1000 10000
−
+
+
+ 10
11 9
IN OUT
Error Amp
1 µF
1.24 V
10 kΩ
2.4 kΩ
240 kΩ
10 kΩ
40
30
20
10
0
−10
−20
−30
−40
180
90
0
−90
−180
100 1 k 10 k 100 k 1 M 10 M
Ta = +25 °C
VCC = 3.3 V
AV
ϕ
Phase φ (deg)
Gain AV (dB)
MB39A105
9
(Continued)
600
500
400
300
200
100
0
490
−40 −20 0 20 40 60 80 100
Power Dissipation vs. Ambient Temperature
Power dissipation PD (mW)
Ambient temperature Ta ( °C)
MB39A105
10
■
■■
■FUNCTIONS
1. DC/DC Converter Functions
(1) Triangular-wave oscillator block (OSC)
The triangular wave oscillator incorporates a timing resistor connected to RT terminal (pin 7) to generate
triangular oscillation waveform amplitude of 0.3 V to 0.7 V.
The triangular waveforms are input to the PWM comparator in the IC.
(2) Err or amplifier block (Error Amp1, Error Amp2)
The error amplifier detects the DC/DC converter output voltage and outputs PWM control signals. In addition,
an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output ter minal to
inverted input terminal of the error amplifier, enabling stable phase compensation to the system.
Also, it is possible to prev ent rush current at pow er supply start-up by connecting a soft-start capacitor with the
CSCP terminal (pin 2) which is the non-inv erted input terminal for Error Amp . The use of Error Amp f or soft-start
detection makes it possible for a system to operate on a fixed soft-star t time that is independent of the output
load on the DC/DC converter.
(3) PWM comparator block (PWM Comp.)
The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/
output voltage.
The comparator k eeps output tr ansistor on while the error amplifier output v oltage and the DTC voltage remain
higher than the triangular wave voltage.
(4) Output block (Drive)
The output block is in the totem pole configuration, capable of driving an external N-channel MOS FET.
MB39A105
11
2. Power Control Function
A switch in series with a resistor connected with the RT terminal (pin 7) allows you to turn on or turn off the power .
3. Protective Functions
(1) Timer-latch short-circuit protection circuit (SCP)
Short-circuit detection comparator detects the error amplifier output voltage level. If the load conditions for the
DC/DC conv erter are stable , the short-circuit protection comparator is k ept in equilibrium condition because the
error amplifier is free from output var iation. At this time the CSCP ter minal (pin 2) is held at the soft-start end
voltage (about 0.8 V) . If the DC/DC converter output voltage falls and error amplifier output is over 0.9 V, the
timer circuits are actuated to start charging the external capacitor CSCP.
When the capacitor vo ltage reaches about 1.0 V, the latch is set and the circuit is tur ned off the exter nal FET
and sets the dead time to 100 %. At this time, latch input is closed and the CSCP terminal is held at the “L” le vel.
To reset the actuated protection circuit, tur n off and on the power supply again and set VCC ter minal voltage
(pin 3) to 1.1 V (Min) or less. (See ■SETTING TIME CONSTANT FOR TIMER-LATCH SHOR T-CIRCUIT PR O-
TECTION CIRCUIT.)
(2) Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned
on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such
malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect
to the power supply voltage, turns off the output FET, and sets the dead time to 100% while holding the CSCP
terminal (pin 2) at the “L” level.
The circuit restores the output transistor to normal when the supply voltage reaches the threshold v oltage of the
undervoltage lockout protection circuit.
(3) Short-circuit protection detection output function
Connecting the Pch MOS FET to SCPOD terminal (pin 4) tur ns off the Pch MOS FET when the short-circuit
protection is detected or under vo ltage lockout protection circuit operate. This allows you to prevent the shor t-
circuit between the input and output when the short-circuit protection is detected, thus preventing the input
voltage from occurring in the output region in the standby state.
(4) Protection circuit operating function table
This table refers to output condition when protection circuit is operating.
Operating circuit SCPOD OUT
Short-circuit protection circuit High-Z L
Under voltage lockout protection circuit High-Z L
RT
ON/OFF CTL
(L : OFF, H : ON)
On/off setting conditions of power supply
CTL Power
L OFF (standby)
H ON (operating)
MB39A105
12
■
■■
■SETTING THE OUTPUT VOLTAGE
■
■■
■SETTING THE TRIANGULAR OSCILLATION FREQUENCY
The triangular oscillation frequency is determined by the timing resistor (RT) connected to the RT terminal (pin 7) .
Triangular oscillation frequency : fosc
−
+
+
VO
R1
R2 −INE
CSCP
Error
Amp
(0.5 V)
VO (V) =(R1 + R2)
0.5
1
2
R2
• Output Voltage Setting Circuit
fosc (kHz) :=3750
RT (kΩ)
MB39A105
13
■
■■
■SETTING THE SOFT-START TIMES
To prevent rush currents when the IC is tur ned on, you can set a soft-star t by connecting soft-star t capacitors
(CSCP) to the CSCP terminal (pin 2). When IC starts (VCC ≥ UVLO threshold voltage), the external soft-start
capacitors (CSCP) connected to CSCP term inal are charged at 11 µA. The error amplifier output (FB (pin 8) ) is
deter mined by comparison between the lower one of the potentials at two non-inver ted input ter minals (0.5 V
in an inter nal reference voltage, CSCP term inal voltages) and the inverted input terminal voltage (−INE (pin 1)
voltage).
The FB terminal voltage is decided for the soft-start period by the comparison between 0.5 V in an internal
reference voltage and the voltages of the CSCP terminal. The DC/DC converter output voltage rises in proportion
to the CSCP terminal voltage as the soft-start capacitor connected to the CSCP terminal is charged.
The soft-start time is obtained from the following formula:
Soft-start time: ts (time to output 100%)
ts (s) := 0.045 × CSCP (µF)
t
:= 0.8 V
:= 0.5 V
:= 0 V
CSCP terminal voltage
Error Amp block −INE voltage
Soft-start time (ts)
−
+
+
VO
1
2
8
R1
R2
−INE
VREF
CSCP
CSCP
FB
Error Amp
UVLO
(0.5 V)
11 µA
L priority
• Soft-Start Circuit
MB39A105
14
■
■■
■SETTING TIME CONST ANT FOR TIMER-LATCH SHORT -CIRCUIT PROTECTION CIRCUIT
The error amplifier’s output level alaways does the comparison operation with the short-circuit protection com-
parator (SCP Comp.) to the reference voltage.
While DC/DC conv erter load conditions are stable, the short-circuit detection comparator output remains stable ,
and the CSCP terminal (pin 2) is held at soft-start end voltage (about 0.8 V) .
If the load condition changes rapidly due to a shor t-circuit of the load and the DC/DC converter output voltage
drops, the output of the error amplifier usually goes over 0.9 V. In that case, the capacitor CSCP is charged further.
When the capacitor CSCP is charged to about 1.0 V, the latch is set and the e xternal FET is turned off (dead time
is set to 100%). At this time, the latch input is closed and the CSCP terminal (pin 2) is held at “L” level. When
CSCP ter minal becomes “L” level, SCPOD terminal Nch MOS FET becomes OFF. SCPOD terminal (pin 4) is
held at “L” level and can be used as a short-circuit operating detection signal during normal operation.
To reset the actuated protection circuit, the power supply turn off and on again to lower the VCC terminal (pin
3) voltage to 1.1 V (Min) or less.
Short-circuit detection time (tCSCP)
tCSCP (s) := 0.23 × CSCP (µF)
−
−
+
−
+
−
+
FB
R1
R2
VO
−INE
CSCP
(0.88 µA)(10.1 µA)
(1.0 V)
(0.5 V)
(0.9 V)
to Drive
VREF
VREF
SR
Latch UVLO
Error
Amp
SCP
Comp.
8
1
2
• Timer-latch short-circuit protection circuit
MB39A105
15
1.0 V
0.9 V
0.8 V
0.7 V
0.3 V
t
• Soft-start and short-circuit protection circuit timing char t
FB voltage
CSCP voltage
OSC
amplifier
Output short
Output
short
Soft-start time
tSShort-circuit detection time
tCSCP
MB39A105
16
■
■■
■I/O EQUIVALENT CIRCUIT
3
6
2CSCP
VCC
GND
SCPOD
GND
VCC
4
+
−
CSCP
1.0 V
−INE CS
GND
VCC
(1.27 V)
FB
0.5 V
18
RT
GND
VCC
7
+
−
0.33 V
〈〈Soft-start block (CS) 〉〉 〈〈Short-circuit protection circuit block (SCP) 〉〉
〈〈Triangular wave oscillator block (RT) 〉〉 〈〈Error amplifier block〉〉
〈〈Output block〉〉
OUT
GND
VCC
5
ESD
protection
element
ESD
protection
element
ESD
protection
element
MB39A105
17
■
■■
■APPLICATION EXAMPLE
+
−
−
+
+
+
−
−
+
A
A
R5
43 kΩR6
330 kΩ
R8
100 kΩ
R7
22 kΩR4
51 kΩ
R11
100 kΩ
R1
7.5 kΩ
ON/OFF CTL
(L : OFF, H : ON)
C9
0.1 µF
C8
0.22 µF
C4
4.7 µF
C3
4.7 µF
C2
4.7 µF
C1
0.1 µF
L1
6.8 µH
C5
4.7 µFC6
4.7 µFC7
0.1 µF
D1
VO
(9.0 V)
Q2
Q1
1
8
2
−INE
FB
CSCP
VIN
(1.8 V to
6.0 V)
7RT
Q3
6
5
GND
OUT
4
3SCPOD
VCC
VREF
VREF
Error Amp
SCP
Comp.
PWM
Comp. Drive
Nch
IO = 400 mA
at VCC = 3.3 V
(0.5 V ± 1%)
±10%
(1.0 V)
UVLO
OSC
SQ
R
(0.9 V)
(0.7 V)
(0.3 V)
bias
RT Current
VREF Power
ON/OFF
CTL
VREF
(1.27 V)
L : UVLO release
MB39A105
18
■
■■
■PART S LIST
Note : SANYO : SANYO Electric Co., Ltd.
SUMIDA : SUMIDA Electric Co., Ltd.
TDK : TDK Corporation
NEC/TOKIN : NEC TOKIN Corporation
ssm : SUSUMU Co., Ltd.
COMPONENT ITEM SPECIFICATION VENDOR PARTS No.
Q1 Pch FET VDS = 20 V, ID = −2 A (Max) SANYO MCH3306
Q2, Q3 Nch FET VDS = 20 V, Qg = 4.5 nC (Typ) SANYO MCH3405
D1 Diode VF = 0.40 V (Max) , at IF = 1 A SANYO SBS004
L1 Inductor 6.8 µH 1.4 A, 144 mΩSUMIDA CMD5D13-6R8
C1, C7, C9
C2 to C6
C8
Ceramics Condenser
NeoCapacitor
Ceramics Condenser
0.1 µF
4.7 µF
0.22 µF
50 V
10 V
10 V
TDK
NEC/TOKIN
TDK
C1608JB1H104K
TEPSLA21A475M8R
C1608JB1A224K
R1
R4
R5
R6
R7
R8, R11
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
7.5 kΩ
51 kΩ
43 kΩ
330 kΩ
22 kΩ
100 kΩ
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
ssm
ssm
ssm
ssm
ssm
ssm
RR0816P-752-D
RR0816P-513-D
RR0816P-433-D
RR0816P-334-D
RR0816P-223-D
RR0816P-104-D
MB39A105
19
■
■■
■SELECTION OF COMPONENTS
• Nch MOS FET
The N-ch MOSFET for switching use should be rated for at least 20% more than the maximum output voltage.
To minimize continuity loss, use a FET with low RDS(ON) between the drain and source. For high output voltage
and high frequency operation, on/off-cycle switching loss will be higher so that power dissipation must be
considered. In this application, the SANYO MCH3405 is used. Continuity loss, on/off switching loss, and total
loss are determined by the following formulas. The selection must ensure that peak drain current does not exceed
rated values.
Continuity loss : PC
On-cycle switching loss : PS (ON)
Off-cycle switching loss : PS (OFF)
Total loss : PT
PT = PC + PS (ON) + PS (OFF)
Example: Using the SANYO MCH3405
Input voltage VIN (Max) = 2.4 V, output voltage VO = 9 V, drain current ID = 0.94 A, Oscillation frequency
fOSC = 500 kHz, L = 6.8 µH, drain-source on resistance RDS (ON) := 160 mΩ, tr = 18 ns, tf = 8 ns.
Drain current (Max) : ID (Max)
Drain current (Min) : ID (Min)
PC = ID 2 × RDS(ON) × Duty
PS (ON) = VD (Max) × ID × tr × fOSC
6
PS (OFF) = VD (Max) × ID (Max) × tf × fOSC
6
ID (Max) =VO × IO + VIN(Min) ton ton =VO − VIN(Min) t
VIN(Min) 2L VO
=9 × 0.25 + 2.4× (9−2.4) × 1
2.4 2 × 6.8 × 10−6 × 9500 × 103
:= 1.20 (A)
ID (Min) =VO × IO − VIN(Min) ton
VIN(Min) 2L
=9 × 0.25 − 2.4× (9−2.4) × 1
2.4 2 × 6.8 × 10−6 × 9 500 × 103
:= 0.68 (A)
MB39A105
20
The above power dissipation figures for the MCH3405 is satisfied with ample margin at 0.8 W.
• Inductors
In selecting inductors, it is of course essential not to apply more current than the r ated capacity of the inductor,
but also to note that the lower limit for r ipple current is a critical point that if reached will cause discontinuous
operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value,
which will enable contin uous oper ation under light loads . Note that if the inductance value is too high, how ever,
direct current resistance (DCR) is increased and this will also reduce efficiency. The inductance must be set at
the point where efficiency is greatest.
Note also that the DC superimposition characteristics become worse as the load current value approaches the
rated current v alue of the inductor , so that the inductance v alue is reduced and ripple current increases, causing
loss of efficiency. The selection of rated current value and inductance value will var y depending on where the
point of peak efficiency lies with respect to load current.
Inductance values are determined by the following formulas.
Inductance value : L
PC = ID 2 × RDS (ON) × Duty
= 0.94
2 × 0.16 × 9−2.4
9
:= 0.104 W
PS (ON) = VD (Max) × ID × tr × fOSC
6
= 9 × 0.94 × 18 × 10−9 × 500 × 103
6
:= 0.013 W
PS (OFF) = VD (Max) × ID (Max) × tf × fOSC
6
= 9 × 1.20 × 8 × 10−9 × 500 × 103
6
:= 0.007 W
PT = PC + PS (ON) + PS (OFF)
:= 0.104 + 0.013 + 0.007
:= 0.124 W
L ≥ VIN2ton
2IOVO
MB39A105
21
Example:
Inductance values derived from the above formulas are values that provide sufficient margin for continuous
operation at maximum load current, but at which continuous operation is not possible at light loads. It is therefore
necessary to determine the load level at which continuous operation becomes possible. In this application, the
Sumida CMD5D13-6R8 is used. At 6.8 µH, the load current value under continuous operating conditions is
determined by the following formula.
Load current value under continuous operating conditions : IO
To deter mine whether the current through the inductor is within rated values, it is necessar y to determine the
peak value of the r ipple current as well as the peak-to-peak values of the ripple current that affect the output
ripple voltage . The peak value and peak-to-peak value of the ripple current can be determined by the following
formulas.
Peak value : IL
Peak-to-peak value : ∆IL
Example: Using the CMD5D13-6R8
6.8 µH (allowa ble tolerance ±20%) , rated current = 1.4 A
Peak value:
L ≥ VIN (Max) 2ton
2IOVO
≥ 42 × 9−4 × 1
2 × 0.25 × 9 9 500 × 103
≥ 3.95 µH
IO ≥ VIN (Max) 2ton
2LVO
≥ 42 × 9−4 × 1
2 × 6.8 × 10−6 × 9 9 500 × 103
≥ 145.2 mA
IL ≥ VO × IO+VIN ton ton =VO − VIN t
VIN 2L VO
∆IL = VIN ton
L
IL ≥ VO × IO+VIN ton ton =VO − VIN t
VIN 2L VO
≥ 9 × 0.25 + 2.4 × (9 − 2.4) × 1
2.4 2 × 6.8 × 10−6 × 9 500 × 103
≥ 1.20 A
MB39A105
22
Peak-to-peak value:
• Flyback diode
The flyback diode is generally used as a Shottky barrier diode (SBD) when the reverse voltage to the diode is
less than 40V. The SBD has the characteristics of higher speed in ter ms of faster reverse recover y time, and
low er f orw ard v oltage, and is ideal for achieving high efficiency. As long as the DC rev erse v o ltage is sufficiently
higher than the output voltage, the average current flowing through the diode is within the mean output current
level, and peak current is within peak surge current limits, there is no problem. In this application the SANYO
SBS004 is used. The diode mean current and diode peak current can be calculated by the following formulas.
Diode mean current : IDi
Diode peak current : IDip
Example: Using the SANYO SBS004
VR (DC reverse voltage) = 15 V, mean output current = 1.0 A, peak surge current = 10 A,
VF (forward voltage) = 0.40 V, IF = 1.0 A
∆IL = VIN (Min) ton
L
= 4 × (9 − 4)
× 1
6.8 × 10−6 × 9 500 × 103
:= 0.654 A
IDi ≥ IO × (1 − VO−VIN (Min) )
VO
IDip ≥ VO × IO+VIN (Min) ton
VIN (Min) 2L
IDi ≥ IO × (1 − VO−VIN (Min) )
VO
≥ 0.25 × (1 − 0.733)
≥ 66.8 mA
IDip ≥ VO × IO+VIN (Min) ton
VIN (Min) 2L
≥ 1.20 A
MB39A105
23
• Smoothing Capacitor
The smoothing capacitor is an indispensable element f or reducing ripple voltage in output. In selecting a smooth-
ing capacitor it is essential to consider equivalent series resistance (ESR) and allowable r ipple current. Higher
ESR means higher ripple voltage, so that to reduce ripple voltage it is necessary to select a capacitor with low
ESR. How ev er, the use of a capacitor with low ESR can ha ve substantial eff ects on loop phase char acteristics,
and therefore requires attention to system stability. Care should also be taken to use a capacity with sufficient
margin for allowable ripple current. This application uses the TEPSLA21A475M8R (NEC/TOKIN) . The ESR,
capacitance value, and ripple current can be calculated from the following formulas.
Equivalent Series Resistance : ESR
Capacitance value : CL
Ripple current : ∆ICL
Example: Using the TEPSLA21A475M8R (Three piecies are parallel.)
Rated voltage = 10 V, ESR = 500 mΩ, maximum allowable ripple current = 1 Ap−p
Equivalent series resistance
Capacitance value : CL
Ripple current : ∆ICL
ESR ≤ ∆VO − 1
∆IL2πfCL
CL ≥ ∆IL
2πf (∆VO − ∆IL × ESR)
∆ICL ≥ VIN ton
L
ESR ≤ ∆VO − 1
∆IL2πfCL
≤ 0.18 − 1
0.654 2π × 500 × 103 × 14.1 × 10−6
≤ 252.7 mΩ
CL ≥ ∆IL
2πf (∆VO − ∆IL × ESR)
≥ 0.39
2π × 500 × 103 × (0.18 − 0.654 × 0.167)
≥ 2.94 µF
∆ICL ≥ VIN ton
L
≥ 4 × (9 − 4) × 1
6.8 × 10−6 × 9 500 × 103
≥ 0.654 Ap−p
MB39A105
24
■
■■
■REFERENCE DATA
Vin = 1.8 V
Vin = 3.3 V
Vin = 6.0 V
100
90
80
70
60
50
40
301 m 10 m 100 m 1
Conversion efficiency η (%)
Load current IL (A)
Conversion Efficiency vs. Load current
VG (V)
10
5
0
15
10
5
0
VD (V)
t (µs)
Ta = +25 °C
VIN = 3.3 V
VO = 9 V
IO = 100 mA
012345678910
Switching Wave Form
Ta = +25 °C
9 V output
MB39A105
25
■
■■
■USAGE PRECAUTION
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers f or semiconductor materials should ha ve anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
The use of negative voltages below –0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■
■■
■ORDERING INFORMATION
Part number Package Remarks
MB39A105PFT 8-pin plastic TSSOP
(FPT-8P-M05)
MB39A105
26
■
■■
■PACKAGE DIMENSION
8-pin plastic TSSOP
(FPT-8P-M05)
Dimensions in mm (inches)
2002 FUJITSU LIMITED F08013Sc-1-1
3.00±0.10(.118±.004)
4.40±0.10 6.40±0.20
(.252±.008)(.173±.004)
1.10(.043)MAX
0.65(.026)
0.10(.004)
0~8˚
0.22±0.10
(.009±.004)
0.127±0.03
(.0050±.001)
0.54(.021) 0.10±0.10
(.004±.004)
Details of "A" part
1.95(.077)
C
INDEX
14
5
8
"A"
MB39A105
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
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and manufactured as contemplated (1) for use accompanying fatal
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satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
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must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
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Foreign Exchange and Foreign Trade Law of Japan, the prior
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of those products from Japan.
F0209
FUJITSU LIMITED Printed in Japan