Low Profile Six Degree of Freedom Inertial Sensor ADIS16334 FEATURES GENERAL DESCRIPTION Triaxis digital gyroscope with digital range scaling 75/sec, 150/sec, 300/sec settings Tight orthogonal alignment: <0.05 Triaxis digital accelerometer: 5 g Wide sensor bandwidth: 330 Hz Autonomous operation and data collection No external configuration commands required Start-up time: 180 ms Factory-calibrated sensitivity, bias, and axial alignment Calibration temperature range: -20C to +70C SPI-compatible serial interface Embedded temperature sensor Programmable operation and control Automatic and manual bias correction controls Bartlett window FIR filter length, number of taps Digital I/O: data ready, alarm indicator, general-purpose Alarms for condition monitoring Enable external sample clock input: up to 1.2 kHz Single-command self-test Single-supply operation: 4.75 V to 5.25 V 2000 g shock survivability 22 mm x 33 mm x 11 mm module with connector interface Operating temperature range: -40C to +105C The ADIS16334 iSensor(R) is a complete inertial system that includes a triaxis gyroscope and triaxis accelerometer. Each sensor in the ADIS16334 combines industry-leading iMEMS(R) technology with signal conditioning that optimizes dynamic performance. The factory calibration characterizes each sensor for sensitivity, bias, alignment, and linear acceleration (gyro bias). As a result, each sensor has its own dynamic compensation formulas that provide accurate sensor measurements over a temperature range of -20C to +70C. The ADIS16334 provides a simple, cost-effective method for integrating accurate, multiaxis, inertial sensing into industrial systems, especially when compared with the complexity and investment associated with discrete designs. All necessary motion testing and calibration are part of the production process at the factory, greatly reducing system integration time. Tight orthogonal alignment simplifies inertial frame alignment in navigation systems. An improved SPI interface and register structure provide faster data collection and configuration control. This compact module is approximately 22 mm x 33 mm x 11 mm and provides a compact connector interface. APPLICATIONS Medical instrumentation Robotics Platform controls Navigation FUNCTIONAL BLOCK DIAGRAM DIOx SELF-TEST TRIAXIAL ACCEL TRIAXIAL GYRO RST I/O VCC ALARMS POWER MANAGEMENT CONTROLLER GND CONTROL REGISTERS CS SPI PORT DIGITAL FILTER CALIBRATION CORRECTION OUTPUT REGISTERS SCLK DIN DOUT ADIS16334 09362-001 TEMP Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2011 Analog Devices, Inc. All rights reserved. ADIS16334 TABLE OF CONTENTS Features .............................................................................................. 1 Digital Processing Configuration................................................. 14 Applications....................................................................................... 1 Sample Rate................................................................................. 14 General Description ......................................................................... 1 Input Clock Configuration ....................................................... 14 Functional Block Diagram .............................................................. 1 Digital Filtering........................................................................... 14 Revision History ............................................................................... 2 Dynamic Range .......................................................................... 14 Specifications..................................................................................... 3 Optimizing Accuracy..................................................................... 15 Timing Specifications .................................................................. 5 Automatic Bias Correction ....................................................... 15 Timing Diagrams.......................................................................... 5 Manual Bias Correction ............................................................ 15 Absolute Maximum Ratings............................................................ 6 Restoring Factory Calibration .................................................. 15 ESD Caution.................................................................................. 6 Point-of-Percussion/Linear-g Compensation ............................ 15 Pin Configuration and Function Descriptions............................. 7 System Tools.................................................................................... 16 Typical Performance Characteristics ............................................. 8 Global Commands ..................................................................... 16 Theory of Operation ........................................................................ 9 Device Identification.................................................................. 17 Gyroscopes .................................................................................... 9 Flash Memory Management ..................................................... 17 Accelerometers.............................................................................. 9 Alarms.............................................................................................. 18 Data Sampling and Processing ................................................... 9 Static Alarm Use ......................................................................... 18 Calibration..................................................................................... 9 Dynamic Alarm Use .................................................................. 18 User Interface ................................................................................ 9 Alarm Reporting ........................................................................ 18 Basic Operation............................................................................... 10 Applications Information .............................................................. 19 Reading Sensor Data.................................................................. 10 ADIS16334/PCBZ ...................................................................... 19 Memory Map .............................................................................. 11 Outline Dimensions ....................................................................... 20 Output Data Registers................................................................ 12 Ordering Guide .......................................................................... 20 Device Configuration ................................................................ 13 REVISION HISTORY 6/11--Rev. 0 to Rev. A Changes to In-Run Bias Stability Parameter, Table 1................... 3 Changes to Figure 23...................................................................... 19 1/11--Revision 0: Initial Version Rev. A | Page 2 of 20 ADIS16334 SPECIFICATIONS TA = 25C, VCC = 5.0 V, angular rate = 0/sec, dynamic range = 300/sec 1 g, unless otherwise noted. Table 1. Parameter GYROSCOPES Dynamic Range Initial Sensitivity Sensitivity Temperature Coefficient Nonlinearity Misalignment Initial Bias Error In-Run Bias Stability Angular Random Walk Bias Temperature Coefficient Linear Acceleration Effect on Bias Bias Voltage Sensitivity Output Noise Rate Noise Density 3 dB Bandwidth Sensor Resonant Frequency ACCELEROMETERS Dynamic Range Initial Sensitivity Sensitivity Temperature Coefficient Misalignment Nonlinearity Initial Bias Error In-Run Bias Stability Velocity Random Walk Bias Temperature Coefficient Bias Voltage Sensitivity Output Noise Noise Density 3 dB Bandwidth Sensor Resonant Frequency TEMPERATURE SENSOR Scale Factor Test Conditions/Comments Min Typ 300 0.0495 350 0.05 0.025 0.0125 40 0.1 0.05 0.5 3 0.0072 2 0.005 0.05 0.3 0.75 0.044 330 14.5 5 0.99 -20C TA +70C Axis-to-axis Axis-to-frame (package) Best-fit straight line 1 1 1 -20C TA +70C VCC = 4.75 V to 5.25 V No filtering No filtering 5.25 1.00 40 0.1 0.5 0.1 12 100 0.11 0.06 5 4 221 330 5.5 Output = 0x0000 at 25C (5C) 0.0678 Dynamic range = 300/sec Dynamic range = 150/sec Dynamic range = 75/sec -20C TA +70C Best-fit straight line Axis to axis Axis-to-frame (package) 1 1 , SMPL_PRD = 0x0001 1 , SMPL_PRD = 0x0001 -20C TA +70C Any axis, 1 (MSC_CTRL[7] = 1) VCC = 4.75 V to 5.25 V 300/sec range, no filtering f = 25 Hz, 300/sec range, no filtering Max 0.0505 Unit /sec /sec/LSB /sec/LSB /sec/LSB ppm/C % of FS Degrees Degrees /sec /sec /hr /sec/C /sec/g /sec/V /sec rms /sec/Hz rms Hz kHz Each axis Rev. A | Page 3 of 20 1.01 g mg/LSB ppm/C Degrees Degrees % of FS mg g m/sec/hr mg/C mg/V mg rms g/Hz rms Hz kHz C/LSB ADIS16334 Parameter LOGIC INPUTS 1 Input High Voltage, VIH Input Low Voltage, VIL Test Conditions/Comments Min Typ 2.0 0.8 0.55 CS signal to wake up from sleep mode CS Wake-Up Pulse Width Logic 1 Input Current, IIH Logic 0 Input Current, IIL All Pins Except RST RST Pin Input Capacitance, CIN DIGITAL OUTPUTS1 Output High Voltage, VOH Output Low Voltage, VOL FLASH MEMORY Data Retention 3 FUNCTIONAL TIMES 4 Power-On Start-Up Time Reset Recovery Time Flash Memory Test Time Self-Test Time CONVERSION RATE Internal Sample Rate Tolerance Sync Input Clock 5 POWER SUPPLY Supply Voltage Power Supply Current Max 20 VIH = 3.3 V VIL = 0 V ISOURCE = 1.6 mA ISINK = 1.6 mA Endurance 2 TJ = 85C Time until data is available Normal mode Normal mode Normal mode SMPL_PRD = 0x0001 40 1 10 60 0.4 10,000 20 180 60 20 14 3 1.2 0.8 5.0 47 V V V s A A mA pF V V Cycles Years ms ms ms ms 819.2 4.75 1 10 2.4 SMPL_PRD = 0x0001 SMPL_PRD = 0x0000 0.2 Unit 5.25 SPS % kHz V mA The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant. Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at -40C, +25C, +85C, and +125C. 3 The data retention lifetime equivalent is at a junction temperature (TJ) of 85C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with junction temperature. 4 These times do not include thermal settling and internal filter response times (330 Hz bandwidth), which may affect overall accuracy. 5 The sync input clock functions below the specified minimum value, at reduced performance levels. 2 Rev. A | Page 4 of 20 ADIS16334 TIMING SPECIFICATIONS TA = 25C, VCC = 5.0 V, unless otherwise noted. Table 2. Normal Read Min Typ Max 0.01 2.0 9 40 48.8 2 Parameter fSCLK tSTALL tREADRATE tCS Description Serial clock Stall period between data Read rate Chip select to SCLK edge tDAV tDSU tDHD tSCLKR, tSCLKF tDR, tDF tSFS t1 tx t2 t3 DOUT valid after SCLK edge DIN setup time before SCLK rising edge DIN hold time after SCLK rising edge SCLK rise/fall times DOUT rise/fall times CS high after SCLK edge Input sync positive pulse width Input sync low time Input sync to data ready output Input sync period 1 2 2 Min 0.01 1/fSCLK Burst Read 1 Typ Max 1.0 Unit MHz s s ns 48.8 100 100 24.4 48.8 ns ns ns ns ns ns s s s s 24.4 48.8 5 5 12.5 12.5 5 5 5 5 100 12.5 12.5 5 5 100 600 600 833 833 tREADRATE does not apply to burst read. Guaranteed by design and characterization, but not tested in production. TIMING DIAGRAMS CS tCS tSFS 1 2 3 4 5 6 15 16 SCLK tDAV MSB DB14 DB13 tDSU DIN R/W A6 DB12 DB11 A4 A3 DB10 DB2 DB1 LSB tDHD A5 D2 A2 D1 09362-002 DOUT LSB Figure 2. SPI Timing and Sequence tREADRATE tSTALL 09362-003 CS SCLK Figure 3. Stall Time and Data Rate t3 t2 t1 tX 09362-004 SYNC CLOCK (DIO4) DATA READY Figure 4. Input Clock Timing Diagram Rev. A | Page 5 of 20 ADIS16334 ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Parameter Acceleration Any Axis, Unpowered Any Axis, Powered VCC to GND Digital Input Voltage to GND Digital Output Voltage to GND Analog Input to GND Operating Temperature Range Storage Temperature Range 1 Rating 2000 g 2000 g -0.3 V to +6.0 V -0.3 V to +5.3 V -0.3 V to VCC + 0.3 V -0.3 V to +3.6 V -40C to +105C -65C to +125C1, 2 Table 4. Package Characteristics Extended exposure to temperatures outside the specified temperature range of -40C to +105C can adversely affect the accuracy of the factory calibration. For best accuracy, store the parts within the specified operating range of -40C to +105C. 2 Although the device is capable of withstanding short-term exposure to 150C, long-term exposure threatens internal mechanical integrity. Package Type 20-Lead Module (ML-20-1) ESD CAUTION Rev. A | Page 6 of 20 JA 36.5C JC 16.9C Device Weight 12.5 grams ADIS16334 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADIS16334 DNC GND GND VCC DIO2 DIO1 DIN SCLK DIO3 17 15 13 11 9 7 5 3 1 20 18 16 14 12 10 8 6 4 2 DNC DNC GND VCC VCC RST CS DOUT DIO4/CLKIN NOTES 1. THIS REPRESENTATION DISPLAYS THE TOP VIEW WHEN THE CONNECTOR IS VISIBLE AND FACING UP. 2. MATING CONNECTOR: SAMTEC CLM-110-02 OR EQUIVALENT. 3. DNC = DO NOT CONNECT. 09362-005 DNC 19 DNC TOP VIEW (Not to Scale) Figure 5. Pin Configuration Z-AXIS aZ gZ X-AXIS Y-AXIS aX aY gX gY PIN 20 NOTES 1. ACCELERATION (aX, aY, aZ) AND ROTATIONAL (gX, gY, gZ) ARROWS INDICATE THE DIRECTION OF MOTION THAT PRODUCES A POSITIVE OUTPUT. 09362-006 PIN 2 Figure 6. Axial Orientation Table 5. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7, 9 8 10, 11, 12 13, 14, 15 16, 17, 18, 19, 20 1 Mnemonic DIO3 DIO4/CLKIN SCLK DOUT DIN CS DIO1, DIO2 RST VCC GND DNC Type 1 I/O I/O I O I I I/O I S S N/A Description Configurable Digital Input/Output. Configurable Digital Input/Output or Sync Clock Input. SPI Serial Clock. SPI Data Output. Clocks output on SCLK falling edge. SPI Data Input. Clocks input on SCLK rising edge. SPI Chip Select. Configurable Digital Input/Output. Reset. Power Supply. Power Ground. Do Not Connect. I/O is input/output, I is input, O is output, S is supply, and N/A is not applicable. Rev. A | Page 7 of 20 ADIS16334 TYPICAL PERFORMANCE CHARACTERISTICS ROOT ALLAN VARIANCE (mg) 10 0.1 + 0.01 1 + 0.1 - 1 10 TAU (sec) 100 1000 2000 - Figure 7. Gyroscope Allan Variance 0.01 0.1 1 10 TAU (sec) 100 Figure 8. Accelerometer Allan Variance Rev. A | Page 8 of 20 1000 2000 09362-024 0.001 0.1 09362-023 ROOT ALLAN VARIANCE (/sec) 1 ADIS16334 THEORY OF OPERATION The ADIS16334 is a six degree of freedom (6DOF) inertial sensing system. This sensing system collects data autonomously and makes it available to any processor system that supports a 4-wire serial peripheral interface (SPI). DATA SAMPLING AND PROCESSING GYROSCOPES CALIBRATION Angular rate sensing in the ADIS16334 begins with a MEMS gyroscope that operates on the principle of a resonator gyro. Two polysilicon sensing structures each contain a dither frame that is electrostatically driven to resonance, producing the necessary velocity element to produce a Coriolis force during angular rate. At two of the outer extremes of each frame, orthogonal to the dither motion, are movable fingers that are placed between fixed pickoff fingers to form a capacitive pickoff structure that senses Coriolis motion. The resulting signal is fed to a series of gain and demodulation stages that produce the electrical rate signal output. The dual-sensor design rejects external g-forces and vibration. The digital processing stage includes a correction function for each accelerometer and gyroscope sensor. Each sensor within each unit has unique correction formulas, which optimize their bias and sensitivity accuracy over temperature and supply. The full, 6DOF characterization also enables an internal frame alignment, which minimizes cross-axis sensitivity and simplifies frame alignment after system installation. The analog signals from each inertial sensor feed into a mixed signal processing circuit, which includes buffering, analog filtering, digital sampling, digital filtering, and calibration. USER INTERFACE SPI Interface MEMS SENSOR ADC FILTERING AND CALIBRATION CONTROLLER OUTPUT REGISTERS CONTROL REGISTERS DIGITAL I/O Figure 9. Simplified Sensor Signal Processing Diagram Rev. A | Page 9 of 20 SPI SIGNALS Acceleration sensing in the ADIS16334 starts with a MEMS accelerometer core on each axis, which provides a linear motion-toelectrical transducer function. Tiny polysilicon springs to tether a movable structure to a fixed frame inside the sensor core. The springs and mass of the movable structure provide a dependable relationship between acceleration and physical displacement between them. The moving structure and fixed frame have electrical plates in a balanced, differential capacitor network. When experiencing dynamic or static acceleration, it causes a physical deflection, which causes an imbalance in the capacitive network. A modulation/de-modulation circuit translates the capacitor imbalance into a representative electrical signal. 09362-007 ACCELEROMETERS SPI PORT The user registers manage user access to both sensor data and configuration inputs. Each 16-bit register has its own unique bit assignment and two addresses: one for its upper byte and one for its lower byte. Table 8 provides a memory map for each register, along with its function and lower byte address. Each data collection and configuration command both use the SPI, which consists of four wires. The chip select (CS) signal activates the SPI interface and the serial clock (SCLK) synchronizes the serial data lines. Input commands clock into the DIN pin, one bit at a time, on the SCLK rising edge. Output data clocks out of the DOUT pin on the SCLK falling edge. As a SPI slave device, the DOUT contents reflect the information requested using a DIN command. ADIS16334 BASIC OPERATION The ADIS16334 is an autonomous system that requires no user initialization. When it has a valid power supply, it initializes itself and starts sampling, processing, and loading sensor data into the output registers at a sample rate of 819.2 SPS. DIO1 pulses high after each sample cycle concludes. The SPI interface enables simple integration with many embedded processor platforms, as shown in Figure 10 (electrical connection) and Table 6 (pin descriptions). 10 SYSTEM PROCESSOR SPI MASTER 11 12 ADIS16334 SS 6 CS SCLK 3 SCLK MOSI 5 DIN MISO 4 DOUT IRQ 7 DIO1 DIN 14 DOUT XGYRO_OUT YGYRO_OUT ZGYRO_OUT SCLK Function Slave select Serial clock Master output, slave input Master input, slave output Interrupt request DIN DIN = 0000 0100 0000 0000 = 0x0400 DOUT DOUT = 1111 1001 1101 1010 = 0xF9DA = -1574 LSBs => -78.70/sec Figure 12. Example SPI Read, Second 16-Bit Sequence Burst Read Function The ADIS16334 SPI interface supports full-duplex serial communication (simultaneous transmit and receive) and uses the bit sequence shown in Figure 14. Table 7 provides a list of the most common settings that require attention to initialize a processor's serial port for the ADIS16334 SPI interface. The burst read function enables the user to read all output registers using one command on the DIN line and shortens the stall time between each 16-bit segment to one SCLK cycle (see Table 2). Figure 13 provides the burst read sequence of data on each SPI signal. The sequence starts with writing 0x3E00 to DIN, followed by each output register clocking out on DOUT, in the order in which they appear in Table 8. Table 7. Generic Master Processor SPI Settings Description The ADIS16334 operates as a slave. Maximum serial clock rate. CPOL = 1 (polarity), CPHA = 1 (phase). Bit sequence. Shift register/data length. CS 1 2 3 8 SCLK DIN 0x3E00 DON'T CARE DOUT XGYRO_OUT For burst read, SCLK rate 1 MHz. YGYRO_OUT TEMP_OUT Figure 13. Burst Read Sequence CS SCLK DIN DOUT R/W D15 A6 A5 A4 A3 A2 A1 A0 D14 D13 D12 D11 D10 D9 D8 DC7 DC6 D7 D6 DC5 D5 DC4 DC3 D4 D3 DC2 DC1 DC0 D2 D1 D0 NOTES 1. THE DOUT BIT PATTERN REFLECTS THE ENTIRE CONTENTS OF THE REGISTER IDENTIFIED BY [A6:A0] IN THE PREVIOUS 16-BIT DIN SEQUENCE WHEN R/W = 0. 2. IF R/W = 1 DURING THE PREVIOUS SEQUENCE, DOUT IS NOT DEFINED. Figure 14. SPI Communication Bit Sequence Rev. A | Page 10 of 20 R/W D15 A6 A5 D14 D13 09362-012 1 0x0800 CS Table 6. Generic Master Processor Pin Names and Functions Processor Setting Master SCLK Rate 2 MHz1 SPI Mode 3 MSB First Mode 16-Bit Mode 0x0600 Figure 11. SPI Read Example Figure 10. Electrical Connection Diagram Pin Name SS SCLK MOSI MISO IRQ 0x0400 15 09362-008 13 09362-009 5V 09362-010 I/O LINES ARE COMPATIBLE WITH 3.3V OR 5V LOGIC LEVELS The ADIS16334 provides two different options for acquiring sensor data: single register and burst register. A single register read requires two 16-bit SPI cycles. The first cycle requests the contents of a register using the bit assignments in Figure 14. Bit DC7 to Bit DC0 are don't cares for a read, and then the output register contents follow on DOUT during the second sequence. Figure 11 includes three single register reads in succession. In this example, the process starts with DIN = 0x0400 to request the contents of XGYRO_OUT, then follows with 0x0600 to request YGYRO_OUT and 0x0800 to request ZGYRO_OUT. Full-duplex operation enables processors to use the same 16-bit SPI cycle to read data from DOUT while requesting the next set of data on DIN. Figure 12 provides an example of the four SPI signals when reading XGYRO_OUT in a repeating pattern. 09362-011 VDD READING SENSOR DATA ADIS16334 MEMORY MAP Table 8. User Register Memory Map Name FLASH_CNT Reserved XGYRO_OUT YGYRO_OUT ZGYRO_OUT XACCL_OUT YACCL_OUT ZACCL_OUT TEMP_OUT Reserved Reserved Reserved Reserved XGYRO_OFF YGYRO_OFF ZGYRO_OFF XACCL_OFF YACCL_OFF ZACCL_OFF ALM_MAG1 ALM_MAG2 ALM_SMPL1 ALM_SMPL2 ALM_CTRL Reserved GPIO_CTRL MSC_CTRL SMPL_PRD SENS_AVG Reserved DIAG_STAT GLOB_CMD Reserved LOT_ID1 LOT_ID2 PROD_ID SERIAL_NUM 1 2 User Access 1 Read only N/A Read only Read only Read only Read only Read only Read only Read only N/A N/A N/A N/A Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write N/A Read/write Read/write Read/write Read/write N/A Read only Write only N/A Read only Read only Read only Read only Flash Backup1 Yes N/A No No No No No No No N/A N/A N/A N/A Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes N/A No Yes Yes Yes N/A No No N/A Yes Yes Yes Yes Address1, 2 0x00 0x02 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x26 0x28 0x2A 0x2C 0x2E 0x30 0x32 0x34 0x36 0x38 0x3A 0x3C 0x3E 0x40 to 0x51 0x52 0x54 0x56 0x58 Default1 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 N/A 0x0000 0x0006 0x0001 0x0402 N/A 0x0000 0x0000 N/A N/A N/A 0x3FCE N/A Register Description Flash memory write count Reserved Output, x-axis gyroscope Output, y-axis gyroscope Output, z-axis gyroscope Output, x-axis accelerometer Output, y-axis accelerometer Output, z-axis accelerometer Output, internal temperature Reserved Reserved Reserved Reserved Bias correction, x-axis gyroscope Bias correction, y-axis gyroscope Bias correction, z-axis gyroscope Bias correction, x-axis accelerometer Bias correction, y-axis accelerometer Bias correction, z-axis accelerometer Alarm 1, trigger polarity, threshold Alarm 2, trigger polarity, threshold Alarm 1, sample size Alarm 2, sample size Alarm, control Reserved System, DIOx configuration and control System, data ready, self-test, calibration Sample rate, decimation control Dynamic range, digital filter control Reserved System, status/error flags System, global commands Reserved System, Lot Identification Code 1 System, Lot Identification Code 2 System, product identification System, serial number Bit Function1 Table 30 N/A Table 10 Table 10 Table 10 Table 12 Table 12 Table 12 Table 14 N/A N/A N/A N/A Table 20 Table 20 Table 20 Table 21 Table 21 Table 21 Table 32 Table 33 Table 34 Table 34 Table 35 N/A Table 24 Table 25 Table 17 Table 18 N/A Table 26 Table 23 N/A Table 27 Table 27 Table 28 Table 29 N/A is not applicable. Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte plus 1. Rev. A | Page 11 of 20 ADIS16334 OUTPUT DATA REGISTERS Table 11. Gyroscope Data Format Examples Table 9 provides a summary of the output registers. The most significant bit in each output register provides a new data indicator function. Every time a new data sample loads into the output data registers, the ND bit is a 1, until a read operation accesses the data sample. Then, this bit sets to 0, until the next data sample loads in. The second most significant bit provides an error/alarm indicator. This bit is equal to 1 if any error flag in the DIAG_STAT register is equal to 1 (active). Rate1 +300/sec +0.1/sec +0.05/sec 0/sec -0.05/sec -0.1/sec -300/sec 1 Table 9. Output Data Register Summary 1 Address1 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10 Binary XX01 0111 0111 0000 XX00 0000 0000 0010 XX00 0000 0000 0001 XX00 0000 0000 0000 XX11 1111 1111 1111 XX11 1111 1111 1110 XX10 1000 1001 0000 Accelerometers Function Gyroscope output, x-axis Gyroscope output, y-axis Gyroscope output, z-axis Accelerometer output, x-axis Accelerometer output, y-axis Accelerometer output, z-axis Gyroscope temperature, x-axis The output registers for the accelerometers are XACCL_OUT, YACCL_OUT, and ZACCL_OUT. Table 12 provides the bit assignments for these registers, along with the digital formatting for converting the digital codes into angular rate values. Table 13 provides several examples for converting the 14-bit, twos complement data into acceleration measurements, and Figure 15 provides the physical/directional reference for these sensors. Table 12. Accelerometer Register Bit Assignments Lower byte address shown. Gyroscopes Bit(s) [15] [14] [13:0] The output registers for the gyroscopes (angular rate of rotation) are XGYRO_OUT, YGYRO_OUT, and ZGRYO_OUT. Table 10 provides the bit assignments for these registers, along with the digital formatting for converting the digital codes into angular rate values. Table 11 provides several examples for converting the 14-bit, twos complement data into angular rate measurements, and Figure 15 provides the physical/directional reference for these sensors. Description New data, 1 = new data since last read access Error/alarm Linear acceleration output data. Twos complement digital format, typical sensitivity = 1 mg/LSB Table 13. Acceleration, Twos Complement Format Acceleration +5 g +2 mg +1 mg 0g -1 mg -2 mg -5 g Table 10. Gyroscope Register Bit Assignments Bit(s) [15] [14] [13:0] Hex 0x1770 0x0002 0x0001 0x0000 0x3FFF 0x3FFE 0x2890 The numbers in the rate column reflect the default range setting, 300/sec. Description New data, 1 = new data since last read access Error/alarm Angular rate output data. Twos complement digital format, typical sensitivity = 0.05/sec per LSB Decimal +5000 LSB +2 LSB +1 LSB 0 LSB -1 LSB -2 LSB -5000 LSB Z-AXIS aZ gZ X-AXIS Y-AXIS aX aY gX gY PIN 20 PIN 2 NOTES 1. ACCELERATION (aX, aY, aZ) AND ROTATIONAL (gX, gY, gZ) ARROWS INDICATE THE DIRECTION OF MOTION THAT PRODUCES A POSITIVE OUTPUT. Figure 15. Sensor Axes and Orientation Reference Diagram Rev. A | Page 12 of 20 09362-013 Register XGYRO_OUT YGYRO_OUT ZGYRO_OUT XACCL_OUT YACCL_OUT ZACCL_OUT TEMP_OUT Decimal +6000 LSB +2 LSB +1 LSB 0 LSB -1 LSB -2 LSB -6000 LSB Hex 0x1388 0x0002 0x0001 0x0000 0x3FFF 0x3FFE 0x2C78 Binary XX01 0011 1000 1000 XX00 0000 0000 0010 XX00 0000 0000 0001 XX00 0000 0000 0000 XX11 1111 1111 1111 XX11 1111 1111 1110 XX10 1100 0111 1000 ADIS16334 Internal Temperature Measurements DEVICE CONFIGURATION The TEMP_OUT register provides relative temperature measurements for inside of the ADIS16334. This measurement can be above ambient temperature and does not reflect external conditions. Table 14 provides the bit assignments for this register, along with the digital data format. Table 15 provides several examples for converting the 12-bit, offset binary data into temperature measurements. The control registers in Table 8 provide users with a variety of configuration options. The SPI provides access to these registers, one byte at a time, using the bit assignments in Figure 14. Each register has 16 bits, where Bits[7:0] represent the lower address, and Bits[15:8] represent the upper address. Figure 16 provides an example of writing 0x03 to Address 0x37 (SMPL_PRD[15:8]), using DIN = 0xB703. This example reduces the sample rate by a factor of eight (see Table 17). Table 14. Temperature Register Bit Assignments CS Description New data, 1 = new data since last read access Error/alarm Not used Temperature output data, offset binary format, typical sensitivity = 0.06785/LSB, 25C = 0x0000 SCLK DIN DIN = 1011 0111 0000 0011 = 0xB703, WRITES "0x03" TO ADDRESS "0x37." 09362-014 Bit(s) [15] [14] [13:12] [11:0] Figure 16. Example SPI Write Sequence Table 15. Temperature, Twos Complement Format Dual Memory Structure Temperature +105C +85C +25.1537C +25.06785C +25C +24.93215C +24.8643C -40C Writing configuration data to a control register updates its SRAM contents, which are volatile. After optimizing each relevant control register setting in a system, set GLOB_CMD[3] = 1 (DIN = 0xBE08) to back these settings up in nonvolatile flash memory. The flash backup process requires a valid power supply level for the entire 75 ms process time. The user register map in Table 8 provides a column that indicates the registers that have flash back-up support. A yes in the Flash Backup column indicates that a register has a mirror location in flash and, when backed up properly, it automatically restores itself during startup or after a reset. Figure 17 provides a diagram of the dual-memory structure used to manage operation and store critical user settings. Hex 0x49B 0x374 0x002 0x001 0x000 0xFFF 0xFFE 0xC42 Binary XXXX 0100 1001 1011 XXXX 0011 0111 0100 XXXX 0000 0000 0010 XXXX 0000 0000 0001 XXXX 0000 0000 0000 XXXX 1111 1111 1111 XXXX 1111 1111 1110 XXXX 1100 0100 0010 MANUAL FLASH BACKUP NONVOLATILE FLASH MEMORY VOLATILE SRAM (NO SPI ACCESS) SPI ACCESS START-UP RESET Figure 17. SRAM and Flash Memory Diagram Rev. A | Page 13 of 20 09362-015 Decimal +1179 LSB +884 LSB +2 LSB +1 LSB 0 LSB -1 LSB -2 LSB -958 LSB ADIS16334 DIGITAL PROCESSING CONFIGURATION 0 Table 16. Digital Processing Registers Description Sample rate control Digital filtering and range control -20 -40 SAMPLE RATE The internal sampling system produces new data in the output data registers at a rate of 819.2 SPS. The SMPL_PRD register in Table 17 provides two functional controls for internal sampling and register update rates: SMPL_PRD[12:8] for decimation and SMPL_PRD[0] for enabling the external clock option. The decimation filter reduces the update rate, using an averaging filter with a decimated output. These bits provide a binomial control that divides the data rate by a factor of 2 every time this number increases by 1. For example, set SMPL_PRD[12:8] = 00100 (DIN = 0xB704) to set the decimation factor to 16. This reduces the update rate to 51.2 SPS and the bandwidth to 25 Hz. -80 -100 N=2 N=4 N = 16 N = 64 -120 -140 0.001 The SENS_AVG[10:8] bits provide three dynamic range settings for this gyroscope. The lower dynamic range settings (75/sec and 150/sec) limit the minimum filter tap sizes to maintain resolution. For example, set SENS_AVG[10:8] = 010 (DIN = 0xB902) for a measurement range of 150/sec. Because this setting can influence the filter settings, program SENS_AVG[10:8] before programming SENS_AVG[2:0] if additional filtering is required. SMPL_PRD[0] provides a control for synchronizing the internal sampling to an external clock source. Set SMPL_PRD[0] = 0 (DIN = 0xB600) to enable the external clock. See Table 2 and Figure 4 for timing information. Table 18. SENS_AVG Bit Descriptions Bits [15:11] [10:8] Description (Default = 0x0402) Not used Measurement range (sensitivity) selection 100 = 300/sec (default condition) 010 = 150/sec, filter taps 4 (Bits[2:0] 0x02) 001 = 75/sec, filter taps 16 (Bits[2:0] 0x04) Not used Number of taps in each stage; value of B in NB = 2B DIGITAL FILTERING The SENS_AVG register in Table 18 provides user controls for the low-pass filter. This filter contains two cascaded averaging filters that provide a Bartlett window, FIR filter response (see Figure 19). For example, set SENS_AVG[2:0] = 100 (DIN = 0xB804) to set each stage to 16 taps. When used with the default sample rate of 819.2 SPS and zero decimation (SMPL_PRD[12:8] = 00000), this value reduces the sensor bandwidth to approximately 16 Hz. [7:3] [2:0] BARTLETT WINDOW FIR FILTER 1 NB ADC GYROSCOPES LOW-PASS, TWO-POLE (404Hz, 757Hz) ACCELEROMETERS 1 DYNAMIC RANGE INPUT CLOCK CONFIGURATION LOW-PASS FILTER 330Hz 0.1 Figure 18. Bartlett Window, FIR Filter Frequency Response (Phase Delay = N Samples) Description (Default = 0x0001) Not used Average/decimation rate setting, binomial Not used Clock: 1 = internal (819.2 SPS), 0 = external MEMS SENSOR 0.01 FREQUENCY (f/fS) Table 17. SMPL_PRD Bit Descriptions CLOCK NB x(n) n=1 1 NB NB x(n) n=1 B = SENS_AVG[2:0] NB = 2B NB = NUMBER OF TAPS (PER STAGE) AVERAGE/ DECIMATION FILTER 1 ND ND /ND x(n) n=1 D = SMPL_PRD[12:8] ND = 2D ND = NUMBER OF TAPS LOW-PASS, SINGLE-POLE (330Hz) EXTERNAL CLOCK ENABLED BY SMPL_PRD[0] = 0 Figure 19. Sampling and Frequency Response Block Diagram Rev. A | Page 14 of 20 09362-017 Bit(s) [15:13] [12:8] [7:1] [0] -60 09362-016 Address 0x36 0x38 MAGNITUDE (dB) Register Name SMPL_PRD SENS_AVG ADIS16334 OPTIMIZING ACCURACY The mechanical structure and assembly process of the ADIS16334 provide excellent position and alignment stability for each sensor, even after subjected to temperature cycles, shock, vibration, and other environmental conditions. The factory calibration includes a dynamic characterization of each sensor's behavior over temperature and generates sensor-specific correction formulas. The bias correction registers in Table 19 provide users with the ability to address bias shifts that can result from mechanical stress. Figure 20 illustrates the summing function of each sensor's offset correction register. MANUAL BIAS CORRECTION Table 19. Registers for User Calibration Table 20. XGYRO_OFF, YGYRO_OFF, and ZGYRO_OFF Bit Descriptions ADC Description Gyroscope bias, x-axis Gyroscope bias, y-axis Gyroscope bias, z-axis Accelerometer bias, x-axis Accelerometer bias, y-axis Accelerometer bias, z-axis Automatic calibration FACTORY CALIBRATION AND FILTERING Bits [15:13] [12:0] Table 21. XACCL_OFF, YACCL_OFF, and ZACCL_OFF Bit Descriptions Bits [15:12] [11:0] XGYRO_OUT Description (Default = 0x0000) Not used Data bits. Twos complement, 1mg/LSB. Typical adjustment range = 2 g. RESTORING FACTORY CALIBRATION XGYRO_OFF Figure 20. User Calibration, XGYRO_OFF Example There are two options for optimizing gyroscope bias accuracy prior to system deployment: automatic bias correction (ABC) and manual bias correction (MBC). AUTOMATIC BIAS CORRECTION The ABC function provides a simple measure-and-adjust function for the three gyroscope sensors. Set GLOB_CMD[0] = 1 (DIN = 0xBE01) to start the ABC function, which automatically performs the following steps to correct the bias on each gyroscope: 1. 2. 3. 4. 5. 6. Description (Default = 0x0000) Not used Data bits. Twos complement, 0.0125/sec per LSB. Typical adjustment range = 50/sec. Sets the output range to 75/sec Waits for the next output register update Reads the output register of the gyroscope Multiplies the measurement by -1 to change its polarity Writes the final value into the offset register Performs a manual flash back-up function to store the correction factor in nonvolatile flash memory Set GLOB_CMD[1] = 1 (DIN = 0xBE02) to execute the factory calibration restore function. This is a single-command function, which resets each user calibration register to 0x0000 and all sensor data to 0. Then, it automatically updates the flash memory within 50 ms. See Table 23 for more information on GLOB_CMD. POINT-OF-PERCUSSION/LINEAR-g COMPENSATION Set MSC_CTRL[6] = 1 (DIN = 0xB446) to enable this feature and maintain the factory-default settings for DIO1. This feature performs a point-of-percussion translation to the point identified in Figure 6. See Table 25 for more information on MSC_CTRL. Set MSC_CTRL[7] = 1 to enable internal compensation for linear-g on the gyroscope bias. The accuracy of the bias correction depends on the internal averaging time used for the data sample, which depends on the decimation setting. For example, set SMPL_PRD[15:8] = 0x10 (DIN = 0xB710) to establish a decimation rate of 216, or 65536. This establishes an averaging time of 80 seconds at a sample rate of 819.2 SPS, which results in an Allan Variance of 0.006/sec in Figure 7. Rev. A | Page 15 of 20 PIN 20 PIN 2 ORIGIN ALIGNMENT REFERENCE POINT SEE MSC_CTRL[6]. Figure 21. Point of Percussion Reference 09362-019 X-AXIS MEMS GYRO Address 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x3E 09362-018 Register XGYRO_OFF YGYRO_OFF ZGYRO_OFF XACCL_OFF YACCL_OFF ZACCL_OFF GLOB_CMD The MBC function requires the user to collect the desired number of samples, calculate the averages to develop bias estimates for each gyroscope channel, and then write them into the bias offset registers, located in Table 20 for the gyroscopes. For example, set XGYRO_OFF = 0x1FF6 (DIN = 0x9B1F, 0x9AF6) to adjust the XGYRO_OUT offset by -0.125/sec (-10 LSBs). Table 21 provides a manual adjustment function for the accelerometer channels as well. ADIS16334 SYSTEM TOOLS Table 22 provides an overview of the control registers that provide support for the following system level functions: global commands, I/O control, status/error flags, device identification, MEMS selftest, and flash memory management. Table 22. System Tool Register Addresses Register Name FLSH_CNT GPIO_CTRL MSC_CTRL DIAG_STAT GLOB_CMD LOT_ID1 LOT_ID2 PROD_ID SERIAL_NUM Address 0x00 0x32 0x34 0x3C 0x3E 0x52 0x54 0x56 0x58 Description Flash write cycle count General-purpose I/O control Manual self-test controls Status, error flags Global commands Lot Identification Code 1 Lot Identification Code 2 Product identification Serial number Table 24. GPIO_CTRL Bit Descriptions Bit(s) [15:12] [11] [10] [9] [8] [7:4] [3] [2] [1] [0] Description (Default = 0x0000) Not used General-Purpose I/O Line 4 (DIO4) data level General-Purpose I/O Line 3 (DIO3) data level General-Purpose I/O Line 2 (DIO2) data level General-Purpose I/O Line 1 (DIO1) data level Not used General-Purpose I/O Line 4 (DIO4) direction control (1 = output, 0 = input) General-Purpose I/O Line 3 (DIO3) direction control (1 = output, 0 = input) General-Purpose I/O Line 2 (DIO2) direction control (1 = output, 0 = input) General-Purpose I/O Line 1 (DIO1) direction control (1 = output, 0 = input) GLOBAL COMMANDS Data Ready I/O Indicator The GLOB_CMD register provides an array of single-write commands for convenience. Setting the assigned bit in Table 23 to 1 activates each function. When the function completes, the bit restores itself to 0. For example, clear the capture buffers by setting GLOB_CMD[8] = 1 (DIN = 0xBF01). All of the commands in the GLOB_CMD register require the power supply to be within normal limits for the execution times listed in Table 23. Avoid communicating with the SPI interface during these execution times because it interrupts the process and causes data loss or corruption. The factory default sets DIO1 as a positive data ready indicator signal. In this configuration, the signal pulses high when all of the output data registers have fresh data from the same sample period. The MSC_CTRL[2:0] bits provide configuration options for changing the default. For example, set MSC_CTRL[2:0] = 100 (DIN = 0xB404) to change the polarity of the data ready signal on DIO1 for interrupt inputs that require negative logic inputs for activation. See Figure 4 for an example of the data-ready timing. Table 23. GLOB_CMD Bit Descriptions Bit(s) [15:8] [7] [6:4] [3] [2] [1] [0] 1 Description Not used Software reset Not used Register back-up to flash Not used Factory calibration restore Gyroscope auto-null Execution Time1 Not applicable 60 ms Not applicable Not applicable Table 25. MSC_CTRL Bit Descriptions Bit(s) [15:12] [11] [10] [9:8] [7] [6] This indicates the typical duration of time between the command write and the device returning to normal operation. General-Purpose I/O DIO1, DIO2, DIO3, and DIO4 are configurable, general-purpose I/O lines that serve multiple purposes according to the following control register priority: MSC_CTRL, ALM_CTRL, and GPIO_CTRL. For example, set GPIO_CTRL = 0x080C (DIN = 0xB308, and then 0xB20C) to configure DIO1 and DIO2 as inputs and DIO3 and DIO4 as outputs, with DIO3 set low and DIO4 set high. In this configuration, read GPIO_CTRL (DIN = 0x3200). The digital state of DIO1 and DIO2 is in GPIO_CTRL[9:8]. [5:3] [2] [1] [0] Rev. A | Page 16 of 20 Description (Default = 0x0006) Not used Memory test (cleared upon completion) (1 = enabled, 0 = disabled) Internal self-test enable (cleared upon completion) (1 = enabled, 0 = disabled) Not used Linear acceleration bias compensation for gyroscopes (1 = enabled, 0 = disabled) Linear accelerometer origin alignment (1 = enabled, 0 = disabled) Not used Data ready enable (1 = enabled, 0 = disabled) Data ready polarity (1 = active high, 0 = active low) Data ready line select (1 = DIO2, 0 = DIO1) ADIS16334 Self-Test DEVICE IDENTIFICATION The self-test function allows the user to verify the mechanical integrity of each MEMS sensor. It applies an electrostatic force to each sensor element, which results in mechanical displacement that simulates a response to actual motion. Table 1 lists the expected response for each sensor and provides pass/fail criteria. Table 27. LOT_ID1 and LOT_ID2 Bit Descriptions Bits [15:0] Description Lot identification code Table 28. PROD_ID Bit Descriptions Set MSC_CTRL[10] = 1 (DIN = 0xB504) to run the internal self-test routine, which exercises all inertial sensors, measures each response, makes pass/fail decisions, and reports them to error flags in the DIAG_STAT register. MSC_CTRL[10] resets itself to 0 after completing the routine. Zero rotation provides results that are more reliable. Bits [15:0] Memory Test FLASH MEMORY MANAGEMENT Setting MSC_CTRL[11] = 1 (DIN = 0xB508) performs a checksum verification of the flash memory locations. The pass/fail result is loaded into DIAG_STAT[6]. Set MSC_CTRL[11] = 1 (DIN = 0xB508) to run an internal checksum test on the flash memory, which reports a pass/fail result to DIAG_STAT[6]. The FLASH_CNT register (see Table 30) provides a running count of flash memory write cycles. This is a tool for managing the endurance of the flash memory. Figure 22 quantifies the relationship between data retention and junction temperature. Status The error flags provide indicator functions for common system level issues. All of the flags are cleared (set to 0) after each DIAG_STAT register read cycle. If an error condition remains, the error flag returns to 1 during the next sample cycle. The DIAG_STAT[1:0] bits do not require a read of this register to return to 0. If the power supply voltage goes back into range, these two flags are cleared automatically. Table 29. SERIAL_NUM Bit Descriptions Bits [15:0] Description Serial number, lot specific Table 30. FLASH_CNT Bit Descriptions Bits [15:0] Table 26. DIAG_STAT Bit Descriptions Description Binary counter for writing to flash memory 600 Rev. A | Page 17 of 20 450 300 150 0 30 40 55 70 85 100 125 135 JUNCTION TEMPERATURE (C) Figure 22. Flash/EE Memory Data Retention 150 09362-020 Description (Default = 0x0000) Z-axis accelerometer self-test failure (1 = fail, 0 = pass) Y-axis accelerometer self-test failure (1 = fail, 0 = pass) X-axis accelerometer self-test failure (1 = fail, 0 = pass) Z-axis gyroscope self-test failure (1 = fail, 0 = pass) Y-axis gyroscope self-test failure (1 = fail, 0 = pass) X-axis gyroscope self-test failure (1 = fail, 0 = pass) Alarm 2 status (1 = active, 0 = inactive) Alarm 1 status (1 = active, 0 = inactive) Not used Flash test, checksum flag (1 = fail, 0 = pass) Self-test diagnostic error flag (1 = fail, 0 = pass) Sensor overrange (1 = fail, 0 = pass) SPI communication failure (1 = fail, 0 = pass) Flash update failure (1 = fail, 0 = pass) Not used RETENTION (Years) Bit(s) [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1:0] Description 0x3FCE = 16,334 (decimal) ADIS16334 ALARMS The ADIS16334 provides two independent alarms, Alarm 1 and Alarm 2, which have a number of programmable settings. Table 31 provides a list of registers for these user settings. Table 31. Registers for Alarm Configuration Register ALM_MAG1 ALM_MAG2 ALM_SMPL1 ALM_SMPL2 ALM_CTRL Address 0x26 0x28 0x2A 0x2C 0x2E Description Alarm 1 trigger setting Alarm 2 trigger setting Alarm 1 sample period Alarm 2 sample period Alarm configuration ALARM REPORTING The DIAG_STAT[9:8] bits provide error flags that indicate an alarm condition. The ALM_CTRL[2:0] bits provide controls for a hardware indicator using DIO1 or DIO2. Table 35. ALM_CTRL Bit Descriptions Bit(s) [15:12] The ALM_CTRL register in Table 35 provides data source selection (Bits[15:8]), static/dynamic setting for each alarm (Bits[7:6]), data source filtering (Bit[4]), and alarm indicator signal (Bits[2:0]). STATIC ALARM USE The static alarms setting compares the data source selection (ALM_CTRL[15:8]) with the values in the ALM_MAGx registers in Table 32 and Table 33. The data format in these registers matches the format of the data selection in ALM_CTRL[15:8]. The MSB (Bit[15]) of each ALM_MAGx register establishes the polarity for this comparison. See Table 36, Alarm 1, for a static alarm configuration example. Table 32. ALM_MAG1 Bit Descriptions Bit(s) [15] [14] [13:0] Description (Default = 0x0000) Trigger polarity, 1= greater than, 0 = less than Not used Threshold setting; matches for format of ALM_CTRL[11:8] output register selection Alarm Example Table 36 offers an example that configures Alarm 1 to trigger when filtered ZACCL_OUT data drops below 0.7 g, and Alarm 2 to trigger when filtered ZGYRO_OUT data changes by more than 50/sec over a 100 ms period, or 500/sec2. The filter setting helps reduce false triggers from noise and refine the accuracy of the trigger points. The ALM_SMPL2 setting of 82 samples provides a comparison period that is 97.7 ms for an internal sample rate of 819.2 SPS. Table 33. ALM_MAG2 Bit Descriptions Bit(s) [15] [14] [13:0] Description (Default = 0x0000) Trigger polarity, 1= greater than, 0 = less than Not used Threshold setting; matches for format of ALM_CTRL[15:12] output register selection Table 36. Alarm Configuration Example 1 DYNAMIC ALARM USE The dynamic alarm setting monitors the data selection for a rate-of-change comparison. The rate-of-change comparison is represented by the magnitude in the ALM_MAGx registers over the time represented by the number-of-samples setting in the ALM_SMPLx registers located in Table 34. See Table 36, Alarm 2, for a dynamic alarm configuration example. Table 34. ALM_SMPL1 and ALM_SMPL2 Bit Descriptions Bits [15:8] [7:0] [11:8] [7] [6] [5] [4] [3] [2] [1] [0] Description (Default = 0x0000) Alarm 2 data source selection 0000 = disable 0001 = x-axis gyroscope output 0010 = y-axis gyroscope output 0011 = z-axis gyroscope output 0100 = x-axis accelerometer output 0101 = y-axis accelerometer output 0110 = z-axis accelerometer output 0111 = internal temperature output Alarm 1 data source selection (same as Alarm 2) Alarm 2, dynamic/static (1 = dynamic, 0 = static) Alarm 1, dynamic/static (1 = dynamic, 0 = static) Not used Data source filtering (1 = filtered, 0 = unfiltered) Not used Alarm indicator (1 = enabled, 0 = disabled) Alarm indicator active polarity (1 = high, 0 = low) Alarm output line select (1 = DIO2, 0 = DIO1) Description (Default = 0x0000) Not used Binary, number of samples (both 0x00 and 0x01 = 1) DIN 0xAF36, 0xAE97 0xA983, 0xA8E8 0xA702, 0xA6BC 0xAC66 Rev. A | Page 18 of 20 Description ALM_CTRL = 0x3697. Alarm 2: dynamic, ZGYRO_OUT (-time, ALM_SMPL2) > ALM_MAG2. Alarm 1: static, ZACCL_OUT < ALM_MAG1. Use filtered data source for comparison. DIO2 output indicator, positive polarity. ALM_MAG2 = 0x83E8 (true if ZGYRO_OUT > 50/sec) 50/sec / 0.05/sec per LSB = 1000 = 0x03E8, ALM_MAG2[15] = 1 for greater than. ALM_MAG1 = 0x02BC (true if ZACCL_OUT < 0.7g) 0.7 g / 1 mg/LSB = 700 LSB = 0x02BC, ALM_MAG1[15] = 0 for less than. ALM_SMPL2[7:0] = 0x52 (82 samples). ADIS16334 APPLICATIONS INFORMATION ADIS16334/PCBZ Installation The ADIS16334/PCBZ includes one ADIS16334BLMZ, one interface PCB, and one interface flex. This combination of components enables quicker installation for prototype evaluation and algorithm development. Figure 23 provides a mechanical design example for using these three components in a system. The following steps provide an example installation process for using these three components: 15mm TO 45mm * 23.75mm 28.40mm 12 11 2 1 * 15.05mm J1 20.15mm 12 11 10.07mm 30.10mm 2 1 * * J2 ADIS16334AMLZ SCF-156941-01-S A (SAMTEC P/N) * INTERFACE PCB 09362-021 NOTES 1. USE FOUR M2 MACHINE SCREWS TO ATTACH THE ADIS16334BMLZ. 2. USE FOUR M3 MACHINE SCREWS TO ATTACH THE INTERFACE PCB. Figure 23. Physical Diagram for Mounting the ADIS16334/PCBZ Figure 24 provides the pin assignments for the interface board, when it is properly connected to the ADIS16334BMLZ in this manner. J1 * J2 1 2 SCLK DNC 1 2 GND CS 3 4 DOUT DNC 3 4 DIO3 DNC 5 6 DIN GND 5 6 DIO4 GND 7 8 GND DNC 7 8 DNC GND 9 10 VCC DNC 9 10 DNC VCC 11 12 VCC DIO2 11 12 DIO1 Figure 24. J1/J2 Pin Assignments for Interface PCB * 09362-022 RST Drill and tap M2 and M3 holes in the system frame, according to the locations in Figure 23. The distance between these components is flexible but make sure that the hole-to-hole distance is within the 15 mm to 45 mm range shown in the diagram. Install the ADIS16334 using M2 machine screws. Use a mounting torque of 25 inch-ounces. Install the interface PCB using M3 machine screws. Connect J1 on the interface flex to the ADIS16334BMLZ connector. Connect J2 on the interface flex to J3 on the interface PCB. Note that J2 (interface flex) has 20 pins and J3 (interface PCB) has 24 pins. Make sure that Pin 1 on J2 (interface flex) connects to Pin 20 on J3 (interface PCB). J3 has a Pin 1 indicator to help guide this connection. Connect the ADIS16334BMLZ power, ground, and SPI signals to an embedded processor board using J1 and a 12-pin, 1 mm ribbon cable system. The following parts may be useful in building this type of cable: 3M Part Number 152212-0100-GB (ribbon crimp connector) and 3M Part Number 3625/12 (ribbon cable). Connect the ADIS16334BMLZ auxiliary I/O functions to the embedded processor board using J2 and the same type of ribbon cable system as J1. The ADIS16334 does not require external capacitors for normal operation; therefore, the interface PCB does not use the C1/C2 pads (not shown in Figure 23). Rev. A | Page 19 of 20 ADIS16334 OUTLINE DIMENSIONS 24.53 24.15 23.77 22.15 BSC 19.91 19.65 19.39 4.70 4.50 4.30 2.00 BSC 2.60 O 2.40 2.20 (4 PLCS) 4.70 4.50 4.30 2.00 BSC 25.08 BSC 30.40 BSC 33.08 32.70 32.32 0.66 BSC 1.00 BSC TOP VIEW 2.96 BSC 6.09 5.83 5.57 2.30 BSC (2 PLCS) 18.59 18.33 18.07 21.85 BSC 10.90 10.60 10.30 7.58 BSC 1.00 BSC PITCH 10.23 BSC 3.12 2.86 2.60 5.96 5.70 5.44 01-18-2011-B 2.96 2.70 2.44 END VIEW Figure 25. 20-Lead Module with Connector Interface (ML-20-1) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADIS16334BMLZ ADIS16334/PCBZ 1 Temperature Range -40C to +105C Package Description 20-Lead Module with Connector Interface Evaluation Board Z = RoHS Compliant Part. (c)2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09362-0-6/11(A) Rev. A | Page 20 of 20 Package Option ML-20-1