www.power.com May 2018
Energy-Efcient, Accurate Primary-Side Regulated
CV/CC Switcher for Adapters and Chargers
LinkSwitch-4 Family
This Product is Covered by Patents and/or Pending Patent Applications.
Output Power Table
Product3,4
85 - 265 VAC
Features5Adapter1
Open Frame2
LNK43x2S 13003 Drive 5 W
LNK40x2S STD 6.5 W
LNK40x3S STD 8 W
LNK4323S STD 8 W
LNK40x3D STD 10 W
LNK4323D STD 10 W
LNK40x4D STD 15 W
LNK4114D Easy Start 15 W
LNK4214D Easy Start + Constant Power 15 W
LNK4115D Easy Start 18 W
LNK4215D Easy Start + Constant Power 18 W
Table 1. Output Power Table.
Notes:
1. Minimum continuous power in a typical enclosed adapter measured at +50 °C
ambient, 85-265 VAC device TJ ≤ 100 °C.
2. Maximum practical continuous power in an open frame design with adequate
heat sinking, measured at +50 °C.
3. Package: D: SO-8 , S: SOT-23-6.
4. Cable compensation factor. x = 0 (no cable compensation),
x = 1 (3% cable compensation) x = 2 (6% cable compensation).
5. Easy Start feature uses the BJT current to directly charge CVCC, allowing
start-up into large output capacitors. 13003 drive feature has the gate drive
optimized for maximum efciency when using 13003 BJTs. Constant power
feature provides 175% of rated current at start-up, allowing start-up into
large output capacitors (see Figure 15). STD are standard products with all
the advanced performance and protection/safety features.
Product Highlights
Dramatically Simplies CV/CC Converters
• Eliminates optocoupler and all secondary CV/CC control circuitry
•Eliminates all control loop compensation circuitry
Advanced Performance Features
•Dynamic base drive technology provides exibility in choice of BJT
transistor by dynamically optimizing BJT switching characteristics
•Extends RBSOA of BJT
•Dramatically reduces sensitivity to BJT gain
•Compensates for input line voltage variations
•Compensates for cable voltage drop
•Compensates for external component temperature variations
•Very accurate IC parameter tolerances using proprietary trimming
technology
•Frequency up to 65 kHz to reduce transformer size
• The minimum peak current is xed to improve transient load response
Enhanced Performance Features
•Easy start for starting into capacitive loads (LNK4114D, LNK4115D)
•Constant power for high current start-up (LNK4214D, LNK4215D)
•13003 drive improved efciency with 13003 BJT’s (LNK4302S,
LNK4322S)
Advanced Protection/Safety Features
•Single fault output overvoltage and short-circuit
•Over-temperature protection
•Active clamp
EcoSmart™– Energy Efcient
•Meets DoE 6 and CoC V5 2016 via an optimized quasi-resonant
switching PWM/PFM control
•No-load consumption of <30 mW at 230 VAC input
Green Package
•Halogen free and RoHS compliant package
Applications
•Chargers for cell/cordless phones, PDAs, MP3/portable audio
devices, adapters, networking, etc.
Description
The LinkSwitchTM-4 family of ICs dramatically simplies low power CV/CC
charger design by eliminating an optocoupler and secondary control
circuitry. The LinkSwitch-4 family adaptive BJT drive technology uses
combined base and emitter switching to boost switching performance
and deliver higher efciency, wider Reverse Bias Safe Operating Area
(RBSOA) margin and the exibility to accommodate a wide range of low
cost BJT. The device incorporates a multimode PWM/PFM controller
with quasi resonant switch to maximize the efciency, meets low
no-load power and at same time maintain fast transient response
greater than 4.3 V with a load change from 0% to 100%.
Figure 1. Typical Application (SOT-23-6) (S).
Figure 3. SOT-23-6 and SO-8 Packages.
Figure 2. Typical Application (SO-8) (D).
PI-7462-122315
LinkSwitch-4
U1
LNK4xx2S
~
GND
BD
ED
CS VCC
FB
+
PI-7464-010815
LinkSwitch-4
U1
LNK40x3D
~
GND
BD
ED
CS
VCC
SBD
FB
+
Rev. F 05/18
2
LinkSwitch-4
www.power.com
Figure 4. LNK40x2S, LNK40x3S, LNK4323S and LNK43x2S Functional Block Diagram.
PI-7460-033015
VOLTAGE SUPPLY
(VCC)
BASE DRIVE
(BD)
EMITTER DRIVE
(ED)
GROUND
(GND)
CURRENT
SENSE
(CS)
FEEDBACK
(FB)
Reset
Signal
VDD(REG)
VVCC(RUN) VVCC(SLEEP)
VDD
IFBHT(LO) VIN
UVP
VOUT
OVP
IFBHT(START)
VOVP
VCSTHR
VCMAX
CYCLE
TIMING
VHT ESTIMATOR
RESET CIRCUIT
VDD REGULATOR
CABLE
COMPENSATION
CC CURRENT
CONTROL
CS BLANKING
CV VOLTAGE
CONTROL
PFM/PWM
CS
OCP
THERMAL
SHUTDOWN
Rev. F 05/18
3
LinkSwitch-4
www.power.com
Pin Functional Description
VOLTAGE SUPPLY (VCC) Pin:
During Run mode, power derived from the transformer voltage
supply winding is fed to the control circuitry via the VOLTAGE
SUPPLY pin.
BASE DRIVE (BD) Pin:
BASE DRIVE pin for BJT.
EMITTER DRIVE (ED) Pin:
EMITTER DRIVE pin for BJT.
FEEDBACK (FB) Pin:
The FEEDBACK pin input provides feedback to the control
circuitry by monitoring the transformer voltage waveform.
GROUND (GND) Pin:
Power and signal ground.
Primary CURRENT SENSE (CS) Pin:
Primary CURRENT SENSE pin via RCS.
SUPPLEMENTARY BASE DRIVE (SBD) Pin:
Supplementary base drive.
Figure 5. LNK40x3D, LNK4323D, LNK40x4D, LNK4114D, LNK4115D and LNK4215D Functional Block Diagram.
Figure 6. Pin Conguration.
PI-7465-033015
VOLTAGE SUPPLY
(VCC)
BASE DRIVE
(BD)
EMITTER DRIVE
(ED)
GROUND
(GND)
CURRENT
SENSE
(CS)
FEEDBACK
(FB)
Reset
Signal
SWITCH
VDD(REG)
VVCC(RUN) VVCC(SLEEP)
VDD
IFBHT(LO) VIN
UVP
VOUT
OVP
IFBHT(START)
VOVP
VCSTHR CS
OCP
VCMAX
CYCLE
TIMING
VHT ESTIMATOR
RESET CIRCUIT
VDD REGULATOR
CABLE
COMPENSATION
CC CURRENT
CONTROL
CS BLANKING
CV VOLTAGE
CONTROL
PFM/PWM
THERMAL
SHUTDOWN
SUPPLEMENTARY
BASE DRIVE
(SBD)
PI-7673-061516
D Package (SO-8)
(LNK40x4D, LNK4114D, LNK4214D,
LNK4115D, LNK4215D)
S Package (SOT-23-6)
CS
VCC
BD
SBD
8
7
6
5
1
2
3
4
FB
FB
GND
ED
CS
VCC
BD
61
52
43
GND
GND
ED
D Package (SO-8)
(LNK40x3D, LNK4323D)
CS
VCC
SBD
BD
8
7
6
5
1
2
3
4
FB
GND
GND
ED
Rev. F 05/18
4
LinkSwitch-4
www.power.com
Functional Description
Power-Up/Power-Down Sequences
Refer to Figure 10 and Figure 7. When mains input voltage (VIN) is
applied, current ows through the start-up resistors (RHT) and BJT.
Some of this current ows into the LinkSwitch-4 internal circuits,
which are in Sleep mode; the remainder charges capacitor CVCC.
As soon as the VOLTAGE SUPPLY pin voltage rises to VVCC(RUN), the
LinkSwitch-4 changes to Initialise mode. Current consumption
increases to IVCC(RUN) while internal circuits are enabled. The emitter
switch is held at low impedance to ground (GND) and a short drive
pulse is output on the BASE DRIVE pin, during which time the voltage
at feedback is held at GND potential by current sourced from the
FEEDBACK pin. This enables the LinkSwitch-4 control circuit to
compare the rectied mains input voltage with thresholds for allowing
or preventing the next stage of power-up. If the input voltage is too
low (IFB < IFBHT(START)), the LinkSwitch-4 will not issue further drive
pulses, the VCC voltage will discharge to VVCC(SLEEP), and the power-up
sequence will repeat. If the mains input voltage is high enough (IFB >
IFBHT(START)), the LinkSwitch-4 will enter Run mode and drive pulses will
be output on the BASE DRIVE pin. To achieve smooth power-up
(monotonic rise in VOUT), CVCC must be large enough to power the
control circuitry during Initialize mode and the rst few cycles of Run
mode, until sufcient power is provided by the transformer voltage
supply winding.
If the input voltage falls below VMAINS(LO) (see Input Undervoltage
Protection), VVCC will fall below VVCC(SLEEP) and the LinkSwitch-4 will go
VVCC(RUN)
VVCC(SLEEP)
Off Sleep Initialize Sleep OffRun
VVCC
PI-7457-010815
Figure 7. VCC Waveforms.
Mode Description
Sleep
From initial application of input power or from Run mode, if VVCC falls below VVCC(SLEEP), the LinkSwitch-4 goes to Sleep mode.
Non-essential circuits are turned off. Base and Emitter drives are turned off so BASE DRIVE and EMITTER DRIVE pins
become high impedance, allowing the bootstrap resistor (RHT) and BJT to start the circuit. Sleep mode is exited when VVCC
rises to VVCC(RUN) and the control circuitry goes to Initialize mode.
Initialize
Internal circuits are enabled and the LinkSwitch-4 issues one switching cycle to sample the input voltage via the FEEDBACK
pin. If VIN (hence VHT) is high enough, the LinkSwitch-4 changes to Run mode. If VIN is not high enough, no further base drive
pulses are issued and the LinkSwitch-4 returns to Sleep mode when VVCC falls below VVCC(SLEEP).
Run Power conversion: The control circuitry is powered from the VCC rail and the internal VDD is regulated. If VVCC falls below
VVCC(SLEEP), the IC ceases power conversion and goes to Sleep mode.
Table 2. Summary of LinkSwitch-4 Operating Modes.
into Sleep mode, reducing its current consumption to IVCC(SLEEP). The
control circuitry will re-initialize if the input voltage is restored and
VVCC reaches VVCC(RUN).
Rev. F 05/18
5
LinkSwitch-4
www.power.com
Figure 8. Typical Waveforms at the Feedback and Primary Current Sense Inputs.
PI-7458-010815
tSAMP
tCSB
VFBREG
VCSTHR
VVCC(RUN)
tFON
0 A
0 V
0 V
ON
OFF
FB
CS
BD
ED
Transformer
Flux
Switching Waveforms
Typical waveforms at the feedback and primary current sense inputs
are shown in Figure 8.
Constant Voltage (CV) Regulation
Constant output voltage regulation is achieved by sensing the voltage
at the feedback input, which is connected to the voltage supply
winding as shown in Figure 10 or to a dedicated feedback winding.
An internal current source prevents the feedback voltage from going
negative. A typical feedback voltage waveform is shown in Figure 8.
The feedback waveform is continuously analyzed and sampled at time
tSAMP to measure the reected output voltage. tSAMP is identied by the
slope of the feedback waveform and is coincident with zero ux in the
transformer. The sampled voltage is regulated at VFB(REG) by the
voltage control loop. The (typical) CV mode output voltage is set by
the ratio of resistors RFB1 and RFB2 (see Figure 10) and by the
transformer turns ratio, according to the following formula (where
output diode voltage is neglected):
VV R
R
N
N
1
OUTCVFBREG
FB
FB
F
S
2
1
=+
aa
^^
kk
hh
Where NF is the number of turns on the feedback (or voltage supply
if used for feedback) winding and NS is the number of turns on the
secondary winding. The tolerances of RFB1 and RFB2 affect output
voltage regulation and mains estimation so should typically be chosen
to be 1% or better.
The current required to clamp the feedback voltage to ground
potential during the on-time of the primary switch depends on the
primary winding voltage (approximately equal to the rectied mains
input voltage), the primary to feedback turns ratio, and resistor RFB1.
The controller measures feedback source current and so enables RFB1
to set the input voltage start threshold and the input undervoltage
protection threshold, as described below.
Input Voltage Start Threshold
In Initialise mode, the LinkSwitch-4 issues a single short-duration
drive pulse in order to measure the primary voltage and so the
approximate mains input voltage. If the input voltage is below
VMAINS(START) then the LinkSwitch-4 will not start. Instead it will pause
while VVCC discharges below VVCC(SLEEP) then it will begin a new power-up
cycle. If the input voltage exceeds VMAINS(START), the converter will
power-up. VMAINS(START) is set by RFB1 using this equation:
VIRN
N
2
1
MAINSSTART FBHT STARTFB
F
P
1
###=
-
^^hh
Input Undervoltage Protection
In Run mode, if the mains voltage falls to VMAINS(LO), the LinkSwitch-4
will stop issuing drive pulses, VVCC will reduce to VVCC(SLEEP) and the
LinkSwitch-4 will enter Sleep mode. VMAINS(LO) is set by RFB1 using this
equation:
VIRN
N
2
1
MAINSLOFBHTLOFB
F
P
1
###=
-
^^hh
Constant Current (CC Mode) Regulation
Constant current output (IOUT(CC)) is achieved by regulating the CS
input to the primary side estimate of the output current scaled by RCS,
VCS(CC). The regulated output current, IOUT(CC) is set by the value of the
current sense resistor, RCS, and the transformer primary to secondary
turns ratio (NP/NS). The value of RCS is determined using the formula:
RN
N
IT
yp
VT
yp
CS
S
P
OUTCC
CS CC
.
a
d
^
^
^
^
k
h
h
n
h
h
The tolerance of RCS affects the accuracy of output the current
regulation so is typically chosen to be 1%. The LinkSwitch-4 can
maintain CC regulation down to much lower levels of VSHUTDN(MAX)
normally specied for mobile phones chargers (see Figure 11).
Rev. F 05/18
6
LinkSwitch-4
www.power.com
Cable Compensation
If required, LinkSwitch-4 adjusts the converter output voltage (VOUT)
to compensate for voltage drop across the output cable. The amount
of compensation applied (GCAB) is specied by using the formula below
to match cable compensation with output cable resistance (RCAB):
%
%
VTyp
ITyp R
G
GVTyp
ITyp R
100
100
OUTCV
OUTC CAB
CAB
P
CAB
OUTCV
OUTC
CC
AB
#
#
#
#
=
=
^
^
^
^
^
^
^
^
h
h
h
h
h
h
h
h
Or
Drive Pulse and Frequency Modulation
The LinkSwitch-4 control circuitry determines both the primary switch
peak current and the switching frequency to control output power,
ensuring discontinuous conduction mode operation at all times.
Primary current generates a voltage across the current sense resistor,
RCS, and is sensed by the primary current sense input. The voltage
on the primary CURRENT SENSE pin is negative-going, as shown in
Figure 8. When the voltage exceeds a (negative) threshold (VCSTHR)
set by the control circuitry, base drive is driven low to turn the
primary switch off. The primary current sense voltage threshold
(VCSTHR) varies from VCS(MIN) to VCS(MAX) during normal operation. The
switching frequency varies from fMIN at no-load, to the maximum
switching frequency, fMAX.
Minimum switching frequency occurs during no-load operation and
is typically in the range 1 to 3 kHz, depending on application design.
The periodic voltage waveform on the VCC input, which depends on
the current consumed by the control circuitry and the value of CVCC,
contributes to control of the switching frequency. In no-load
condition, CVCC must be large enough to ensure that ripple voltage on
VCC (∆VVCCPFM) is less than 1.6 V, and CVCC must be small enough to
ensure the ripple on VCC is greater than 50 mV:
VCCPFM
CfV
I
VCC
MIN
VCCNL
#D
=
The switching frequency increases as the load increases, eventually
reaching fMAX at full load. For protection purposes in the event of
certain transitory conditions, the controller immediately issues a drive
pulse if VCC voltage falls to VVCC(LOW). This is not part of normal
operation or normal frequency control.
Base Drive Control
During the on-time of the BJT, the emitter is switched to GND via the
EMITTER DRIVE pin. Base current, IBD is controlled to achieve fast
turn-on, low on-voltage and fast turn-off to enable reduced power
dissipation and accurate timing of each part of the switching cycle.
As shown in Figure 9, the base drive current starts with a xed pulse
of IF(ON)/tF(ON). Its amplitude and duration are then modulated to provide
sufcient charge for low BJT on-voltage, while allowing de-saturation
towards the end of on-time so as to enable fast turn-off. When VCSTHR
is detected on the primary CURRENT SENSE pin, the BASE DRIVE pin
is switched to GND and the emitter drive switch is opened.
LNK43x2S – drive optimized for high efciency performance using
13003 transistors.
Duty Cycle Control
Maximum duty cycle is a function of the primary to secondary turns
ratio of the transformer (typically 16:1 for a 5 V output). For a
universal mains input power supply, maximum duty cycle is typically
chosen to be 50% at the minimum (including ripple) of the rectied
mains voltage (typically 80 V).
Quasi-Resonant Switching
The primary switch is turned on when the voltage across it rings
down to a minimum (voltage-valley, quasi-resonant switching). The
effect of this is to reduce losses in the switch at turn-on. It also
helps reduce EMI.
Primary Switch Over-Current Protection
The primary switch is turned off if the emitter current sensed by the
primary current sense input exceeds the effective threshold VCSOCP(EFF),
subject to the minimum on-time, TON(MIN). The effective threshold
VCSOCP(EFF) depends on a threshold VCS(OCP) predened by the controller,
the primary current sense signal rate of rise (dVcs/dt), which is
dependent on the application design, and the primary CURRENT
SENSE pin turn-off response time, tCS(OFF). This gives pulse by pulse
over-current protection of the primary switch.
Output Overvoltage Protection
The on-time of the primary switch is reduced if the output voltage
tends to VOUT(OVP). The value depends on the set output voltage
(VOUT(C V)) and the feedback OVP ratio:
VVG
OUTOVP OUTC
VF
BOVP
#=
^^^hhh
Supplementary Base Drive (LNK40x3D, LNK4114D, LNK4214D)
The resistor RSBD connects the SUPPLEMENTARY BASE DRIVE pin to
VOLTAGE SUPPLY pin. It supplements current to the base drive to
optimize the switching bipolar transistor turn-on and turn-off in high
power applications.
Suggested values for the supplementary base drive resistor RSBD are
between 220 Ω and 390 Ω.
Shunt Function (LNK40x3D, LNK40x4D, LNK4115D, LNK4215D)
The shunt function is intended to automatically limit the VCC voltage
and allow greater exibility in transformer design. VOLTAGE SUPPLY
pin will be shunted via RSBD, the SUPPLEMENTARY BASE DRIVE pin
resistance RSBD(ON) and RBD(OFF) to the GROUND pin when the VCC
voltage is greater than VVCC(HI) and the transformer is discharging.
Output Undervoltage Protection (LNK40x3S/D, LNK43x3S/D)
The output undervoltage protection (UVP) function is used to
shutdown the converter when the output voltage is below VOUT(UVP).
At start-up this function is disabled during the rst NSTARTUP switching
cycles and the output current is regulated allowing the output voltage
to rise from 0 V in a monotonic way.
Table 3. Output Undervoltage Protection.
Product Output Undervoltage Protection Function
LNK40x2S
LNK43x2S VOUT(UVP) Depends on VVCC(SLEEP)
LNK40x3S
LNK40x3D
LNK4323S
LNK4323D
VOUT(UVP) = 0.63 × VOUT(CV)
LNK40x4D VOUT(UVP) Depends on VVCC(SLEEP)
LNK4114D
LNK4214D
LNK4115D
LNK4215D
VOUT(UVP) Depends on VVCC(SLEEP)
Rev. F 05/18
7
LinkSwitch-4
www.power.com
PI-7459-090215
IFON
IBDSRC
tFON
IBD
Logic BD
Logic ED
BD Ground
Figure 9. Base Drive Waveforms.
If the output does not reach VOUT(UVP) during this time then the
controller will shutdown and restart.
VOUT(UVP) value depends on the set output voltage (VOUT(CV)) and the
feedback UVP ratio:
VVG
OUTUVP OUTC
VF
BUVP
#=
^^^hhh
Easy Start (LNK4114D, LNK4214D, LNK4115D, LNK4215D)
The Easy Start feature guarantees start-up into large output
capacitances and allows the output voltage to work down the CC
chimney close to OV.
The Easy Start feature uses the BJT emitter current (equal to the
primary current) to charge the supply capacitor CVCC via an additional
Schottky diode.
This only occurs when the supply voltage has fallen below VVCCES and
is achieved by altering the sequencing of EMITTER DRIVE pin switching.
If the supply voltage is below VVCC(ES), and when the base has received
enough charge, the EMITTER DRIVE pin is released at the same time
as the BASE DRIVE pin.
This allows the BJT emitter voltage to rise until the Schottky diode
conducts. Emitter current then charges the CVCC until the BJT is
turned off by the BASE DRIVE pin being pulled low.
If the supply voltage is above VVCC(ES), then Easy Start has no effect
on the operation of the controller.
Note VVCC(ES) = 6 V for LNK4114D and LNK4214D, VVCC(ES) = 10 V for
LNK43x3S, LNK43x3D, LNK4115D and LNK4215D during NSTARTUP cycles,
after which it reduces to 6 V.
Over-Temperature Protection
Temperature protection is internal to LinkSwitch-4. The sensor
measures the junction temperature TJ, which is the hottest part of
LinkSwitch-4.
At temperatures TJ ~ 140 °C, LinkSwitch-4 will shutdown and remain
in this state until a temperature of TJ ~ 70 °C is reached. Whereby
LinkSwitch-4 will power-up in the normal sequence.
Figure 9b. Base Drive Waveforms – Easy Start mode of Operation.
PI-7674-090215
IFON
IBDSRC
IBD
VCC
Logic BD
Logic ED
BD Ground
CVCC Recharge Current
tFON
Rev. F 05/18
8
LinkSwitch-4
www.power.com
Figure 10. Typical Universal Input, 10 W Charger.
Parameter Symbol Range or Value Units Comment
Supply Voltage VIN 85 - 265 VAC Universal mains
Output Voltage VOUT(CV) 5.0 ± 5% V Constant voltage (CV) mode, at the load
Output Current IOUT 2 A Label rated output current
Switching Frequency at Full Load fMAX 65 kHz
Cable Compensation GCAB 6 % Determined by the chosen variant
No-load Power PNL <30 mW Energy Star test method
Average Efciency η>75 % Energy Star test method
Turn-on Delay TON <1 s
Undershoot Voltage VUNDERSHT >4 V Load step from 0 A to 0.5 A
By sensing the primary-side waveforms of transformer voltage and
primary current, the LinkSwitch-4 achieves constant voltage and
constant current output within tight limits without the need for any
secondary-side sensing components. Figure 11 shows the output
characteristics of a typical charger implementation.
Typical Application for LNK40x3D
PI-7679-071515
LNK40x3D
~
GND
BD
ED
CS
VCC
SBD
FB
+
2 × R
HT
Q1
L
FILT
D
BRIDGE
R
CS
R
CS2
R
SBD
R
FB2
R
OUT
C
OUT
D
OUT
R
FB1
T1
C
VCC
R
IN
C
IN1
C
IN2
Table 4. 10 W Typical Application Results for Figure 10.
Rev. F 05/18
10
LinkSwitch-4
www.power.com
Figure 12. Typical Universal Input, 12 W Adapter.
Table 5. 12 W Typical Networking Application Results.
Parameter Symbol Range or Value Units Comment
Supply Voltage VIN 90 - 264 VAC Universal mains
Output Voltage VOUT(CV) 12.0 ± 5% V Constant voltage (CV) mode, at the load
Output Current IOUT 1 A Label rated output current
Load Capacitance CLOAD 3000 mFSystem capacitance
Switching Frequency at Full Load fMAX 65 kHz
Cable Compensation GCAB 3 % Determined by the chosen variant
No-load Power PNL <75 mW Energy Star test method
Average Efciency η>83 % Energy Star test method
Turn-on Delay TON <1 s
Typical Networking Application for LNK4114D
PI-7675-071615
LNK4114D
~
GND
BD
ED
CS
VCC
SBD
FB
+
2 × R
HT
Q1
L
FILT
D
BRIDGE
R
CS
R
CS2
R
SBD
R
FB2
R
OUT
C
OUT
D
OUT
R
FB1
T1
C
VCC
R
IN
C
IN1
C
IN2
Rev. F 05/18
12
LinkSwitch-4
www.power.com
Figure 14. Typical Universal Input, 12 W Adapter.
Table 6. 12 W Typical Networking Application Results.
Parameter Symbol Range or Value Units Comment
Supply Voltage VIN 90 - 264 VAC Universal mains
Output Voltage VOUT(CV) 12.0 ± 5% V Constant voltage (CV) mode, at the load
Output Current IOUT 1 A Label rated output current
Load Capacitance CLOAD 6000 mFSystem capacitance
Switching Frequency at Full Load fMAX 65 kHz
Cable Compensation GCAB 3 % Determined by the chosen variant
No-load Power PNL <75 mW Energy Star test method
Average Efciency η>83 % Energy Star test method
Turn-on Delay TON <1 s
Typical Networking Application for LNK4214D
PI-7677-071515
LNK4214D
~
GND
BD
ED
CS
VCC
SBD
FB
+
2 × R
HT
Q1
L
FILT
D
BRIDGE
R
CS
R
CS2
R
SBD
R
FB2
R
OUT
C
OUT
D
OUT
R
FB1
T1
C
VCC
R
IN
C
IN1
C
IN2
Rev. F 05/18
13
LinkSwitch-4
www.power.com
Figure 15. Typical LNK4214D and LNK4215D CP Output Characteristic Achieved.
VOUT (V)
IOUT (A)
100%
75%
100%0 175% 200%
50%
33%
PI-7678-090215
Low Mains
High Mains
VOUTCV(TYP) IOUTCP(MIN)
IOUTCP(TYP)
IOUT(EXT)
Constant Power
The LNK4214D controller is optimized for fast start-up into loads with
large capacitance. The constant current (CC) pull-up set point of the
VI characteristic is determined by the value of RCS. The controller
regulates in CC mode until it is above approximately 50% of the
programmed constant voltage (CV) regulation point (set by the values
of RFB1 and RFB2). It then regulates in a power limited or “constant
power” (CP) mode until the output voltage reaches the CV set point,
at which point it changes to CV mode regulation. The exact trajectory
is dependent on the
input mains voltage.
IOUT at the point of transition between CP and CV modes, IOUTCP, will be
greater than 57% of IOUT(EXT) as shown in Figure 15.
Rev. F 05/18
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Parameter Symbol
Conditions
TJ = -25 to 125 °C
(Unless Otherwise Specied)
Min Typ Max Units
Normal Operating Conditions
External Supply
Voltage VVCC 516.5 V
Transformer
Resonance frequency
(In-Circuit)
fRES 180 1200 kHz
Thermal Shutdown
Temperature TSD 130 140 150 °C
Thermal Shutdown
Hysteresis TSDH 70 °C
VOLTAGE SUPPLY Pin
Easy Start
Enable Voltage VCC(ES)
LNK4114D / LNK4214D 6
V
LNK4115D / LNK4215D for NSTARTUP Cycles,
then 6 V 10
Supply Voltage
VVCC(RUN) To Enter Initialize Mode 11.5 13.5 15.5
VVVCC(SLEEP) 4.5 5.1
VVCC(LOW) 5
Supply Current
IVCC(RUN) Average at fMAX, Excluding Base Drive Current 2
mA
IVCC(NL) No-Load 0.6
IVCC(SLEEP) In Sleep Mode 15 mA
VCC Shunt Trigger
Level VCC(HI) LNK4XX3D / LNK4XX4D / LNK4XX5D 15.5 V
FEEDBACK Pin
Feedback
Regulation Level VFB(REG) TJ = 25 °C 1.96 1.98 2.00 V
Feedback Input
Resistance RFB(IN)
Effective Input Resistance
0 < VFB < 5 2 MΩ
Feedback OVP Ratio GFB(OVP) 1.19 1.20 1.21
Feedback UVP Ratio GFB(UVP) LNK40x3D/S 0.62 0.63 0.64
Thermal Resistance
Thermal Resistance: D Package: (SO-8)
(qJA) ................................................. 120 °C/W
(qJB)1,2 ................................................. 30 °C/W
S Package (SOT-23-6)
(qJA) ................................................. 170 °C/W
(qJB)2 ..................................................60 °C/W
Notes:
1. IC mounted on typical (1oz) copper clad PCB with 164 mm2
ground plane surrounding GROUND pin(s).
2. qJB measured to GROUND pin terminal of device at the surface
of the PCB.
Absolute Maximum Ratings1
SUPPLY VOLTAGE Pin ..................................................-0.5 V to 18 V
FEEDBACK Pin Input Voltage ........................................ -0.5 V to 4 V
FEEDBACK Pin Input Current .................................. -20 mA to 20 mA
CURRENT SENSE Pin Input Voltage ............................... -0.5 V to 4 V
CURRENT SENSE Pin Input Current ......................... -20 mA to 20 mA
BASE DRIVE Pin Voltage ..............................................-0.5 V to 18 V
EMITTER DRIVE Pin Voltage ........................................-0.5 V to 18 V
SUPPLEMENTARY BASE DRIVE Pin Voltage ...................-0.5 V to 18 V
Junction Temperature ................................................. -40 to 150 °C
Lead Temperature2 ................................................................260 °C
Notes:
1. Maximum ratings specied may be applied, one at a time
without causing permanent damage to the product. Exposure to
Absolute Maximum ratings for extended periods of time may
affect product reliability.
2. Soldering, 10 seconds.
Rev. F 05/18
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Parameter Symbol
Conditions
TJ = -25 to 125 °C
(Unless Otherwise Specied)
Min Typ Max Units
FEEDBACK Pin (Cont.)
Feedback Current Low
Mains Threshold IFBHT(LO) -0.495 -0.412 -0.31 mA
Feedback Current
Start Mains Threshold IFBHT(START) -1.05 -0.9 -0.75 mA
Feedback
Blanking Time tFB(BL)
Fixed for LNK40x2S and LNK43x2S 1.5
ms
VOUT
≤0.7
VOUT(CV)
RCS2 = 100 Ω1.5
RCS2 = 270 Ω2.2
RCS2 = 470 Ω2.5
RCS2 = 1000 Ω2.5
VOUT
>0.7
VOUT(CV)
RCS2 = 100 Ω0.75
RCS2 = 270 Ω1.1
RCS2 = 470 Ω1.25
RCS2 = 1000 Ω1.25
Start-up Cycle Count NSTARTUP
LNK40x3S / LNK40x3D 600
LNK43xxS / LNK43xxD 700
LNK4xx5D 1700
Transient Detect
Pulse Duration tTD LNK40x3S / LNK40x3D / LNK40x4D / LNK4114D /
LNK4214D / LNK4115D / LNK4215D 100 ns
Transient Detect
Threshold VTD
LNK40x3S / LNK40x3D / LNK40x4D / LNK4114D /
LNK4214D / LNK4115D / LNK4215D / LNK4323S
/ LNK4323D
60 mV
CURRENT SENSE Pin
Primary Current Sense
Input Minimum
Threshold
VCS(MIN)
Outside Primary
Current Sense
Blanking Time
tCS(B)
LNK40x2S / LNK43x2S -88
mV
LNK40x3S
LNK40x3D
LNK40x4D
LNK4114D
LNK4214D
LNK4115D
LNK4215D
LNK4323S
LNK4323D
(Set by External
Resistor RCS2)
RCS2= 100 Ω-56
RCS2= 270 Ω-73
RCS2= 470 Ω-94
RCS2= 1000 Ω-127
Primary Current Sense
Input Maximum
Threshold
VCS(OCP) Outside Primary Current
Sense Blanking Time
tCS(B)
Over-Current Protect -350 -340 -330 mV
VCS(MAX) Normal Regulation -380 -360 -340 mV
Primary Current Sense
Turn-Off Response
Time
tCS(OFF)
Outside Primary Current Sense
Blanking Time tCS(B)
120 ns
Primary Current Sense
Threshold for CC
Operation
VCS(CC)
TJ = 25 °C
Except LNK4115D, LNK4214D, LNK4215D -62 -60.8 -59.6
mV
LNK4115D Only -68
LNK4214D Only -105
LNK4215D Only -119
Rev. F 05/18
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Parameter Symbol
Conditions
TJ = -25 to 125 °C
(Unless Otherwise Specied)
Min Typ Max Units
CURRENT SENSE Pin (cont.)
Leading Edge
Blanking Time tCS(B) See Figure 8 375 ns
BASE DRIVE Pin
Base Drive Force
on Current IF(ON)
LNK43x3S / LNK40x2S / LNK40x3S /
LNK40x3D / LNK43x3D 40
mALNK43x2S 60
LNK40x4D / LNK4114D / LNK4214D /
LNK4115D / LNK4215D 80
Base Drive Force
on Duration tF(ON) 200 ns
Base Drive
Source Current
IBDSRC(MIN)
LNK43x3S / LNK40x2S / LNK40x3S /
LNK40x3D / LNK43x3D 5
mA
LNK43x2S 7.5
LNK40x4D / LNK4114D / LNK4214D /
LNK4115D / LNK4215D 12
IBDSRC(MAX)
LNK43x3S / LNK40x2S / LNK40x3S /
LNK40x3D / LNK43x3D 40
LNK43x2S 60
LNK40x4D / LNK4114D / LNK4214D /
LNK4115D / LNK4215D 80
Base Drive
Pull Down Resistance RBD(OFF) VVCC = 12 V
LNK40x2S / LNK43x2S 4.5
Ω
LNK4323S / LNK40x3S 3
LNK4323D / LNK40x3D 3
LNK40x4D/ LNK4114D /
LNK4214D / LNK4115D /
LNK4215D
1.2
Base Drive
Minimum On-Time tBDON(MIN) 375 ns
Base Drive
Leakage Current IBD(SLEEP) In Sleep Mode, TJ = 50 °C 1 mA
Base Drive
Peak Sink Current IBD(SINK)
LNK40x2S / LNK43x2S 600
mA
LNK40x3S / LNK4323S 700
LNK40x3 / LNK4323D 900
LNK40x4D / LNK4114D / LNK4214D / 1100
LNK4115D / LNK4215D 1300
Rev. F 05/18
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Parameter Symbol
Conditions
TJ = -25 to 125 °C
(Unless Otherwise Specied)
Min Typ Max Units
EMITTER DRIVE Pin
Emitter Drive
On-State Resistance REDON(MAX) VVCC = VVCC(SLEEP)
LNK40x2S / LNK43x2S 3
Ω
LNK40x3S / LNK4323S 1.5
LNK40x3D / LNK4323D 1.5
LNK40x4D / LNK4114D /
LNK4214D / LNK4115D /
LNK4215D
0.9
Emitter Drive
Leakage Current IED(SLEEP)
In Sleep Mode,
TJ = 50 °C
LNK40x2S / LNK43x2S 1
mA
LNK40x3S / LNK4323S 1
LNK40x3D / LNK4323D 1
LNK40x4D / LNK4114D /
LNK4214D / LNK4115D /
LNK4215D
1
Emitter Drive
Peak Sink Current IED(SINK)
LNK40x2S / LNK43x2S 600
mA
LNK40x3S / LNK4323S 700
LNK40x3D / LNK4323D 900
LNK40x4D / LNK4114D / LNK4214D 1100
LNK4115D / LNK4215D 1300
Emitter Drive
Minimum On-Time tEDMIN(ON) LNK40x3S / LNK40x3D Only 175 ns
SBD Pin
SBD On-State
Resistance RSBD(ON)
LNK40x3D / LNK4323D 8
Ω
LNK40x4D / LNK4114D / LNK4214D /
LNK4115D / LNK4215D 4
SBD Leakage Current ISBD(SLEEP)
In Sleep Mode,
TJ = 50 °C
LNK40x3D / LNK40x4D /
LNK4114D / LNK4214D /
LNK4115D / LNK4215D /
LNK4323D
1mA
NOTES:
A. Min and Max values apply over the full range of normal operating conditions.
B. Typical electrical characteristics apply at TJ = TJ (typ).
C. The chip is operating in Run mode.
D. Voltages are specied with respect to the GROUND pin.
Rev. F 05/18
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PI-7468-120814
POD-SOT-23-6 Rev B
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions noted are determined at the outermost extremes of the plastic body
exclusive of mold flash, tie bar burrs, gate burrs, and inter-lead flash, but including any
mismatch between the top and bottom of the plastic body. Maximum mold protrusion is
0.25 mm per side.
3. Dimensions noted are inclusive of plating thickness.
4. Does not include inter-lead flash or protrusions.
5. Dimensions in millimeters.
6. Datums A and B to be determined in Datum H.
7. JEDEC reference: MO − 178.
SOT-23-6
2.90
1.90
2.80
1.60
1 2 3
6 5 4
0.15 C A - B 2X
0.15 C D 2X
0.20
2X, 3 Lead Tips
Seating
Plane Seating
Plane
0.25
0.60
0.30
0.22
0.08
8º
0º
0.60 Ref.
Gauge
Plane
0.15
0.00
1.30
0.90
1.45 Max.
0.95
C
0.10
C
Pin #1 I.D.
(Laser Marked)
6X
0.50
0.30
0.20 M C A – B D
43
2
2
3
A
D
B
C
H
C
TOP VIEW
SIDE VIEW END VIEW
Rev. F 05/18
19
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PI-7461-120914
D08A
SO-8 (D Package)
3.90 (0.154) BSC
Notes:
1. JEDEC reference: MS-012.
2. Package outline exclusive of mold flash and metal burr.
3. Package outline inclusive of plating thickness.
4. Datums A and B to be determined at datum plane H.
5. Controlling dimensions are in millimeters. Inch dimensions
are shown in parenthesis. Angles in degrees.
0.20 (0.008) C
2X
14
5
8
6.00 (0.236) BSC
4.90 (0.193) BSC
0.10 (0.004) C
2X
D
0.10 (0.004) C2X
A-B
1.27 (0.050) BSC
8X 0.31 - 0.51 (0.012 - 0.020)
0.25 (0.010) MC A-B D
0.25 (0.010)
0.10 (0.004)
(0.049 - 0.065)
1.25 - 1.65
1.75 (0.069)
1.35 (0.053)
0.10 (0.004) C
8X
o
1.27 (0.050)
0.40 (0.016)
GAUGE
PLANE
0 - 8
1.04 (0.041) REF 0.25 (0.010)
BSC
SEATING
PLANE
0.25 (0.010)
0.17 (0.007)
DETAIL A
DETAIL A
SEATING PLANE
Pin 1 ID
+
++
5.45 (0.215)
1.27 (0.050) 0.60 (0.024)
1.45 (0.057)
Reference
Solder Pad
Dimensions
+
4.00 (0.157)
4
2
4
2
6
B
A
D
C
C
H
TOP VIEW
SIDE VIEW
END VIEW
PCB FOOT PRINT
Rev. F 05/18
20
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Part Ordering Information
• LinkSwitch-4 Product Family
• 4xxx Series Number
• Package Identier
D SO-8
S SOT-23- 6
• Tape & Reel and Other Options
TL Tape & Reel, 10k pcs per reel for SOT-23-6 and 2.5k pcs per reel for SO-8.
Part Ordering Table
LNK 4xxx S - TL
Product fMAX (kHz) GCAB (%) Package Marking1Tape and Reel
Part Number
*LNK4002S 65 0BBxx LNK4002S-TL
*LNK4012S 65 3GBxx LNK4012S-TL
*LNK4022S 65 6BAxx LNK4022S-TL
LNK4003S 65 0DLxx LNK4003S-TL
LNK4013S 65 3DOxx LNK4013S-TL
LNK4023S 65 6DNxx LNK4023S-TL
LNK4003D 65 0LNK4003D LNK4003D-TL
LNK4013D 65 3LNK4013D LNK4013D -TL
LNK4023D 65 6LNK4023D LNK4023D-TL
LNK4004D 65 0LNK4004D LNK4004D-TL
LNK4014D 65 3LNK4014D LNK4014D -TL
LNK4024D 65 6LNK4024D LNK4024D-TL
LNK4114D 65 3LNK4114D LNK4114D-TL
LNK4115D 65 3LNK4115D LNK4115D-TL
LNK4214D 65 3LNK4214D LNK4214D -TL
LNK4215D 65 3LNK4215D LNK4215D -TL
LNK4302S 65 0BOxx LNK4302S-TL
LNK4322S 65 6BRxx LNK4322S-TL
LNK4323S 65 6DPxx LNK4323S-TL
LNK4323D 65 6LNK4323D LNK4323D-TL
NOTES:
1. xx = Manufacturing lot code.
2. *Not recommended for new designs.
Revision Notes Date
AInitial Release. 01/27/15
B Added Over-Temperature Protection section. Added LNK4012S, LNK4013S and LNK4013D parts. 04/06/15
C Added LNK4114 and LNK4214 parts. 09/15
D Added LNK4302S, LNK4312S, LNK4322S, LNK43x2S, LNK4115D and LNK4215D parts. 05/16
E Added LNK4323S and LNK4323D parts. 06/16
F Updated IED(SINK) parameter. 05/18
For the latest updates, visit our website: www.power.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations
does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY
HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one
or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of
Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set
forth at www.power.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose
failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in signicant injury or
death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, SENZero, SCALE, SCALE-iDriver, SCALE-iFlex, Qspeed, PeakSwitch, LYTSwitch, LinkZero, LinkSwitch,
InnoSwitch, HiperTFS, HiperPFS, HiperLCS, DPA-Switch, CAPZero, Clampless, EcoSmart, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI
FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2018, Power Integrations, Inc.
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