www.austriamicrosystems.com/LDOs/AS1371 Revision 1.6 13 - 17
AS1371
Datasheet - Application In formation
9.6.2 Output Capacitor ESR
The series regulator is a negative feedback amplifier, and as such is conditionally stable. The ESR of the output capacitor is usually used to
cancel one of the open loop poles of the error amplifier in order to produce a single pole response. Excessive ESR values may actually cause
instability by excessive changes to the closed loop unity gain frequency crossover point. The range of ESR values for stability is usually shown
either by a plot of stable ESR versus load current, or a limit statement in the datasheet.
Some ceramic capacitors exhibit large capacitance and ESR variations in temperature. Z5U and Y5V capacitors may be required to ensure
stability at temperatures below TAMB = -10ºC. With X7R or X5R capacitors, a 1µF capacitor should be sufficient at all operating temperatures.
Larger output capacitor values (10µF) help to reduce noise and improve load transient-response, stability and power-supply rejection.
9.6.3 Input Capacitor
An input capacitor at VIN is required for stability. It is recommended that a 1.0µF capacitor be connected between the AS1371 power supply
input pin VIN and ground (capacitance value may be increased without limit subject to ESR limits). This capacitor must be located at a distance
of not more than 1cm from the VIN pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used
at the input.
9.6.4 Noise
The regulator output is a DC voltage with noise superimposed on the output. The noise comes from three sources; the reference, the error
amplifier input stage, and the output voltage setting resistors. Noise is a random fluctuation and if not minimized in some applications, will
produce system problems.
9.6.5 Transient Response
The series regulator is a negative feedback system, and therefore any change at the output will take a finite time to be corrected by the error
loop. This “propagation time” is related to the bandwidth of the error loop. The initial response to an output transient comes from the output
capacitance, and during this time, ESR is the dominant mechanism causing voltage transients at the output. More generally:
Units are Volts, Amps, Ohms. (EQ 16)
Thus an initial +50mA change of output current will produce a -12mV transient when the ESR=240m. Remember to keep the ESR within
stability recommendations when reducing ESR by adding multiple parallel output capacitors.
After the initial ESR transient, there follows a voltage droop during the time that the LDO feedback loop takes to respond to the output chan ge.
This drift is approx. linear in time and sums with the ESR contribution to make a total transient variation at the output of:
Units are Volts, Seconds, Farads, Ohms. (EQ 17)
Where:
CLOAD is output capacitor
T = Propagation delay of the LDO
This shows why it is convenient to increase the output capacitor value for a better support for fast load changes. Of course the formula holds for
t < “propagation time”, so that a faster LDO needs a smaller cap at the load to achieve a similar transient response. For instance 50mA load
current step produces 50mV output drop if the LDO response is 1usec and the load cap is 1µF.
There is also a steady state error caused by the finite output impedance of the regulator. This is derived from the load regulation specification
discussed above.
9.6.6 Turn On Time
This specification defines the time taken for the LDO to awake from shutdown. The time is measured from the release of the enable pin to the
time that the output voltage is within 5% of the final value. It assumes that the voltage at VIN is stable and within the regulator min and max limits.
Shutdown reduces the quiescent current to very low, mostly leakage values (<1µA).
9.6.7 Thermal Protection
To prevent operation under extreme fault conditions, such as a permanent short circuit at the output, thermal protection is built into the device.
Die temperature is measured, and when a 150ºC threshold is reached, the device enters shutdown. When the die cools sufficiently, the device
will restart (assuming input voltage exists and the device is enabled). Hysteresis of 20ºC prevents low frequency oscillation between start-up and
shutdown around the temperature thresho ld.