DESCRIPTION
The Allegro™ A1366 factory-programmable linear Hall-
effect current sensor IC has been designed to achieve high
accuracy and resolution. The goal is achieved through new
proprietary linearly interpolated temperature compensation
technology that is programmed at the Allegro factory, which
provides sensitivity and offset that are virtually flat across
the full operating temperature range. The flat performance
over temperature makes this IC ideally suited for current
sensing applications. Temperature compensation is done in
the digital domain with integrated EEPROM technology
without sacrificing the analog signal path bandwidth, making
this device ideal for HEV inverter, DC-to-DC converter, and
electric power steering (EPS) applications.
This ratiometric Hall-effect sensor IC provides a voltage output
that is proportional to the applied magnetic field. Sensitivity and
quiescent (zero field) output voltage are factory programmed
with high resolution, which provides for an accuracy of less
than ±1% typical over temperature.
The sensor IC incorporates a highly sensitive Hall element with
a BiCMOS interface integrated circuit that employs a low noise,
small-signal high-gain amplifier, as well as a low-impedance
output stage, and a proprietary, high bandwidth dynamic offset
cancellation technique. These advances in Hall-effect technology
work together to provide an industry-leading sensing resolution at
the full 120 kHz bandwidth. The device has built-in broken ground
wire detection for high reliability in automotive applications.
A1366-DS, Rev. 4
MCO-0000373
FEATURES AND BENEFITS
Factory-programmed sensitivity and quiescent output
voltage with high resolution
Proprietary segmented linear interpolated temperature
compensation (TC) technology provides a typical accu-
racy of 1% across the full operating temperature range
Extremely low noise and high resolution achieved via
proprietary Hall element and low noise amplifier circuits
120 kHz nominal bandwidth achieved via proprietary
packaging and chopper stabilization techniques
Patented circuits suppress IC output spiking during fast
current step inputs
Open circuit detection on ground pin (broken wire)
Undervoltage lockout for VCC below specification
Ratiometric sensitivity and quiescent voltage output
Precise recoverability after temperature cycling
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
Functional Block Diagram
A1366
V+
Dynamic Offset
Cancellation
EEPROM and
Control Logic
VCC
GND
VOUT
Signal Recovery
To all subcircuits
C
BYPASS
C
L
Temperature
Sensor
Offset ControlSensitivity Control
Programming
Control
Continued on the next page…
Continued on the next page…
April 26, 2019
PACKAGE: 4-pin SIP (suffix KT)
Not to scale
TN Leadform TF Leadform TG Leadform
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
2
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
SELECTION GUIDE
Part Number Leadform Package Packing* Sensitivity (Typ.)
(mV/G)
A1366LKTTF-1-T TF (Formed) 4-pin SIP 4000 pieces per 13-inch reel 1
A1366LKTTF-2-T TF (Formed) 4-pin SIP 4000 pieces per 13-inch reel 2.5
A1366LKTTF-5-T TF (Formed) 4-pin SIP 4000 pieces per 13-inch reel 5
A1366LKTTF-10-T TF (Formed) 4-pin SIP 4000 pieces per 13-inch reel 10
A1366LKTTG-1-T TG (Formed) 4-pin SIP 4000 pieces per 13-inch reel 1
A1366LKTTG-2-T TG (Formed) 4-pin SIP 4000 pieces per 13-inch reel 2.5
A1366LKTTG-5-T TG (Formed) 4-pin SIP 4000 pieces per 13-inch reel 5
A1366LKTTG-10-T TG (Formed) 4-pin SIP 4000 pieces per 13-inch reel 10
A1366LKTTN-1-T TN (Straight) 4-pin SIP 4000 pieces per 13-inch reel 1
A1366LKTTN-2-T TN (Straight) 4-pin SIP 4000 pieces per 13-inch reel 2.5
A1366LKTTN-5-T TN (Straight) 4-pin SIP 4000 pieces per 13-inch reel 5
A1366LKTTN-10-T TN (Straight) 4-pin SIP 4000 pieces per 13-inch reel 10
*Contact Allegro for additional packing options
Device parameters are specified across an extended ambient
temperature range: –40°C to 150°C. The A1366 sensor IC is provided in
an extremely thin case (1 mm thick), 4-pin SIP (single in-line package,
suffix KT) that is lead (Pb) free, with 100% matte tin leadframe plating.
Wide ambient temperature range: –40°C to 150°C
Immune to mechanical stress
Extremely thin package: 1 mm case thickness
AEC-Q100 automotive qualified
FEATURES AND BENEFITS (CONTINUED) DESCRIPTION (CONTINUED)
ABSOLUTE MAXIMUM RATINGS
Characteristic Symbol Notes Rating Unit
Forward Supply Voltage VCC 6 V
Reverse Supply Voltage VRCC –0.1 V
Forward Output Voltage VOUT 25 V
Reverse Output Voltage VROUT –0.1 V
Output Source Current IOUT(source) VOUT to GND 10 mA
Output Sink Current IOUT(sink) VCC to VOUT 10 mA
Operating Ambient Temperature TAL temperature range –40 to 150 °C
Storage Temperature Tstg –65 to 165 °C
Maximum Junction Temperature TJ(max) 165 °C
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
3
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
PINOUT DIAGRAM AND TERMINAL LIST TABLE
Terminal List Table
Number Name Function
1 VCC Input power supply, use bypass capacitor to connect to ground
2 VOUT Output signal
3 NC No connection; connect to GND for optimal ESD performance
4 GND Ground
2 3 41
Pinout Diagram
(Ejector pin mark on
opposite side)
THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information
Characteristic Symbol Test Conditions* Value Unit
Package Thermal Resistance RθJA On 1-layer PCB with exposed copper limited to solder pads 174 °C/W
*Additional thermal information available on the Allegro website
20 40 60 80 100 120 140 160 180
Temperature, T
A
(°C)
Power Dissipation, P
D
(mW)
0
300
400
200
100
600
500
800
700
900
Power Dissipation versus Ambient Temperature
(R
θJA
= 174 ºC/W)
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
4
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Continued on the next page…
COMMON OPERATING CHARACTERISTICS: Valid through the full operating temperature range, TA, CBYPASS = 0.1 µF,
VCC = 5 V, unless otherwise specified
Characteristics Symbol Test Conditions Min. Typ. Max. Unit [1]
ELECTRICAL CHARACTERISTICS
Supply Voltage VCC 4.5 5.0 5.5 V
Supply Current ICC No load on VOUT 10 15 mA
Power-On Time [2] tPO
TA = 25°C, CBYPASS = Open, CL = 1 nF, Sens =
2.5 mV/G, constant magnetic field of 320 G 78 µs
Temperature Compensation
Power-On Time [2] tTC
TA = 150°C, CBYPASS = Open, CL= 1 nF, Sens =
2.5 mV/G, constant magnetic field of 320 G 30 µs
Undervoltage Lockout (UVLO)
Threshold [2]
VUVLOH
TA = 25°C, VCC rising and device function
enabled 4 V
VUVLOL
TA = 25°C, VCC falling and device function
disabled 3.5 V
UVLO Enable/Disable Delay Time [2]
tUVLOE
TA = 25°C, CBYPASS = Open, CL = 1 nF, Sens =
2.5 mV/G, VCC Fall Time (5 V to 3 V) = 1.5 µs 64 µs
tUVLOD
TA = 25°C, CBYPASS = Open, CL = 1 nF, Sens =
2.5 mV/G, VCC Recover Time (3 V to 5 V) =
1.5 µs
14 µs
Power-On Reset Voltage [2] VPORH TA = 25°C, VCC rising 2.6 V
VPORL TA = 25°C, VCC falling 2.3 V
Power-On Reset Release Time [2] tPORR TA = 25°C, VCC rising 64 µs
Supply Zener Clamp Voltage VzTA = 25°C, ICC = 30 mA 6.5 7.5 V
Internal Bandwidth BWiSmall signal –3 dB, CL = 1 nF, TA = 25°C 120 kHz
Chopping Frequency [3] fCTA = 25°C 500 kHz
OUTPUT CHARACTERISTICS
Propagation Delay Time [2] tPD
TA = 25°C, magnetic field step of 320 G,
CL = 1 nF, Sens = 2.5 mV/G 2.2 µs
Rise Time [2] tR
TA = 25°C, magnetic field step of 320 G,
CL = 1 nF, Sens = 2.5 mV/G 3.6 µs
Response Time [2] tRESPONSE
TA = 25°C, magnetic field step of 320 G,
CL = 1 nF, Sens = 2.5 mV/G 3.7 µs
Output Saturation Voltage [2] VSAT(HIGH) TA = 25°C, RL(PULLDWN) = 10 kΩ to GND 4.7 V
VSAT(LOW) TA = 25°C, RL(PULLUP) = 10 kΩ to VCC 400 mV
Broken Wire Voltage [2] VBRK(HIGH) TA = 25°C, RL(PULLUP) = 10 kΩ to VCC VCC V
VBRK(LOW) TA = 25°C, RL(PULLDWN) = 10 kΩ to GND 100 mV
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
5
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
COMMON OPERATING CHARACTERISTICS (continued): Valid through the full operating temperature range, TA,
CBYPASS = 0.1 µF, VCC = 5 V, unless otherwise specified
Characteristics Symbol Test Conditions Min. Typ. Max. Unit [1]
OUTPUT CHARACTERISTICS (continued)
Noise BNTA = 25°C, CL = 1 nF, Bandwidth = BWi 1.1 mGRMS/¯
(Hz)
DC Output Resistance ROUT –9–Ω
Output Load Resistance RL(PULLUP) VOUT to VCC 4.7
RL(PULLDWN) VOUT to GND 4.7
Output Load Capacitance [4] CLVOUT to GND 1 10 nF
Output Slew Rate [5] SR Sens = 2.5 mV/G, CL = 1 nF 230 V/ms
ERROR COMPONENTS
Linearity Sensitivity Error [2][6] LinERR –1 < ±0.25 1 %
Symmetry Sensitivity Error [2] SymERR –1 < ±0.25 1 %
Ratiometry Quiescent Voltage Output
Error [2][7] RatERRVOUT(Q)
Through supply voltage range (relative to VCC
= 5 V) –1 0 1 %
Ratiometry Sensitivity Error [2][7] RatERRSens
Through supply voltage range (relative to VCC
= 5 V) ±1 %
[1] 1 G (gauss) = 0.1 mT (millitesla).
[2] See Characteristic Definitions section.
[3] fC varies up to approximately ± 20% over the full operating ambient temperature range, TA, and process.
[4] Output stability is maintained for capacitive loads as large as 10 nF.
[5] High-to-low transition of output voltage is a function of external load components and device sensitivity.
[6] Linearity applies to output voltage ranges of ±2 V from the quiescent output for bidirectional devices.
[7] Percent change from actual value at VCC = 5 V, for a given temperature, through the supply voltage operating range.
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
6
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A1366LKT-1-T PERFORMANCE CHARACTERISTICS [1]: TA = –40°C to 150°C, CBYPASS = 0.1 µF, VCC = 5 V,
unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Unit [2]
Sensitivity [3] SensTA Measured using 600 G, TA = 25°C 0.975 1 1.025 mV/G
Sensitivity Drift through
Temperature Range ∆SensTC
TA = 25°C to 150°C –2.5 0 2.5 %
TA = –40°C to 25°C –2.5 0 2.5 %
Sensitivity Drift Due to
Package Hysteresis ∆SensPKG
TA = 25°C, after temperature cycling, 25°C to 150°C and back
to 25°C ±1.25 %
Sensitivity Drift Over
Lifetime [4] ∆SensLIFE
TA = –40°C to 150°C, shift after AEC-Q100 grade 0 qualification
testing ±1 %
Noise VN
TA = 25°C, CL = 1 nF 3.15 mVP-P
TA = 25°C, CL = 1 nF 0.5 mVRMS
Quiescent Output Voltage [5]
VOUT(Q)TA TA = 25°C 2.490 2.500 2.510 V
VOUT(Q)HT TA = 25°C to 150°C 2.490 2.500 2.510 V
VOUT(Q)LT TA = –40°C to 25°C 2.490 2.500 2.510 V
Quiescent Output Voltage
Drift Over Lifetime [4] ∆VOUT(Q)LIFE
TA = –40°C to 150°C, shift after AEC-Q100 grade 0 qualification
testing ±2 mV
[1] See Characteristic Performance Data section for parameter distributions across temperature range.
[2] 1 G (gauss) = 0.1 mT (millitesla).
[3] This parameter may drift a maximum of ΔSensLIFE over lifetime.
[4] Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, cannot be guaranteed. Drift is a
function of customer application conditions. Contact Allegro MicroSystems for further information.
[5] This parameter may drift a maximum of ΔVOUT(Q)LIFE over lifetime.
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
7
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A1366LKT-2-T PERFORMANCE CHARACTERISTICS [1]: TA = –40°C to 150°C, CBYPASS = 0.1 µF, VCC = 5 V,
unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Unit [2]
Sensitivity [3] SensTA Measured using 400 G, TA = 25°C 2.437 2.5 2.563 mV/G
Sensitivity Drift through
Temperature Range ∆SensTC
TA = 25°C to 150°C –2.5 0 2.5 %
TA = –40°C to 25°C –2.5 0 2.5 %
Sensitivity Drift Due to
Package Hysteresis ∆SensPKG
TA = 25°C, after temperature cycling, 25°C to 150°C and back
to 25°C ±1.25 %
Sensitivity Drift Over
Lifetime [4] ∆SensLIFE
TA = –40°C to 150°C, shift after AEC-Q100 grade 0 qualification
testing ±1 %
Noise VN
TA = 25°C, CL = 1 nF 7.875 mVP-P
TA = 25°C, CL = 1 nF 1.25 mVRMS
Quiescent Output Voltage [5]
VOUT(Q)TA TA = 25°C 2.490 2.500 2.510 V
VOUT(Q)HT TA = 25°C to 150°C 2.490 2.500 2.510 V
VOUT(Q)LT TA = –40°C to 25°C 2.490 2.500 2.510 V
Quiescent Output Voltage
Drift Over Lifetime [4] ∆VOUT(Q)LIFE
TA = –40°C to 150°C, shift after AEC-Q100 grade 0 qualification
testing ±2 mV
[1] See Characteristic Performance Data section for parameter distributions across temperature range.
[2] 1 G (gauss) = 0.1 mT (millitesla).
[3] This parameter may drift a maximum of ΔSensLIFE over lifetime.
[4] Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, cannot be guaranteed. Drift is a
function of customer application conditions. Contact Allegro MicroSystems for further information.
[5] This parameter may drift a maximum of ΔVOUT(Q)LIFE over lifetime.
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
8
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A1366LKT-5-T PERFORMANCE CHARACTERISTICS [1]: TA = –40°C to 150°C, CBYPASS = 0.1 µF, VCC = 5 V, unless
otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Unit [2]
Sensitivity [3] SensTA Measured using 200 G, TA = 25°C 4.875 5 5.125 mV/G
Sensitivity Drift through
Temperature Range ∆SensTC
TA = 25°C to 150°C –2.5 0 2.5 %
TA = –40°C to 25°C –2.5 0 2.5 %
Sensitivity Drift Due to
Package Hysteresis ∆SensPKG
TA = 25°C, after temperature cycling, 25°C to 150°C and back
to 25°C ±1.25 %
Sensitivity Drift Over
Lifetime [4] ∆SensLIFE
TA = –40°C to 150°C, shift after AEC-Q100 grade 0 qualification
testing ±1 %
Noise VN
TA = 25°C, CL = 1 nF 15.75 mVP-P
TA = 25°C, CL = 1 nF 2.5 mVRMS
Quiescent Output Voltage [5]
VOUT(Q)TA TA = 25°C 2.490 2.500 2.510 V
VOUT(Q)HT TA = 25°C to 150°C 2.490 2.500 2.510 V
VOUT(Q)LT TA = –40°C to 25°C 2.490 2.500 2.510 V
Quiescent Output Voltage
Drift Over Lifetime [4] ∆VOUT(Q)LIFE
TA = –40°C to 150°C, shift after AEC-Q100 grade 0 qualification
testing ±2 mV
[1] See Characteristic Performance Data section for parameter distributions across temperature range.
[2] 1 G (gauss) = 0.1 mT (millitesla).
[3] This parameter may drift a maximum of ΔSensLIFE over lifetime.
[4] Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, cannot be guaranteed. Drift is a
function of customer application conditions. Contact Allegro MicroSystems for further information.
[5]This parameter may drift a maximum of ΔVOUT(Q)LIFE over lifetime.
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
9
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A1366LKT-10-T PERFORMANCE CHARACTERISTICS [1]: TA = –40°C to 150°C, CBYPASS = 0.1 µF, VCC = 5 V,
unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Unit [2]
Sensitivity [3] SensTA Measured using 100 G, TA = 25°C 9.75 10 10.25 mV/G
Sensitivity Drift through
Temperature Range ∆SensTC
TA = 25°C to 150°C –2.5 0 2.5 %
TA = –40°C to 25°C –2.5 0 2.5 %
Sensitivity Drift Due to
Package Hysteresis ∆SensPKG
TA = 25°C, after temperature cycling, 25°C to 150°C and back
to 25°C ±1.25 %
Sensitivity Drift Over
Lifetime [4] ∆SensLIFE
TA = –40°C to 150°C, shift after AEC-Q100 grade 0 qualification
testing ±1 %
Noise VN
TA = 25°C, CL = 1 nF 31.5 mVP-P
TA = 25°C, CL = 1 nF 5 mVRMS
Quiescent Output Voltage [5]
VOUT(Q)TA TA = 25°C 2.485 2.500 2.515 V
VOUT(Q)HT TA = 25°C to 150°C 2.485 2.500 2.515 V
VOUT(Q)LT TA = –40°C to 25°C 2.485 2.500 2.515 V
Quiescent Output Voltage Drift
Over Lifetime [4] ∆VOUT(Q)LIFE
TA = –40°C to 150°C, shift after AEC-Q100 grade 0 qualification
testing ±2 mV
[1] See Characteristic Performance Data section for parameter distributions across temperature range.
[2] 1 G (gauss) = 0.1 mT (millitesla).
[3] This parameter may drift a maximum of ΔSensLIFE over lifetime.
[4] Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, cannot be guaranteed. Drift is a
function of customer application conditions. Contact Allegro MicroSystems for further information.
[5] This parameter may drift a maximum of ΔVOUT(Q)LIFE over lifetime.
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
10
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Propagaon Delay (t
PD
)
4
00 G excitaon signal with 10%-90% rise me = 1 µs
S
ensivity = 2 mV/G, CBYPASS=0.1 µF, CL=1 nF
Input = 400 G Excitaon Signal
20% of Input
tPD = 2.2 µs
20% of Output
Output (VOUT, mV)
CHARACTERISTIC PERFORMANCE DATA
Response Time (t
RESPONSE
)
4
00 G excitaon signal with 10%-90% rise time = 1 µs
S
ensivity = 2 mV/G,
C
BYPASS=0.1 µF,
C
L=1 nF
Input = 400 G Excitaon Signal
80% of Input
t
RESPONSE
= 3.7 µs
80% of Output
Output (V
OUT
, mV)
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
11
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Power-On Time(t
PO
)
400 G constant excitaon signal, with VCC 10%-90% rise me = 1.5 µs
Sensivity = 2 mV/G, C
BYPASS
= Open, C
L
=1 nF
VCC(min)
Supply (VCC, V)
tPO = 78 µs
90% of Output
Output (VOUT, V)
Rise Time (t
R
)
4
00 G excitaon signal with 10%-90% rise me = 1 µs
S
ensivity = 2 mV/G, CBYPASS=0.1 µF, CL=1 nF
Input = 400 G Excitaon Signal
10% of Output
t
R
= 3.6 µs
90% of Output
Output (V
OUT
, mV)
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
12
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
VCC(min)
Supply (VCC, V)
tUVLOD = 12 µs
90% of Output
Output (VOUT, V)
UVLO Disable Time (t
UVLOD
)
VCC 3 V-5 V recovery me = 1.5 µs
Sensivity = 2 mV/G,
C
BYPASS
= Open,
C
L
=1 nF
UVLO Enable Time (t
UVLOE
)
V
CC
5 V-3 V fall me = 1.5 µs
Sensivity = 2 mV/G, C
BYPASS
=Open, C
L
=1 nF
V
UVLOL
Supply (V
CC
, V)
t
UVLOE
= 63.6 µs
Output = 0 V
Output (V
OUT
, V)
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
13
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
CHARACTERISTIC DEFINITIONS
Power-On Time (tPO). When the supply is ramped to its operat-
ing voltage, the device requires a finite time to power its internal
components before responding to an input magnetic field.
Power-On Time, tPO , is defined as: the time it takes for the output
voltage to settle within ±10% of its steady state value under an
applied magnetic field, after the power supply has reached its
minimum specified operating voltage, VCC(min), as shown in
figure 1.
Temperature Compensation Power-On Time (tTC
). After
Power-On Time, tPO , elapses, tTC is also required before a valid
temperature compensated output.
Propagation Delay (tPD). The time interval between a) when
the applied magnetic field reaches 20% of it’s final value, and b)
when the output reaches 20% of its final value (see figure 2).
Rise Time (tR). The time interval between a) when the sensor IC
reaches 10% of its final value, and b) when it reaches 90% of its
final value (see Figure 2).
Response Time (tRESPONSE). The time interval between a) when
the applied magnetic field reaches 80% of its final value, and b)
when the sensor reaches 80% of its output corresponding to the
applied magnetic field (see Figure 3).
Quiescent Voltage Output (VOUT(Q)). In the quiescent state (no
significant magnetic field: B = 0 G), the output, VOUT(Q) , has a
Figure 1: Power-on Time definition
Figure 2: Propagation Delay and Rise Time definitions
Figure 3: Response Time definition
V
+t
VCC
VCC(min.)
VOUT
90% VOUT
0
t1= time at which power supply reaches
minimum specified operating voltage
t2=
time at which output voltage settles
within ±10% of its steady state value
under an applied magnetic field
t1t2
tPO
V
CC
(typ.)
Applied Magnetic Field
Transducer Output
90
10
20
0
(%)
Propagation Delay, tPD
Rise Time, tR
t
Applied Magnetic Field
Transducer Output
80
0
(%)
Response Time, t
RESPONSE
t
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
14
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
constant ratio to the supply voltage, VCC , throughout the entire
operating ranges of VCC and ambient temperature, TA
.
Sensitivity (Sens). The presence of a south polarity magnetic
field, perpendicular to the branded surface of the package face,
increases the output voltage from its quiescent value toward the
supply voltage rail. The amount of the output voltage increase is
proportional to the magnitude of the magnetic field applied.
Conversely, the application of a north polarity field decreases the
output voltage from its quiescent value. This proportionality is
specified as the magnetic sensitivity, Sens (mv/G), of the device,
and it is defined as:
VOUT(BPOS) VOUT(BNEG)
BPOS – BNEG
Sens =,
(1)
where BPOS and BNEG are two magnetic fields with opposite
polarities.
Sensitivity Drift Through Temperature Range (ΔSensTC ).
Second order sensitivity temperature coefficient effects cause the
magnetic sensitivity, Sens, to drift from its expected value over
the operating ambient temperature range, TA . The Sensitivity
Drift Through Temperature Range, ∆SensTC , is defined as:
SensTA – SensEXPECTED(TA)
SensEXPECTED(TA)
SensTC =×
100%
.
(2)
Sensitivity Drift Due to Package Hysteresis (ΔSensPKG ).
Package stress and relaxation can cause the device sensitivity at TA
= 25°C to change during and after temperature cycling. The sensi-
tivity drift due to package hysteresis, ∆SensPKG
, is defined as:
(25°C)2
(25°C)1
Sens(25°C)1
SensPKG =×
100% ,
(3)
where Sens(25°C)1 is the programmed value of sensitivity at TA
= 25°C, and Sens(25°C)2 is the value of sensitivity at TA = 25°C,
after temperature cycling TA up to 150°C and back to 25°C.
Linearity Sensitivity Error (LinERR ). The A1366 is designed to
provide a linear output in response to a ramping applied magnetic
field. Consider two magnetic fields, B1 and B2. Ideally, the sen-
sitivity of a device is the same for both fields, for a given supply
voltage and temperature. Linearity error is present when there is a
difference between the sensitivities measured at B1 and B2.
Linearity Error. is calculated separately for the positive
(LinERRPOS
) and negative (LinERRNEG
) applied magnetic fields.
Linearity Error (%) is measured and defined as:
Sens
BPOS2
SensBPOS1
SensBNEG2
SensBNEG1
1–
LinERRPOS =×
100% ,
1–
LinERRNEG =×
100% ,
(4)
where:
|VOUT(Bx) VOUT(Q)|
Bx
SensBx=,
(5)
and BPOSx and BNEGx are positive and negative magnetic
fields, with respect to the quiescent voltage output such that
|BPOS2| = 2 × |BPOS1| and |BNEG2| = 2 × |BNEG1|.
Then:
Lin
ERR
max(
Lin
ERRPOS
, Lin
ERRNEG
)
=
.
(6)
Symmetry Sensitivity Error (SymERR ). The magnetic sensitiv-
ity of an A1366 device is constant for any two applied magnetic
fields of equal magnitude and opposite polarities. Symmetry
Error, SymERR (%), is measured and defined as:
SensBPOS
Sens
BNEG
1–
SymERR =×
100% ,
(7)
where SensBx is as defined in equation 7, and BPOSx and
BNEGx are positive and negative magnetic fields such that
|BPOSx| = |BNEGx|.
Ratiometry Error (RatERR ). The A1366 device features ratio-
metric output. This means that the Quiescent Voltage Output,
VOUT(Q)
, and magnetic sensitivity, Sens, are proportional to the
Supply Voltage, VCC. In other words, when the supply voltage
increases or decreases by a certain percentage, each characteristic
also increases or decreases by the same percentage. Error is the
difference between the measured change in the supply voltage
relative to 5 V, and the measured change in each characteristic.
The ratiometric error in Quiescent Voltage Output,
RatERRVOUT(Q) (%), for a given supply voltage, VCC
, is defined
as:
VOUT(Q)(VCC) / VOUT(Q)(5V)
V
CC
/ 5 V
1–
RatERRVOUT(Q) =×
100%
.
(8)
The ratiometric error in magnetic sensitivity, RatERRSens (%), for
a given Supply Voltage, VCC
, is defined as:
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
15
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Sens(VCC) / Sens(5V)
VCC / 5 V
1–
RatERRSens =×
100% .
Power-On Reset Voltage (VPOR
). On power-up, to initialize
to a known state and avoid current spikes, the A1366 is held in
a Reset state. The Reset signal is disabled when VCC reaches
VUVLOH
and time tPORR has elapsed, allowing the output voltage
to go from a high impedance state into normal operation. Dur-
ing power-down, the Reset signal is enabled when VCC reaches
VPORL , causing the output voltage to go into a high impedance
state. (Note that detailed description of POR and UVLO opera-
tion can be found in the Functional Description section).
Power-On Reset Release Time (tPORR). When VCC rises to
VPORH , the Power-On Reset Counter starts. The A1366 output
voltage will transition from a high impedance state to normal
operation only when the Power-On Reset Counter has reached
tPORR and VCC has exceeded VUVLOH .
Undervoltage Lockout Threshold (VUVLO
). If VCC drops below
VUVLOL output voltage will be locked to GND. If VCC starts ris-
ing, the A1366 will come out of the Lock state when VCC reaches
VUVLOH
.
UVLO Enable/Disable Delay Time (tUVLO
). When a falling VCC
reaches VUVLOL , time tUVLOE is required to engage Undervoltage
Lockout state. When VCC rises above VUVLOH , time tUVLOD is
required to disable UVLO and have a valid output voltage.
Broken Wire Voltage (VBRK ). If the GND pin is disconnected
(broken wire event), the output voltage will go to VBRK(HIGH) (if
a load resistor is connected to VCC) or to VBRK(LOW) (if a load
resistor is connected to GND).
(9)
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
16
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
FUNCTIONAL DESCRIPTION
Power-On Reset (POR) and Undervoltage Lockout
(UVLO) Operation
The descriptions in this section assume: temperature = 25°C, no
output load (RL, CL
) , and no significant magnetic field is present.
Power-Up. At power-up, as VCC ramps up, the output is in a
high impedance state. When VCC crosses VPORH (location [1]
in Figure 4 and [1'] in Figure 5), the POR Release counter starts
counting for tPORR= 64 µs. At this point, if VCC exceeds VUVLOH
= 4 V [2'], the output will go to VCC / 2 after tUVLOD = 14 µs [3'].
If VCC does not exceed VUVLOH = 4 V [2], the output will stay in
the high impedance state until VCC reaches VUVLOH = 4 V [3] and
then will go to VCC / 2 after tUVLOD = 14 µs [4].
VCC drops below VCC(min)= 4.5 V. If VCC drops below VUVLOL
[4', 5], the UVLO Enable Counter starts counting. If VCC is still
below VUVLOL when counter reaches tUVLOE = 64 µs, the UVLO
function will be enabled and the ouput will be pulled near GND
[6]. If VCC exceeds VUVLOL before the UVLO Enable Counter
reaches 64 µs [5'] , the output will continue to be VCC
/ 2.
Coming out of UVLO. While UVLO is enabled [6] , if
VCC exceeds VUVLOH [7] , UVLO will be disabled after
tUVLOD =14 µs, and the output will be VCC / 2 [8].
Power-Down. As VCC ramps down below VUVLOL [6’, 9], the
UVLO Enable Counter will start counting. If VCC is higher than
VPORL = 2.3 V when the counter reaches tUVLOE = 64 µs, the
UVLO function will be enabled and the ouput will be pulled
near GND [10]. The output will enter a high impedance state as
VCC goes below VPORL [11]. If VCC falls below VPORL before the
UVLO Enable Couner reaches 64 µs, the output will transition
directly into a high impedance state [7'].
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
17
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
tUVLOE =
64 µs
tPORR =
64 µs
tPORR =
64 µs
tUVLOD =
14 µs
<
64 µs
tUVLOD = 14 µs
tUVLOD =
14 µs
t
UVLOE
=
64 µs
1
1 2 4 5 6’ 7’
3
2
5.0
VUVLOH 4.0
VUVLOH 4.0
VPORH 2.6
VPORL 2.3
VPORH 2.6
VPORL 2.3
VUVLOL 3.5
VUVLOL 3.5
2.5
High Impedance High Impedance
High Impedance High Impedance
Slope =
VCC /
2
Slope =
VCC /
2
GND Time
Time
Time
Time
GND
VCC
VCC
VOUT
5.0
2.5
GND
GND
VOUT
356711
8
10
9
4
Slope =
VCC /
2
<
64 µs
Figure 4: POR and UVLO Operation: Slow Rise Time case
Figure 5: POR and UVLO Operation: Fast Rise Time case
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
18
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
GND
A
Connecting VOUT to RL(PULLUP)
VOUT
A1366
VCC
VCC VCC
RL(PULLUP)
GND
A
VOUT
A1366
VCC
VCC
RL(PULLDWN)
Connecting VOUT to RL(PULLDWN)
R
L(typ)
BYPASS
L(PULLDWN)
GND
VOUT
A1366
VCC
V+
CC
Typical Application Drawing
Figure 6: Connections for Detecting Broken Ground Wire
Detecting Broken Ground Wire
If the GND pin is disconnected, node A becoming open
(Figure 6), the VOUT pin will go to a high impedance state. Out-
put voltage will go to VBRK(HIGH) if a load resistor RL(PULLUP) is
connected to VCC or to VBRK(LOW) if a load resistor RL(PULLDWN)
is connected to GND. The device will not respond to any applied
magnetic field.
If the ground wire is reconnected, A1366 will resume normal
operation.
EEPROM Error Checking And Correction
Hamming code methodology is implemented for EEPROM
checking and correction. The device has ECC enabled after
power-up. If an uncorrectable error has occurred, the VOUT pin
will go to high impedance and the device will not respond to
applied magnetic field.
Output voltage will go to VBRK(HIGH) if a load resistor
RL(PULLUP) is connected to VCC or to VBRK(LOW) if a load resistor
RL(PULLDOWN) is connected to GND.
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
19
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for total
accuracy is the small signal voltage developed across the Hall
element. This voltage is disproportionally small relative to the
offset that can be produced at the output of the Hall sensor. This
makes it difficult to process the signal while maintaining an accu-
rate, reliable output over the specified operating temperature and
voltage ranges. Chopper stabilization is a unique approach used
to minimize Hall offset on the chip.
The Allegro technique removes key sources of the output drift
induced by thermal and mechanical stresses. This offset reduction
technique is based on a signal modulation-demodulation process.
The undesired offset signal is separated from the magnetic field-
induced signal in the frequency domain, through modulation. The
subsequent demodulation acts as a modulation process for the
offset, causing the magnetic field-induced signal to recover its
original spectrum at base band, while the DC offset becomes a
high-frequency signal. The magnetic-sourced signal then can pass
through a low-pass filter, while the modulated DC offset is sup-
pressed. This high-frequency operation allows a greater sampling
rate, which results in higher accuracy and faster signal-processing
capability. This approach desensitizes the chip to the effects
of thermal and mechanical stresses, and produces devices that
have extremely stable quiescent Hall output voltages and precise
recoverability after temperature cycling. This technique is made
possible through the use of a BiCMOS process, which allows the
use of low-offset, low-noise amplifiers in combination with high-
density logic integration and a proprietary, dynamic notch filter.
The new Allegro filtering techniques are far more effective at
suppressing chopper induced signal noise compared to the previ-
ous generation of Allegro chopper stabilized devices.
Concept of Chopper Stabilization
Amp
Regulator
Clock/Logic
Hall Element
Tuned
Filter
Anti-Aliasing
LP Filter
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
20
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
DThermoplastic Molded Lead Bar for alignment during shipment
Active Area Depth 0.37 mm REF
Hall element, not to scale
0.54
REF
0.54
REF
12.14±0.05
1.27 NOM
0.89
MAX
0.89
MAX
10°
2.60
1.00
2 431
A
D
F
F
E
E
5.21 +0.08
–0.05
5.21 +0.08
–0.05
3.43 +0.08
–0.05
0.41 +0.08
–0.05
1.50 +0.08
–0.05
0.20 +0.08
–0.05
1.00 +0.08
–0.05
1.00 +0.08
–0.05
Mold Ejector
Pin Indent
Branded
Face
For Reference Only; not for tooling use (reference DWG-9202)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Gate and tie bar burr area
A
B
B
C
C
Dambar removal protrusion (16X)
Standard Branding Reference View
N = Device part number
Y = Last two digits of year of manufacture
W = Week of manufacture
YYWW
NNNN
1
Branding scale and appearance at supplier discretion
F
F
Package KT, 4-Pin SIP, TN Leadform
PACKAGE OUTLINE DRAWING
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
21
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package KT, 4-Pin SIP, TF Leadform
NOTES:
1) LEAD TRIM AND FORMING OPERATIONS PERFORMED ON
ALLEGRO SUPPLIED MATERIAL.
2) FOR DIMENSIONS AND TOLERANCING ON SUPPLIED
DEVICES, REFER TO ALLEGRO DWG-9202.
3) TRUE POSITION AND PROFILE TOLERANCE APPLIES ALONG
EACH LEAD IN A ZONE STARTING FROM THE LEAD TIP AND
ENDING NO MORE THAN 10 mm IN FROM THE TIP.
R.20 (4×)
A
(3.43)
(5.21)
(9.33)
(9.54)
LEADS PRIOR
TO BENDING
PIN 1
ACTIVE
SURFACE
4.5
2.4
C
B
1
C
2
B
1
A
2
A
1
B
3
A
0.6
2.352.35
AA
BB
0.4 C
(4×) SEE NOTE 3
1.97
3.24
0.70
4.51
0.41
PIN 1
PIN 2
PIN 4
PIN 3
SECTION A-A
(PINS 1 AND 4)
SCALE 5:1
5.49
4.30
91.3° ±1.0°
A
B(REF)
0.20 A B
0.2 D
(PIN 1) SEE NOTE 3
(PIN 4) SEE NOTE 3
D
SECTION B-B
(PINS 2 AND 3)
SCALE 5:1
5.49
A
91.3° ±1.0°
4.30
B
0.15 E
(PIN 3) SEE NOTE 3
0.20 A B
E
(PIN 2) SEE NOTE 3
(REF) METRIC TOLERANCES
X ± 10%
X.X ± 0.25
X.XX ± 0.10
X.XXX ± 0.025
ANGULAR ± 0.5°
ALL SURFACES TO BE 32 µin
(0.80 µm) OR BETTER
BREAK ALL SHARP EDGES 0.015"
× 0.015" (0.4 mm × 0.4 mm)
HOLD ALL DIMS AFTER
PLATING
REFERENCE DWG-0000425
0.762
5.2
0.508
4.7
PCB LAYOUT REFERENCE VIEW
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
22
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package KT, 4-Pin SIP, TG Leadform
NOTES:
1) LEAD TRIM AND FORMING OPERATIONS PERFORMED ON
ALLEGRO SUPPLIED MATERIAL.
2) FOR DIMENSIONS AND TOLERANCING ON SUPPLIED
DEVICES, REFER TO ALLEGRO DWG-9202.
3) TRUE POSITION AND PROFILE TOLERANCE APPLIES ALONG
EACH LEAD IN A ZONE STARTING FROM THE LEAD TIP AND
ENDING NO MORE THAN 10 mm IN FROM THE TIP.
METRIC TOLERANCES
X ± 10%
X.X ± 0.25
X.XX ± 0.10
X.XXX ± 0.025
ANGULAR ± 0.5°
ALL SURFACES TO BE 32 µin
(0.80 µm) OR BETTER
BREAK ALL SHARP EDGES 0.015"
× 0.015" (0.4 mm × 0.4 mm)
HOLD ALL DIMS AFTER
PLATING
REFERENCE DWG-0000622
PIN 1
ACTIVE
SURFACE
91.3° ±1.3° 91.3° ±1.3° 2.30
2.30
0.4 B
// 0.2 CZ B
PINS 1,4
0.4 B
// 0.15 CZ B
PINS 2,3
4.3
4.1
3.81
1.27
2.54
ZERO POINT FOR
LEAD TIP POSITION
MEASUREMENT
PIN 1
PIN 2
PIN 4
PIN 3
0.4 AB
4 LEAD TIPS
A
DATUM TARGETS
SCALE 10 : 1
(5.2) C
A1
A3
0.6 0.6
PIN 1
2.54
1.7
2.3
A2
B1
B2
C1
C2
B
0.762
5.2
0.508
4.7
PCB LAYOUT REFERENCE VIEW
Low Noise, High Precision, Factory-Programmed Linear Hall-Effect Sensor IC
with Advanced Temperature Compensation and High Bandwidth (120 kHz) Analog Output
A1366
23
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
REVISION HISTORY
Number Date Description
May 1, 2014 Initial release
1 January 30, 2018 Added EEPROM Error Checking and Correction section (page 18)
2 January 28, 2019 Minor editorial updates
3 March 18, 2019 Added TF and TG leadforms
4 April 26, 2019 Added TF and TG footprints
For the latest version of this document, visit our website:
www.allegromicro.com
Copyright 2019, Allegro MicroSystems.
Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit
improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor
for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.