Data Sheet 1 of 10 Rev. 03, 2007-03-09
All published data at TCASE = 25°C unless otherwise indicated
ESD: Electrostatic discharge sensitive device—observe handling precautions!
PTFA081501E
PTFA081501F
Description
The PTFA081501E and PTFA081501F are thermally-enhanced,
150-watt, internally matched GOLDMOS® FETs intended for ultra-
linear applications. They are characaterized for CDMA and
CDMA2000 operation from 864 to 900 MHz. Thermally-enhanced
packages provide the coolest operation available. Full gold
metallization ensures excellent device lifetime and reliability.
PTFA081501E
Package H-30248-2
Thermally-Enhanced High Power RF LDMOS FETs
150 W, 864 – 900 MHz
IS-95 CDMA Performance
VDD = 28 V, IDQ = 950 mA, ƒ = 900 MHz
0
10
20
30
40
50
32 34 36 38 40 42 44 46 48
Output Power (dBm), Avg.
Drain Efficiency (%)
-80
-70
-60
-50
-40
-30
Adjacent Channel Power
Ratio (dBc)
TCASE = 25°C
TCASE = 90°C
Efficiency Alt1 1.98 MHz
Adj 750 kHz
RF Characteristics
CDMA2000 3-Carrier Measurements (not subject to production test—verified by design/characterization in Infineon test
fixture)
VDD = 28 V, IDQ = 950 mA, POUT = 35 W average, ƒ = 900 MHz
Characteristic Symbol Min Typ Max Unit
Gain Gps —18 —dB
Drain Efficiency ηD—34 —%
Adjacent Channel Power Ratio ACPR —–50 —dBc
PTFA081501F
Package H-31248-2
Features
•Thermally-enhanced packages, Pb-free and
RoHS-compliant
•Broadband internal matching
•Typical CDMA2000 performance at 900 MHz, 28 V
- Average output power = 35 W
- Linear Gain = 18 dB
- Efficiency = 34%
- Adjacent channel power = –50 dBc
•Typical CW performance, 900 MHz, 28 V
- Output power at P–1dB = 165 W
- Efficiency = 62%
•Integrated ESD protection: Human Body Model,
Class 2 (minimum)
•Excellent thermal stability, low HCI drift
•Capable of handling 10:1 VSWR @ 28 V,
170 W (CW) output power
*See Infineon distributor for future availability.
PTFA081501E
PTFA081501F
Data Sheet 2 of 10 Rev. 03, 2007-03-09
RF Characteristics (cont.)
Two-tone Measurements (tested in Infineon test fixture)
VDD = 28 V, IDQ = 950 mA, POUT = 150 W PEP, ƒ = 900 MHz, tone spacing = 1 MHz
Characteristic Symbol Min Typ Max Unit
Gain Gps 17 18 —dB
Drain Efficiency ηD44 46 —%
Intermodulation Distortion IMD —–30 –28 dBc
DC Characteristics
Characteristic Conditions Symbol Min Typ Max Unit
Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V
Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 1.0 µA
VDS = 63 V, VGS = 0 V IDSS — — 10.0 µA
On-State Resistance VGS = 10 V, VDS = 0.1 V RDS(on) —0.07 —Ω
Operating Gate Voltage VDS = 28 V, IDQ = 950 mA VGS 2.0 2.48 3.0 V
Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 1.0 µA
Maximum Ratings
Parameter Symbol Value Unit
Drain-Source Voltage VDSS 65 V
Gate-Source Voltage VGS –0.5 to +12 V
Junction Temperature TJ200 °C
Total Device Dissipation PD449 W
Above 25°C derate by 2.56 W/°C
Storage Temperature Range TSTG –40 to +150 °C
Thermal Resistance (TCASE = 70°C, 150 W CW) RθJC 0.39 °C/W
Ordering Information
Type Package Outline Package Description Marking
PTFA081501E H-30248-2 Thermally-enhanced slotted flange, single-ended PTFA081501E
PTFA081501F H-31248-2 Thermally-enhanced earless flange, single-ended PTFA081501F
*See Infineon distributor for future availability.
PTFA081501E
PTFA081501F
Data Sheet 3 of 10 Rev. 03, 2007-03-09
Intermodulation Distortion vs. Output Power
(as measured in a broadband circuit)
VDD = 28 V, IDQ = 950 mA, ƒ1 = 899 MHz, ƒ2 = 900 MHz
-80
-70
-60
-50
-40
-30
-20
35 38 41 44 47 50
Output Power, Avg. (dBm)
IMD (dBc)
3rd Order
7th
5th
IM3 vs. Output Power at Selected Biases
VDD = 28 V, ƒ1 = 899 MHz, ƒ2 = 900 MHz
-60
-55
-50
-45
-40
-35
-30
-25
36 38 40 42 44 46 48 50
Output Power, Avg. (dBm)
IMD (dBc)
IDQ = 950 mA
IDQ = 675 mA
IDQ = 1125 mA
Broadband CW Performance
VDD = 28 V, IDQ = 950 mA, POUT = P–1dB
16
17
18
19
20
864 870 876 882 888 894 900
Frequency (MHz)
Gain (dB)
50
55
60
65
70
Efficiency (%), Output Power (dBm)
Gain
Output Power
Efficiency
Linear Broadband Performance
VDD = 28 V, IDQ = 950 mA, POUT Avg. = 48.75 dBm
20
25
30
35
40
45
50
864 873 882 891 900
Frequency (MHz)
Efficiency (%)
-30
-20
-10
0
10
20
30
Gain (dB), Return Loss (dB)
Gain
Return Loss
Efficiency
Typical Performance (data taken in a production test fixture)
PTFA081501E
PTFA081501F
Data Sheet 4 of 10 Rev. 03, 2007-03-09
Output Power (at 1 dB Compression)
vs. Supply Voltage
IDQ = 950 mA, ƒ = 900 MHz
51.0
51.5
52.0
52.5
53.0
53.5
54.0
24 26 28 30 32
Supply Voltage (V)
Output Power (dBm)
Three-carrier CDMA 2000 Performance
VDD = 28 V, IDQ = 950 mA, ƒ = 900 MHz
0
10
20
30
40
50
36 38 40 42 44 46 48 50
Output Power (dBm), Avg.
Drain Efficiency (%)
-60
-55
-50
-45
-40
-35
Adj. Ch. Power Ratio (dBc)
Efficiency
ACP Up
ALT Up
ACP Low
Power Sweep
VDD = 28 V, ƒ = 900 MHz
17
18
19
36 38 40 42 44 46 48 50 52 54
Output Power (dBm)
Power Gain (dB)
IDQ = 1350 mA
IDQ = 450 mA
IDQ = 950 mA
Gain & Efficiency vs. Output Power
VDD = 28 V, IDQ = 950 mA, ƒ = 900 MHz
14
15
16
17
18
19
20
21
36 38 40 42 44 46 48 50 52 54
Output Power (dBm)
Gain (dB)
0
10
20
30
40
50
60
70
Drain Efficiency (%)
Efficiency
Gain
Typical Performance (cont.)
PTFA081501E
PTFA081501F
Data Sheet 5 of 10 Rev. 03, 2007-03-09
Z Source Z Load
G
S
D
Frequency Z Source ΩZ Load Ω
MHz RjX RjX
864 13.20 4.69 1.35 4.73
873 13.30 4.75 1.28 4.80
882 13.85 4.94 1.14 4.99
891 14.59 5.00 1.06 5.27
900 15.01 4.91 1.01 5.43
Broadband Circuit Impedance
0.1
0.3
0
.
5
0.2
0.4
0.1
-
W
AV
E
LE
N
GT
H
ST
O
W
AR
D
G
E
A
D
-
0
.0
Z Source
Z Load
864 MHz
900 MHz
864 MHz
900 MHz
Z0 = 50 Ω
Typical Performance (cont.)
Bias Voltage vs. Temperature
Voltage normalized to typical gate voltage,
series show current
0.96
0.97
0.98
0.99
1.00
1.01
1.02
1.03
-20 0 20 40 60 80 100
Case Temperature (°C)
Normalized Bias Voltage (V)
1.56 A
3.10 A
4.66 A
6.22 A
7.76 A
9.32 A
10.88 A
12.44 A
14.00 A
PTFA081501E
PTFA081501F
Data Sheet 6 of 10 Rev. 03, 2007-03-09
a0 8150 1ef_sch
33pF33pF
7.5pF
7.5pF
2.1pF
33pF 1µF 10µF
50V
10µF
50V
VDD
l1
l7
l8
10V
R8
DUT
RF_IN
C13 C14 C17C15
C23
C24C9
C26
RF_OUT
0.1µF
C5
10µF
35V
C4
5.1K
R7 0.1 µF
C6
C10
33pF
C8
l2l3l4l6
7.5pF
C11
10pF
C12
l5
C16
0.1µF
L1
33pF 1µF 10µF
50V
C18 C19 C20
L2
10µF
50V
C22C21
0.1µF
l9l10 l11 l13
2.7pF
C25
l12
0.5pF
C27
0.01 µF
C7
10V
R6
R3
2K V
R4
2K V
C3
0.001µF
C2
0.001µF
BCP56
R2
1.3K VR1
1.2K V
LM7805
C1
0.001µF
VDD
QQ1
Q1
R5
5.1V
Reference Circuit
Reference circuit block diagram for ƒ = 900 MHz
Circuit Assembly Information
DUT PTFA081501E or PTFA081501F LDMOS Transistor
PCB 0.76 mm [.030"] thick, εr = 4.5 Rogers TMM4 2 oz. copper
Microstrip Electrical Characteristics at 900 MHz1Dimensions: L x W (mm) Dimensions: L x W (in.)
l10.016 λ, 50.0 Ω2.90 x 1.35 0.114 x 0.053
l20.053 λ, 50.0 Ω9.40 x 1.35 0.370 x 0.053
l30.102 λ, 50.0 Ω18.29 x 1.35 0.720 x 0.053
l40.045 λ, 50.0 Ω8.10 x 1.35 0.319 x 0.053
l50.153 λ, 68.0 Ω27.43 x 0.76 1.080 x 0.030
l60.058 λ, 7.5 Ω9.40 x 16.26 0.370 x 0.640
l7, l80.125 λ, 50.0 Ω22.61 x 1.27 0.890 x 0.050
l90.036 λ, 7.9 Ω5.72 x 15.24 0.225 x 0.600
l10 0.141 λ, 7.9 Ω22.61 x 15.24 0.890 x 0.600
l11 0.149 λ, 38.0 Ω26.16 x 2.16 1.030 x 0.085
l12, l13 0.013 λ, 50.0 Ω2.29 x 1.35 0.090 x 0.053
1Electrical characteristics are rounded.
PTFA081501E
PTFA081501F
Data Sheet 7 of 10 Rev. 03, 2007-03-09
a081501ef_assy
C15 C16
C13
C14
C23
C17
L1
C26
C27
C25
C20
C24
C18
C19 L2
C21
C22
R4
QQ1
C3 C1
R1 C2
R2
R5 R3
C8
C7 C6
C9 C10 C11
C12
R8
R6 R7
C5
C4 LM
10
35V
+
Q1
RF_IN RF_OUT
VDD
VDD
VDD
Reference Circuit (cont.)
Reference circuit assembly diagram (not to scale)*
Component Description Suggested Manufacturer P/N or Comment
C1, C2, C3 Capacitor, 0.001 µF Digi-Key PCC1772CT-ND
C4 Tantalum capacitor, 10 µF, 35 V Digi-Key PCS6106TR-ND
C5, C6, C16, C21 Capacitor, 0.1 µF, 50 VDigi-Key P4525-ND
C7 Capacitor, 0.01 µF Digi-Key 200B 103
C8, C10, C13, C18, Ceramic capacitor, 33 pF ATC 100B 330
C26
C9 Ceramic capacitor, 2.1 pF ATC 100B 2R1
C11, C23, C24 Ceramic capacitor, 7.5 pF ATC 100B 7R5
C12 Ceramic capacitor, 10 pF ATC 100B 100
C14, C19 Capacitor, 1.0 µF ATC 920C105
C15, C17, C20, C22 Tantalum capacitor, 10 µF, 50 V Garrett Electronics TPS106K050R0400
C25 Ceramic capacitor, 2.7 pF ATC 100B 2R7
C27 Ceramic capacitor, 0.5 pF ATC 100B 0R5
L1, L2 Ferrite, 6 mm Ferroxcube 53/3/4.6-452
Q1 Transistor Infineon BCP56
QQ1 Voltage regulator National Semiconductor LM7805
R1 Chip resistor, 1.2 k-ohms Digi-Key P1.2KGCT-ND
R2 Chip resistor, 1.3 k-ohms Digi-Key P1.3KGCT-ND
R3 Chip resistor, 2 k-ohms Digi-Key P2KECT-ND
R4 Potentiometer, 2 k-ohms Digi-Key 3224W-202ETR-ND
R5, R7 Chip resistor, 5.1 k-ohms Digi-Key P5.1KECT-ND
R6, R8 Chip resistor, 10 ohms Digi-Key P10ECT-ND
*Gerber Files for this circuit available on request
PTFA081501E
PTFA081501F
Data Sheet 8 of 10 Rev. 03, 2007-03-09
C
L
34.04
[1.340]
19.81±0.20
[.780±.008]
1.02
[.040]
19.43 ±0.51
[.765±.020]
(45° X 2.72
[.107])
2X 12.70
[.500]
2X 4.83±0.51
[.190±.020]
27.94
[1.100]
4X R1.52
[.060]
2X R1.63
[.064]
D
G
S
FLANGE 9.78
[.385]
0.0381 [.0015] -A-
C
L
C
L
3.61±0.38
[.142±.015]
SPH 1.57
[.062]
[.370 ]
+.004
–.006
LID 9.40 +0.10
–0.15
Package Outline Specifications
Package H-30248-2
Diagram Notes:
1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001].
2. All tolerances ± 0.127 [.005] unless specified otherwise.
3. Pins: D = drain, S = source, G = gate.
4. Interpret dimensions and tolerances per ASME Y14.5M-1994.
5. Primary dimensions are mm. Alternate dimensions are inches.
6. Gold plating thickness:
S - flange: 2.54 micron (min) [100 microinch (min)]
D, G - leads: 1.14 micron ± 0.38 micron [45 microinch ± 15 microinch]
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/products
PTFA081501E
PTFA081501F
Data Sheet 9 of 10 Rev. 03, 2007-03-09
C
L
0.0381 [.0015]
2X 12.70
[.500]
19.43±0.51
[.765±.020]
19.81±0.20
[.780±.008]
SPH 1.57
[.062]
FLANGE 9.78
[.385]
S
G
D
( 45° X 2.72
[.107])
20.57
[.810]
-A-
3.61±0.38
[.142±.015]
1.02
[.040]
2X 4.83±0.51
[.190±.020]
248-cases: h-31248-2_po
C
L
C
L
[R.020 ]
+.015
–.005
4X R0.508 +0.381
–0.127
LID 9.40+0.10
–0.15
[.370 ]
+.004
–.006
Package Outline Specifications (cont.)
Package H-31248-2
Diagram Notes:
1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001].
2. All tolerances ± 0.127 [.005] unless specified otherwise.
3. Pins: D = drain, S = source, G = gate.
4. Interpret dimensions and tolerances per ASME Y14.5M-1994.
5. Primary dimensions are mm. Alternate dimensions are inches.
6. Gold plating thickness:
S - flange: 2.54 micron (min) [100 microinch (min)]
D, G - leads: 1.14 micron ± 0.38 micron [45 microinch ± 15 microinch]
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/products
*See Infineon distributor for future availability.
Data Sheet 10 of 10 Rev. 03, 2007-03-09
PTFA081501E/F
Confidential, Limited Internal Distribution
Revision History: 2007-03-09 Data Sheet
Previous Version: 2005-07-20, Data Sheet
Page Subjects (major changes since last revision)
all Update Infineon information and logo.
1Add information about RoHS compliance.
1, 2, 9 Show PTFA081501F as a released products
1, 2, 8, 9 Revise package designations and diagrams.
GOLDMOS® is a registered trademark of Infineon Technologies AG.
Edition 2007-03-09
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2005.
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or
any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any
third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon
Technologies Office (www.infineon.com/rfpower).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support
device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it
is reasonable to assume that the health of the user or other persons may be endangered.
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