VND5025BK-E Double channel high-side driver with analog current sense for automotive applications Features Max transient supply voltage VCC 41 V Operating voltage range VCC 4.5 to 36 V Max on-state resistance (per ch.) RON 25 m Current limitation (typ) ILIMH 60 A Off-state supply current 2 IS A(1) 1. Typical value with all loads connected. Features - In-rush current active management by power limitation - Very low standby current - 3.0 V CMOS compatible input - Optimized electromagnetic emission - Very low electromagnetic susceptibility - In compliance with the 2002/95/EC European directive - Two classes with different `K@3A' ranges - Package: ECOPACK(R) ) (s t c u d o r Diagnostic functions - 3 A current sense precision of +/-8% - Proportional load current sense - High current sense precision for wide range currents - Current sense disable - Thermal shutdown indication - Very low current sense leakage P e t e l o s b O Protection - Undervoltage shutdown - Overvoltage clamp - Load current limitation - Self-limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Thermal shutdown - Reverse battery protection August 2010 ) s ( ct PowerSSO-24TM - Electrostatic discharge protection u d o Description r P e The VND5025BK-E is a monolithic device made using STMicroelectronicsTM VIPowerTM M0-5 technology, intended for driving resistive or inductive loads with one side connected to ground, and suitable for driving LEDs. t e l o s b O Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to safe level up to thermal shutdown intervention. Thermal shutdown with automatic restart allows the device to recover normal operation as soon as fault condition disappears. Table 1. Package Device summary Order codes Tube Tape and reel VND5025BK-E VND5025BKTR-E PowerSSO-24TM VND5025B1K-E VND5025B1KTR-E VND5025B2K-E VND5025B2KTR-E Doc ID 13374 Rev 6 1/32 www.st.com 1 Contents VND5025BK-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 ) s ( ct Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 4 u d o GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22 r P e 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23 t e l o 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 24 ) (s s b O Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1 5 t c u PowerSSO-24TM thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 d o r Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 P e 5.1 t e l o s b O 6 2/32 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Doc ID 13374 Rev 6 VND5025BK-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V; Tj = 25 C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (8 V < VCC < 16 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 PowerSSO-24TM mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 13374 Rev 6 3/32 List of figures VND5025BK-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Delay response time between rising edge of output current and rising edge of current sense (CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 24 PowerSSO-24TM PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 25 PowerSSO-24TM thermal impedance junction to ambient single pulse (one channel ON) . 26 Thermal fitting model of a double channel HSD in PowerSSO-24TM . . . . . . . . . . . . . . . . . 26 PowerSSO-24TM package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 PowerSSO-24TM tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PowerSSO-24TM tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 4/32 Doc ID 13374 Rev 6 VND5025BK-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram VCC UNDERVOLTAGE VCC CLAMP OUTPUT1 PwCLAMP 1 GND CURRENT SENSE1 DRIVER 1 ILIM 1 INPUT1 LOGIC PwCLAMP 2 DRIVER 2 VDSLIM 1 PwrLIM 1 OUTPUT2 INPUT2 IOUT1 ) s ( ct ILIM 2 OVERTEMP. 1 VDSLIM 2 K1 OVERTEMP. 2 IOUT2 u d o K2 PwrLIM 2 r P e CS_DIS Table 2. CURRENT SENSE2 t e l o Pin functions Name VCC Power output. t c u GND od r P e Function Battery connection. OUTPUT1,2 INPUT1,2 ) (s s b O Ground connection; must be reverse battery protected by an external diode/resistor network. Voltage controlled input pin with hysteresis, CMOS compatible; controls output switch state. CURRENT SENSE1,2 Analog current sense pin; delivers a current proportional to the load current. CS_DIS Active high CMOS compatible pin to disable the current sense pin. t e l o s b O Doc ID 13374 Rev 6 5/32 Block diagram and pin description Figure 2. VND5025BK-E Configuration diagram (top view) VCC GND N.C. INPUT2 N.C. INPUT1 N.C. CURRENT SENSE1 N.C. CURRENT SENSE2 CS_DIS. VCC 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 TAB = VCC Table 3. u d o r P e Suggested connections for unused and not connected pins let Connection / pin Current sense N.C. Output Input CS_DIS Floating N.R.(1) X X X X To Ground Through 1k resistor Through 10k resistor Through 10k resistor o s b X O ) 1. Not recommended. s ( t c u d o r P e t e l o s b O 6/32 ) s ( ct Doc ID 13374 Rev 6 N.R. VND5025BK-E 2 Electrical specification Electrical specification Figure 3. Current and voltage conventions IS VCC ICSD VCSD CS_DIS OUTPUT1 INPUT1 CURRENT SENSE1 IIN2 IOUT2 ) s ( ct VSENSE1 OUTPUT2 INPUT2 ISENSE2 VIN2 VOUT2 CURRENT SENSE2 GND u d o VSENSE2 r P e IGND t e l o Note: VFn = VOUTn - VCC during reverse battery condition. s b Absolute maximum ratings O ) s ( t c u d o r P ete 2.1 VCC VOUT1 ISENSE1 IIN1 VIN1 VF IOUT1 Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document. Table 4. ol O bs Absolute maximum ratings Symbol Parameter Value VCC DC supply voltage 41 -VCC Reverse DC supply voltage 0.3 -IGND DC reverse ground pin current 200 IOUT DC output current - IOUT IIN ICSD Unit V mA Internally limited A Reverse DC output current 24 DC input current -1 to 10 DC current sense disable input current -ICSENSE DC reverse CS pin current VCSENSE Current sense maximum voltage Doc ID 13374 Rev 6 mA 200 VCC - 41 to +VCC V 7/32 Electrical specification Table 4. VND5025BK-E Absolute maximum ratings (continued) Symbol Parameter Value Unit 109 mJ VESD Electrostatic discharge (Human Body Model: R = 1.5 k; C = 100 pF) - Input - Current sense - CS_DIS - Output - VCC 4000 2000 4000 5000 5000 V V V V V VESD Charge device model (CDM-AEC-Q100-011) 750 V Maximum switching energy (single pulse) (L = 0.3 mH; RL = 0 ; Vbat = 13.5 V; Tjstart = 150 C; IOUT = IlimL(Typ.)) EMAX(1) ) s ( ct u d o Junction operating temperature Tj -40 to 150 Storage temperature Tstg r P e 1. See Section 3.4 for details. 2.2 t e l o Thermal data Table 5. Thermal data Symbol s b O Parameter ) (s Rthj-case Thermal resistance junction-case (with one channel ON) t c u Rthj-amb Thermal resistance junction-ambient d o r P e t e l o s b O 8/32 C -55 to 150 Doc ID 13374 Rev 6 Maximum value Unit 1.35 C/W See Figure 29 VND5025BK-E 2.3 Electrical specification Electrical characteristics 8 V < VCC < 36 V; -40 C < Tj < 150 C, unless otherwise specified. Table 6. Power section Symbol Parameter Test conditions VCC Operating supply voltage VUSD Undervoltage shutdown Min. Typ. Max. Unit 4.5 Undervoltage shut-down VUSDhyst hysteresis 13 36 3.5 4.5 0.5 IOUT = 3 A; Tj = 25 C RON On-state resistance(1) 25 IS IL(off) VF ) s ( ct IOUT = 3 A; Tj = 150 C 50 IOUT = 3 A; VCC = 5 V; Tj = 25 C Vclamp Clamp voltage u d o IS = 20 mA 41 Pr Off-state; VCC = 13 V; Tj = 25 C; VIN = VOUT = VSENSE = VCSD = 0 V Supply current e t e l On-state; VCC = 13 V; VIN = 5 V; IOUT = 0 A Off-state output current(1) o s b VIN = VOUT = 0 V; VCC = 13V; Tj = 25 C 0 VIN = VOUT = 0 V; VCC = 13 V; Tj = 125 C 0 s ( t c m 35 46 52 V 2(2) 5(2) A 3 6 mA 0.01 3 A O ) Output - VCC diode voltage(1) V -IOUT = 4 A; Tj = 150 C 5 0.7 V u d o 1. For each channel. 2. PowerMOS leakage included. r P e Table 7. s b O t e l o Symbol Switching (VCC = 13V; Tj = 25 C) Parameter td(on) Turn-on delay time td(off) Turn-off delay time (dVOUT/dt)on Turn-on voltage slope (dVOUT/dt)off Turn-off voltage slope WON Switching energy losses during tWON WOFF Switching energy losses during tWOFF Test conditions RL = 4.3 (see Figure 8) RL = 4.3 RL = 4.3 (see Figure 8) Doc ID 13374 Rev 6 Min. Typ. Max. Unit -- 35 -- -- 50 -- -- See Figure 21 -- -- See Figure 22 -- -- 0.45 -- -- 0.35 -- s V/s mJ 9/32 Electrical specification Table 8. VND5025BK-E Logic input Symbol Parameter VIL Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage VICL Low level CS_DIS current VCSDH CS_DIS high level voltage ICSDH High level CS_DIS current VCSD(hyst) CS_DIS hysteresis voltage 2.1 V 5.5 V -0.7 ) s ( ct 1 A du ro VCSD = 2.1 V P e let ICSD = 1 mA V 10 A 7 V Max. Unit 0.25 5.5 -0.7 Test conditions t(s ILIML TTSD Shutdown temperature od uc TR Reset temperature TRS Thermal reset of STATUS VCC = 13 V Min. Typ. 43 60 85 5 V < VCC < 36 V A VCC = 13 V; TR < Tj < TTSD 24 150 175 TRS + 1 TRS + 5 200 C 135 Thermal hysteresis (TTSD-TR) 7 Turn-off output voltage clamp IOUT = 2 A; VIN = 0; L = 6 mH Output voltage drop limitation IOUT = 0.2 A Tj = -40 C to 150 C (see Figure 9) VCC - 41 VCC - 46 VCC - 52 V 40 mV 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. 10/32 A 7 2.1 O ) Parameter Short circuit current during thermal cycling VON A 10 VCSD = 0.9 V o s b DC short circuit current VDEMAG V Protection and diagnostics(1) r P e O 0.9 0.9 ICSD = -1 mA ILIMH THYST Unit 0.25 CS_DIS clamp voltage Symbol bs Max. 1 IIN = -1 mA ICSDL t e l o Typ. VIN = 2.1 V IIN = 1 mA CS_DIS low level voltage Table 9. Min. VIN = 0.9 V Input clamp voltage VCSDL VCSCL Test conditions Doc ID 13374 Rev 6 VND5025BK-E Electrical specification Table 10. Current sense (8 V < VCC < 16 V) Symbol Parameter Min. Typ. Max. Unit KLED IOUT/ISENSE IOUT = 0.05 A; VSENSE = 0.5 V; VCSD = 0 V; Tj = -40 C to 150 C 1740 3300 4570 K0 IOUT/ISENSE IOUT = 0.5 A; VSENSE = 0.5 V; VCSD = 0 V; Tj = -40 C to 150 C 1920 3020 3930 IOUT/ISENSE IOUT = 2 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40 C Tj = 25 C to 150 C Current sense ratio drift IOUT = 2 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40 C to 150 C IOUT/ISENSE IOUT = 3 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40 C to 150 C ClassB ClassB1 ClassB2 K1 dK1/K1(1)(2) K2 K3 dK3/K3(1)(2) IOUT/ISENSE ISENSE0 bs s b O t c u IOUT = 10 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40 C Tj = 25 C to 150 C +8 % u d o r P e IOUT = 3 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40 C to 150 C ) (s ) s ( ct -8 2510 2510 2690 3160 2960 3160 -6 +6 % 2610 2760 2970 2650 2760 2870 od IOUT = 10 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40 C to 150 C -3 +3 % IOUT = 0 A; VSENSE = 0 V; VCSD = 5 V; VIN = 0 V; Tj = -40 C to 150 C 0 1 A Analog sense leakage current VCSD = 0 V; VIN = 5 V; Tj = -40 C to 150 C 0 2 A IOUT = 2 A; VSENSE = 0 V; VCSD = 5 V; VIN = 5 V; Tj = -40 C to 150 C 0 1 A IOUT = 3 A; VCSD = 0 V 5 r P e t e l o 2090 2810 3440 2320 2810 3200 t e l o Current sense ratio drift dK2/K2(1)(2) O Test conditions Current sense ratio drift VSENSE Max analog Sense output voltage VSENSEH Analog sense output voltage in V = 13 V; RSENSE = 3.9 k over temperature CC condition 9 ISENSEH Analog sense output current in V = 13 V; VSENSE = 5 V over temperature CC condition 8 Doc ID 13374 Rev 6 V mA 11/32 Electrical specification Table 10. VND5025BK-E Current sense (8 V < VCC < 16 V) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit tDSENSE1H Delay response V < 4 V, 0.5 < I < 10 A time from falling I SENSE= 90 % of I OUT SENSEMAX edge of CS_DIS SENSE (see Figure 4) pin 50 100 tDSENSE1L Delay response V < 4 V, 0.5 < I < 10 A time from rising I SENSE= 10 % of I OUT SENSE SENSEMAX edge of CS_DIS (see Figure 4) pin 5 20 tDSENSE2H Delay response time from rising edge of INPUT pin 70 Delay response time between rising edge of tDSENSE2H output current and rising edge of current sense Delay response time from falling edge of INPUT pin tDSENSE2L VSENSE < 4 V, 0.5 < IOUT < 10 A ISENSE = 90 % of ISENSEMAX (see Figure 4) s VSENSE < 4 V, ISENSE = 90 % of ISENSEMAX, IOUT = 90 % of IOUTMAX, IOUTMAX = 3 A (see Figure 5) e t e ol ) s ( ct 300 u d o Pr VSENSE < 4 V, 0.5 < IOUT < 10 A ISENSE = 10 % of ISENSEMAX (see Figure 4) bs 100 O ) 110 250 1. Parameter guaranteed by design; it is not tested. 2. Current sense ratio drift is the deviation of factor K for a given device (measured over the range -40 C to 150 C and 8 V < VCC < 16 V) from its value measured at Tj = 25 C, VCC = 13 V. Figure 4. s ( t c u d o Current sense delay characteristics r P e INPUT t e l o CS_DIS LOAD CURRENT bs O 12/32 SENSE CURRENT tDSENSE2H tDSENSE1L Doc ID 13374 Rev 6 tDSENSE1H tDSENSE2L VND5025BK-E Electrical specification Figure 5. Delay response time between rising edge of output current and rising edge of current sense (CS enabled) VIN tDSENSE2H t IOUT IOUTMAX ) s ( ct 90% IOUTMAX u d o r P e t t e l o ISENSE ISENSEMAX s b O 90% ISENSEMAX ) (s t c u t d o r P e t e l o s b O Doc ID 13374 Rev 6 13/32 Electrical specification Figure 6. VND5025BK-E IOUT/ISENSE vs IOUT Iout/Isense 3400 Max, Tj = -40 C to 150 C 3200 3000 2800 Class B 2600 Min, Tj = -40 C to 150 C 2400 2200 ) s ( ct 2000 2 4 6 8 10 Iout [A] u d o r P e Iout/Isense t e l o 3400 3200 Max, Tj = -40 C to 150 C 3000 Class B1 2800 ) (s 2600 2400 t c u 2200 od r P e s b O Min, Tj = -40 C to 150 C 2000 t e l o bs 2 4 6 8 10 Iout [A] Iout/Isense 3400 Max, Tj = -40 C to 150 C O 3200 3000 Class B2 2800 2600 Min, Tj = -40 C to 150 C 2400 2200 2000 2 4 6 Iout [A] Note: See Table 10 for details. 14/32 Doc ID 13374 Rev 6 8 10 VND5025BK-E Electrical specification Figure 7. Maximum current sense ratio drift vs load current dK/K [% ] 10 8 Max, Tj = -40 C to 150 C 6 4 2 0 -2 ) s ( ct -4 -6 Min, Tj = -40 C to 150 C u d o -8 r P e -10 2 3 4 5 6 7 Iout [A] Truth table ) (s Conditions t c u Normal operation od Overtemperature ete b O l o s Pr 9 10 t e l o Note: Parameter guaranteed by design; it is not tested. Table 11. 8 s b O Input Output Sense (VCSD = 0 V)(1) L L 0 H H Nominal L 0 L H VSENSEH L Undervoltage L 0 H L Short circuit to GND (RSC 10m) 0 L H 0 if Tj < TTSD VSENSEH if Tj > TTSD L Short circuit to VCC Negative output voltage clamp 0 H H L < Nominal L 0 1. If the VCSD is high, the SENSE output is at a high impedance; its potential depends on leakage currents and external circuit. Doc ID 13374 Rev 6 15/32 Electrical specification Figure 8. VND5025BK-E Switching characteristics tWoff tWon VOUT 90% 80% dVOUT/dt(off) dVOUT/dt(on) tr tf 10% t INPUT td(on) td(off) ) s ( ct u d o r P e Figure 9. Output voltage drop limitation t e l o s b O VCC - VOUT )- Tj = 150 C s ( t c Tj = 25 C Tj = -40 C u d o r P e t e l o s b O 16/32 Von Von/Ron(T) Doc ID 13374 Rev 6 IOUT t VND5025BK-E Electrical specification Table 12. Electrical transient requirements (part 1/3) Burst cycle/pulse repetition time IV Number of pulses or test times Min. Max. -75V -100V 5000 pulses 0.5s 5s 2 ms, 10 2a +37V +50V 5000 pulses 0.2s 5s 50s, 2 3a -100V -150V 1h 90ms 100ms 0.1s, 50 3b +75V +100V 1h 90ms 100ms 0.1s, 50 4 -6V -7V 1 pulse 5b(2) +65V +87V 1 pulse Test levels(1) ISO 7637-2: 2004(E) Test pulse III 1 400ms, 2 u d o 2. Valid in case of external load dump clamp: 40V maximum referred to ground. r P e Electrical transient requirements (part 2/3) ISO 7637-2: 2004E Test pulse III 1 C 2a )- t(s 3a uc 3b od 4 e t e ol t e l o Test level results C Pr 5b(1) ) s ( ct 100ms, 0.01 1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. Table 13. Delays and Impedance s b O VI C C C C C C C C C C 1. Valid in case of external load dump clamp: 40V maximum referred to ground. s b O Table 14. Class Electrical transient requirements (part 3/3) Contents C All functions of the device performed as designed after exposure to disturbance. E One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Doc ID 13374 Rev 6 17/32 Electrical specification VND5025BK-E Figure 10. Waveforms NORMAL OPERATION INPUT CS_DIS LOAD CURRENT SENSE CURRENT UNDERVOLTAGE VUSDhyst VCC ) s ( ct VUSD INPUT u d o CS_DIS LOAD CURRENT r P e SENSE CURRENT t e l o SHORT TO VCC INPUT CS_DIS LOAD VOLTAGE ) (s LOAD CURRENT SENSE CURRENT Pr TR Tj e t e l < Nominal t c u od s b O < Nominal OVERLOAD OPERATION TTSD TRS INPUT o s b O CS_DIS ILIMH ILIML LOAD CURRENT VSENSEH SENSE CURRENT Current limitation Thermal cycling Power limitation SHORTED LOAD 18/32 Doc ID 13374 Rev 6 NORMAL LOAD VND5025BK-E Electrical specification 2.4 Electrical characteristics curves Figure 11. Off-state output current Figure 12. High level input current Iih(uA) Iloff (uA) 5 0.5 0.45 4.5 Off State Vcc=13V Vin=Vout=0V 0.4 0.35 Vin=2.1V 4 3.5 0.3 3 0.25 2.5 0.2 2 0.15 1.5 0.1 1 0.05 0.5 ) s ( ct -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 Figure 13. Input clamp voltage r P e 4 6.75 6.5 ) (s 6.25 t c u 6 5.75 od e t e l 5 -50 -25 0 25 100 125 150 175 s b O 3.5 Iin=1mA Pr 75 t e l o Vih (V) 7 5.25 50 Figure 14. Input high level Vicl (V) 5.5 25 Tc (C) Tc (C) 3 2.5 2 1.5 1 0.5 0 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 100 125 150 175 Tc (C) so Figure 15. Input low level b O u d o 0 0 Figure 16. Input hysteresis voltage Vil (V) Vhyst (V) 2 1 1.8 0.9 1.6 0.8 1.4 0.7 1.2 0.6 1 0.5 0.8 0.4 0.6 0.3 0.4 0.2 0.2 0.1 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) -50 -25 0 25 50 75 100 125 150 175 Tc (C) Doc ID 13374 Rev 6 19/32 Electrical specification VND5025BK-E Figure 17. On-state resistance vs Tcase Figure 18. On-state resistance vs VCC Ron (mOhm) Ron (mOhm) 100 80 90 70 Iout=3A Vcc=13V 80 60 70 50 60 50 40 40 Tc=150C 30 Tc= 125C 20 Tc= 25C Tc= -40C 30 20 0 0 -50 -25 0 25 50 75 100 125 150 175 0 5 10 15 Tc (C) Vusd (V) 16 100 70 10 )- 8 t(s 6 uc 4 -25 0 od Pr 25 e t e ol 50 75 100 75 150 175 150 175 60 50 40 30 20 0 125 150 -50 175 -25 0 25 50 100 125 Tc (C) Tc (C) Figure 22. Turn-off voltage slope (dVout/dt)on (V/ms) (dVout/dt)off (V/ms) 1000 1000 900 900 Vcc=13V Rl=4.3Ohm 800 Vcc=13V Rl=4.3Ohm 800 700 700 600 600 500 500 400 400 300 300 200 200 100 100 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) 20/32 40 10 Figure 21. Turn-on voltage slope O u d o 35 Vcc=13V s b O 80 12 -50 30 t e l o 90 14 0 25 r P e Figure 20. ILIMH vs Tcase Ilimh (A) 2 20 Vcc (V) Figure 19. Undervoltage shutdown bs ) s ( ct 10 10 -50 -25 0 25 50 75 Tc (C) Doc ID 13374 Rev 6 100 125 VND5025BK-E Electrical specification Figure 23. CS_DIS high level voltage Figure 24. CS_DIS low level voltage Vcsdh (V) Vcsdl (V) 4 4 3.5 3.5 3 3 2.5 2.5 2 2 1.5 1.5 1 1 0.5 0.5 0 ) s ( ct 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 u d o Tc (C) Tc (C) Figure 25. CS_DIS clamp voltage r P e Vcsdcl (V) t e l o 8 7.5 Icsd=1mA 7 6.5 ) (s 6 5.5 s b O t c u 5 4.5 d o r 4 -50 -25 0 25 P e 50 75 100 125 150 175 Tc (C) t e l o s b O Doc ID 13374 Rev 6 21/32 Application information 3 VND5025BK-E Application information Figure 26. Application schematic +5V VCC Rprot CS_DIS Dld Rprot C INPUT ) s ( ct OUTPUT Rprot CURRENT SENSE GND RSENSE CEXT VGND Note: Channel 2 has the same internal circuit as channel 1. ) (s 3.1 u d o r P e RGND DGND t e l o s b O GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. t c u d o r 3.1.1 Solution 1: resistor in the ground line (RGND only) P e This first solution can be used with any type of load. t e l o The following formulas indicate how to dimension the RGND resistor: 1. bs O 2. RGND 600 mV / (IS(on)max) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in RGND (when VCC < 0 during reverse battery situations) is: PD = (-VCC)2 / RGND This resistor can be shared among several different HSDs. Please note that the value of this resistor is calculated with formula (1), where IS(on)max becomes the sum of the maximum onstate currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground, the RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift varies depending on how many devices are ON in the case of several high-side drivers sharing the same RGND. 22/32 Doc ID 13374 Rev 6 VND5025BK-E Application information If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor, then ST suggests to utilize the following Solution 2. 3.1.2 Solution 2: diode (DGND) in the ground line If the device drives an inductive load, insert a resistor (RGND = 1 k) in parallel to DGND. This small signal diode can be safely shared among several different HSDs. Also in this case, the presence of the ground network produces a shift (600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift does not vary if more than one HSD shares the same diode/resistor network. 3.2 ) s ( ct Load dump protection u d o Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2:2004E table. 3.3 r P e t e l o MCU I/Os protection If a ground protection network is used and negative transients are present on the VCC line, the control pins are pulled negative. ST suggests to insert an in-line resistor (Rprot) to prevent the microcontroller I/O pins from latch-up. ) (s s b O The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os. t c u -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax d o r Calculation example: For VCCpeak = -100 V and Ilatchup 20 mA; VOHC 4.5 V P e 5 k Rprot 65 k t e l o Recommended values: Rprot = 10 k, CEXT = 10 nF. s b O Doc ID 13374 Rev 6 23/32 Application information 3.4 VND5025BK-E Maximum demagnetization energy (VCC = 13.5 V) Figure 27. Maximum turn-off current versus inductance (for each channel) 100 A C B ) s ( ct 10 I (A) u d o t e l o 1 0,1 1 ) (s A: Tjstart = 150 C single pulse r P e L (mH) 10 100 s b O B: Tjstart = 100 C repetitive pulse t c u C: Tjstart = 125 C repetitive pulse VIN, IL P e d o r t e l o Demagnetization Demagnetization Demagnetization s b O t Note: Values are generated with RL = 0 . In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. 24/32 Doc ID 13374 Rev 6 VND5025BK-E Package and thermal data 4 Package and thermal data 4.1 PowerSSO-24TM thermal data Figure 28. PowerSSO-24TM PC board ) s ( ct u d o Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 m (front and back side), Copper areas: from minimum pad layout to 8 cm2). r P e t e l o Figure 29. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) RTHj_amb(C/W) ) (s 55 t c u 50 45 s b O d o r P e s b O t e l o 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) Doc ID 13374 Rev 6 25/32 Package and thermal data VND5025BK-E Figure 30. PowerSSO-24TM thermal impedance junction to ambient single pulse (one channel ON) ZTH (C/W) 1000 100 Footprint 2 cm2 8 cm2 10 ) s ( ct u d o 1 t e l o 0.1 0.0001 0.001 0.01 0.1 1 Time (s) ) (s r P e s b O 10 100 1000 Equation 1: pulse calculation formula Z TH = R TH where = tP/T +Z (1 - ) t c u THtp d o r Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-24TM P e t e l o s b O Note: Values are given inTable 11. 26/32 Doc ID 13374 Rev 6 VND5025BK-E Package and thermal data Table 15. Thermal parameters Area/Island (cm2) Footprint R1 (C/W) 0.28 R2 (C/W) 0.9 R3 (C/W) 6 R4 (C/W) 7.7 R5 (C/W) 2 8 9 9 8 R6 (C/W) 28 17 10 R7 (C/W) 0.28 R8 (C/W) 0.9 C1 (W.s/C) 0.001 C2 (W.s/C) 0.003 C3 (W.s/C) 0.025 C4 (W.s/C) 0.75 C5 (W.s/C) 1 C6 (W.s/C) 2.2 ) s ( ct C7 (W.s/C) C8 (W.s/C) ) s ( ct u d o r P e 4 9 5 17 bs t e l o -O 0.001 0.003 u d o r P e t e l o s b O Doc ID 13374 Rev 6 27/32 Package and packing information VND5025BK-E 5 Package and packing information 5.1 ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 Package mechanical data ) s ( ct Figure 32. PowerSSO-24TM package dimensions u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 28/32 Doc ID 13374 Rev 6 VND5025BK-E Package and packing information Table 16. PowerSSO-24TM mechanical data Millimeters Symbol Min Typ Max A 2.45 A2 2.15 2.35 a1 0 0.1 b 0.33 0.51 c 0.23 0.32 D 10.10 E 7.4 e 0.8 e3 8.8 t e l o H bs 10.1 h (s) k ct L du O s b O 7.6 2.3 G e t e ol u d o r P e F -O 0.1 10.5 0.4 0 8 0.55 0.85 1.2 o r P Q ) s ( ct 10.50 0.8 S 2.9 T 3.65 U 1.0 N 10 X 4.1 4.7 Y 6.5 7.1 Doc ID 13374 Rev 6 29/32 Package and packing information 5.3 VND5025BK-E Packing information Figure 33. PowerSSO-24TM tube shipment (no suffix) C Base Qty Bulk Qty Tube length (0.5) A B C (0.1) B 49 1225 532 3.5 13.8 0.6 All dimensions are in mm. A ) s ( ct Figure 34. PowerSSO-24TM tape and reel shipment (suffix "TR") u d o REEL DIMENSIONS r P e t e l o ) (s t c u s b O Base Qty Bulk Qty A (max) B (min) C (0.2) F G (+2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 100 30.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 od Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing r P e t e l o s b O All dimensions are in mm. W P0 (0.1) P D (0.05) D1 (min) F (0.1) K (max) P1 (0.1) 24 4 12 1.55 1.5 11.5 2.85 2 End Start Top cover tape No components Components 500mm min 500mm min Empty components pockets sealed with cover tape. User direction of feed 30/32 Doc ID 13374 Rev 6 No components VND5025BK-E 6 Revision history Revision history Table 17. Document revision history Date Revision Changes 28-Mar-2007 1 Initial release 02-Jul-2009 2 Updated Table 16: PowerSSO-24TM mechanical data 23-Jul-2009 3 Updated Figure 32: PowerSSO-24TM package dimensions. Updated Table 16: PowerSSO-24TM mechanical data: - Deleted G1 row - Added O, Q, S, T and U rows 08-Feb-2010 4 Updated ILIMH value from 41 A to 60 A 22-Jul-2010 5 Updated Table 1: Device summary. Table 10: Current sense (8 V < VCC < 16 V): - Updated K2 values and test conditions. Updated Figure 6: IOUT/ISENSE vs IOUT 05-Aug-2010 6 Table 10: Current sense (8 V < VCC < 16 V): - Updated K1 minimum value at Tj = 25 C to 150 C ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 13374 Rev 6 31/32 VND5025BK-E ) s ( ct Please Read Carefully: u d o Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. r P e All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. t e l o No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. ) (s s b O UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. t c u UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. d o r P e t e l o Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. s b O ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2010 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 32/32 Doc ID 13374 Rev 6