CCD area image sensor
S7986-01, S7987-01
■ Absolute maximum ratings (Ta=25 °C)
Parameter Symbol Min. Typ. Max. Unit
Operating temperature*2 Topr -50 - +30 °C
Storage temperature Tstg -50 - +70 °C
OD voltage VOD -0.5 - +25 V
RD voltage VRD -0.5 - +18 V
ISV voltage VISV -0.5 - +18 V
ISH voltage VISH -0.5 - +18 V
IGV voltage VIG1V, VIG2V -10 - +15 V
IGH voltage VIG1H, VIG2H -10 - +15 V
SG voltage VSG -10 - +15 V
OG voltage VOG -10 - +15 V
RG voltage VRG -10 - +15 V
TG voltage VTG -10 - +15 V
Vertical clock voltage (image area) VP1VI, VP2VI -10 - +15 V
Vertical clock voltage (storage area) VP1VS, VP2VS -10 - +15 V
Horizontal clock voltage VP1H, VP2H -10 - +15 V
*2: Chip temperature
■ Operating conditions (MPP mode, Ta=25 °C)
Parameter Symbol Min. Typ. Max. Unit
Output transistor drain voltage VOD 12 15 18 V
Reset drain voltage VRD 11.5 12 12.5 V
Output gate voltage VOG 1 3 5 V
Substrate voltage VSS - 0 - V
Vertical input source VISV - VRD - V
Horizontal input source VISH - VRD - V
Vertical input gate VIG1V, VIG2V -9 -8 - V
Test point
Horizontal input gate VIG1H, VIG2H -9 -8 - V
High VP1VIH, VP2VIH 4 6 8 Vertical shift register
clock voltage (Image area) Low VP1VIL, VP2VIL -9 -8 -7 V
High VP1VSH, VP2VSH 4 6 8 Vertical shift register
clock voltage (Storage area) Low VP1VSL, VP2VSL -9 -8 -7 V
High VP1HH, VP2HH 4 6 8 Horizontal shift register
clock voltage Low VP1HL, VP2HL -9 -8 -7 V
High VSGH 4 6 8
Summing gate voltage Low VSGL -9 -8 -7
V
High VRGH 4 6 8
Reset gate voltage Low VRGL -9 -8 -7 V
High VTGH 4 6 8
Transfer gate voltage Low VTGL -9 -8 -7
V
External load resistance RL 2.0 2.2 2.4 kΩ
■ Electrical characteristics (Ta=25 °C)
Parameter Symbol Min. Typ. Max. Unit
Signal output frequency fc - 1 14 MHz
Vertical shift register capacitance
(Image area)
CP1VI
CP2VI - 3000 - pF
Vertical shift register capacitance
(Storage area)
CP1VS
CP2VS - 3000 - pF
Horizontal shift register capacitance CP1H, CP2H - 90 - pF
Summing gate capacitance CSG - 30 - pF
Reset gate capacitance CRG - 30 - pF
Charge transfer gate capacitance CTG - 70 - pF
Transfer efficiency*3 CTE 0.99995 0.99999 - -
DC output level Vout - 8 - V
Output impedance Zo - 500 - Ω
Power consumption*4 P - 60 - mW
*3: Charge transfer efficiency per pixel, measured at half of the full well capacity.
*4: Power consumption of the on-chip amplifier plus load resistance
2