Datasheet Low Power Consumption Class D Speaker Amplifier series 9 W + 9 W Analog Input Class D Stereo Speaker Amplifier BD28412MUV General Description Key Specifications BD28412MUV is 9 W + 9 W stereo (or 18 W monaural under parallel connection) class D amplifier which can output power without an external heat sink. This LSI has built-in precise oscillator which generate selectable switching frequencies, so AM radio interference can be avoided. In addition, 2.1 Ch audio system can be achieved by master and slave operation without caring about beat noise. This LSI achieves lower power consumption under low output power, and suitable for speaker systems in which battery is equipped such as wireless speakers. Supply Voltage Range: 4.5 V to 13 V Speaker Output Power: 9 W + 9 W (Typ) (VCC = 12 V, RL = 8 , PLIMIT = 0 V) Speaker Output Power(PBTL): 18 W (Typ) (VCC = 12 V, RL = 4 , PLIMIT = 0 V) Total Harmonic Distortion Ratio: 0.03 % (Typ) @PO = 1 W (VCC = 11 V, RL = 8 , PLIMIT = 0 V) Crosstalk: 100 dB (Typ) PSRR: 55 dB (Typ) Output Noise Voltage: -80 dBV (Typ) Standby Current: 0.1 A (Typ) Operating Current: 16 mA (Typ) (No Load nor Filter, No Signal) Operating Temperature Range: -25 C to +85 C Features Audio Source TEST OUT2N_LC* OUT2N GAIN_ BSP2N MS_SEL OUT2P SP ch2 (Rch) SYNC FSEL<2:0> BSP2P OUT2P_LC* OUT1N_LC* OUT1N BSP1N IN2N* Wireless Speakers, Small Active Speakers, Portable Audio Equipments, etc. IN2P* PDX Applications IN1N* SP ch1 (Lch) IN1P* 5.00 mm x 5.00 mm x 1.00 mm Typical Application Circuit ERRORX OUT1P_LC* OUT1P W (Typ) x D (Typ) x H (Max) VQFN032V5050 BSP1P Package PLIMIT Analog Differential Input Low Standby Current Output Feedback Circuitry Prevents Sound Quality Degradation Caused by Power Supply Voltage Fluctuation, Achieves Low Noise and Low Distortion, Eliminates the Need of Large Electrolytic-Capacitors for Decoupling Power Limit Function (Linearly-programmable for voltage of PLIMIT) Selectable Switching Frequency (AM Avoidance Function) Synchronization Control is Supported (Selectable Master and Slave Operation) Parallel BTL (PBTL) is Supported Wide Voltage Range (VCC = 4.5 V to 13 V) Operate with Single Power Supply High Efficiency and Low-heat-generation Make the System Smaller, Thinner, and More Power-saving Pop Noise Prevention During Power Supply ON/OFF High Reliability Design by Built-in Protection Circuits - Overheat Protection - Under Voltage Protection - Output Short Protection - Output DC Voltage Protection Small Package (VQFN032V5050) Achieves Mount Area Reduction MUTE Other device Figure 1. Typical Application Circuit *The phase of OUTxx_LC is inverted from the phase of INxx. ex. The phase of OUT1P_LC is inverted from the phase of IN1P. Product structure : Silicon integrated circuit www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 14 * 001 This product has no designed protection against radioactive rays. 1/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Pin Configuration ERRORX PDX TEST REGA NC VCCA VCCP1 BSP1P (TOP VIEW) 32 31 30 29 28 27 26 25 IN1P 1 24 OUT1P IN1N 2 23 GNDP1 PLIMIT 3 22 OUT1N GNDA 4 21 BSP1N EXP-PAD OUT2P IN2P 7 18 GNDP2 IN2N 8 17 OUT2N 10 11 12 13 14 15 16 BSP2N 9 VCCP2 19 NC 6 MUTEX GAIN_MS_SEL FSEL2 BSP2P FSEL1 20 FSEL0 5 SYNC REGG Figure 2. Pin Configuration www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 2/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Pin Description Pin No. Pin Name(Note 2) IO Internal Equivalent Circuit(Note 1) Function 30 k to 127.9 k 202.1 k to 300 k 1 IN1P I Positive audio signal input pin for Ch1 1 +-+ 2 2 IN1N I 30 k to 127.9 k 202.1 k to 300 k Negative audio signal input pin for Ch1 4 100 k 3 3 PLIMIT I + - Power limit level setting pin 100 k 4 4 GNDA - - Ground pin for Analog 27 Internal power supply pin for gate driver Please connect a capacitor. 5 REGG O 5 Caution: REGG of BD28412MUV should not be used as external supply. Therefore, do not connect anything except the capacitor for stabilization and the resistors for setting of GAIN_MS_SEL and PLIMIT. 200 k 4 2 k 6 6 GAIN_MS_SEL I Gain and Master/Slave mode setting pin 4 30 k to 127.9 k 202.1 k to 300 k 7 IN2P I Positive audio signal input pin for Ch2 7 +-+ 8 8 IN2N I Negative audio signal input pin for Ch2 30 k to 127.9 k 202.1 k to 300 k 4 5 9 SYNC I/O PWM clock input/output pin to synchronize multiple class D amplifiers 9 100 k 4 10 10 FSEL0 I PWM frequency setting pin 0 100 k 4 www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 3/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Pin Description - continued Pin No. Pin Name(Note 2) IO Function Internal Equivalent Circuit(Note 1) 5 11 FSEL1 I PWM frequency setting pin 1 11 100 k 4 12 FSEL2 I PWM frequency setting pin 2 13 MUTEX I Speaker output mute control pin High: Mute OFF Low: Mute ON 14 NC - 15 VCCP2 - 16 BSP2N O 17 OUT2N(Note 3) O 18 GNDP2 - 19 OUT2P(Note 3) O 20 BSP2P O 21 BSP1N O 22 OUT1N(Note 3) O 23 GNDP1 - 24 OUT1P(Note 3) O 25 BSP1P O 26 VCCP1 - 27 VCCA - 28 NC - Non- connection This pin should be opened. Connecting to ground is also available. Power supply pin for Ch2 Please connect a capacitor. 12, 13 100 k 4 - 15 Boot-strap pin of Ch2 negative Please connect a capacitor. Output pin of Ch2 negative PWM signal Please connect to output LPF. 5 16, 20 Ground pin for Ch2 for power. Output pin of Ch2 positive PWM signal Please connect to output LPF. Boot-strap pin of Ch2 positive Please connect a capacitor. Boot-strap pin of Ch1 negative Please connect a capacitor. Output pin of Ch1 negative PWM signal Please connect to output LPF. 17, 19 18 26 5 21, 25 Ground pin for Ch1 for power Output pin of Ch1 positive PWM signal Please connect to output LPF. Boot-strap pin of Ch1 positive Please connect a capacitor. Power supply pin for Ch1 Please connect a capacitor. Power supply pin for Analog Please connect a capacitor. Non- connection This pin should be opened. Connecting to ground is also available. Internal power supply pin Please connect a capacitor. 29 REGA O 22, 24 23 - 27 29 Caution: Regulator output pin for internal circuit should not be used as external supply. Therefore, do not connect anything except the capacitor for stabilization. 180 k 4 www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 4/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Pin Description - continued Pin No. Pin Name(Note 2) IO Internal Equivalent Circuit(Note 1) Function 30 30 TEST I Test pin Please connect to ground. 100 k 4 27 Power down setting pin 31 PDX I 55 k 31 High: Active Low: Standby 45 k 4 Error flag pin Please connect to pull-up resistor. 500 32 ERRORX O High: Normal Low: Error detected 32 Caution: An error flag occurs when Output Short Protection, DC Voltage Protection, or High Temperature Protection is activated. This flag shows LSI condition during operation. Use for purposes other than this product cannot be used. - EXP-PAD - There is no problem when EXP-PAD is left unconnected. However, connecting it to ground is recommended because the radiation performance will be degraded. The connection to any place except for the ground is prohibited. 4 EXP-PAD for heat radiation (Note 1) The numerical value of internal equivalent circuit is typical value, not guaranteed value. (Note 2) On succeeding pages, each pin names means the name of the pin and voltage value which is applied to the pin. (Note 3) On succeeding pages, OUT1P - OUT1N is OUT1, OUT2P - OUT2N is OUT2. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 5/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Block Diagram ERRORX PDX TEST REGA NC VCCA VCCP1 BSP1P (TOP VIEW) 32 31 30 29 28 27 26 25 PROTECT CONTROL I/F LDO 24 OUT1P 23 GNDP1 22 OUT1N REGG 1 21 BSP1N REGG IN1P 20 BSP2P 19 OUT2P 18 GNDP2 17 OUT2N REGG IN1N 2 DRIVER FET PWM PLIMIT 3 DRIVER FET PLIMIT GNDA 4 GAIN REGG 5 GAIN_MS_SEL 6 DRIVER FET LDO DRIVER FET PWM IN2P 7 IN2N 8 REGG OSC 13 14 15 NC VCCP2 16 BSP2N 12 MUTEX FSEL0 11 FSEL2 10 FSEL1 9 SYNC CONTROL I/F Figure 3. Block Diagram www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 6/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Absolute Maximum Ratings (Ta = 25 C) Parameter Supply Voltage(Note 4) Symbol Rating Unit Target Pins, Conditions VCCMAX -0.3 to +15.5 V VCCA, VCCP1, VCCP2 VIN -0.3 to +7 V IN1P, IN1N, IN2P, IN2N, PLIMIT, GAIN_MS_SEL, SYNC(Note 5), FSEL0, FSEL1, FSEL2, PDX, MUTEX Input Voltage2(Note 4) VERR -0.3 to +7 V ERRORX Pin Voltage(Note 4), (Note 6) VPIN -0.3 to +VCCMAX V OUT1P, OUT1N, OUT2P, OUT2N Storage Temperature Range Tstg -55 to +150 C - Tjmax +150 C - Input Voltage1(Note 4) Maximum Junction Temperature Caution 1: Operating the LSI over the absolute maximum ratings may damage the LSI. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the LSI is operated over the absolute maximum ratings. Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing board size and copper area so as not to exceed the maximum junction temperature rating. (Note 4) The voltage that can be applied reference to ground (GNDA, GNDP1, GNDP2). (Note 5) In case SYNC is specified as input mode. (Note 6) Please use under this rating including the AC peak waveform (overshoot) for all conditions. Only undershoot is allowed at condition of 15.5 V by the VCC reference and 10 ns (cf. Figure 4) VCC Overshoot from GND 15.5 V (Max) Undershoot from VCC 15.5 V (Max) GND 10 ns Figure 4. Overshoot and Undershoot www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 7/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Thermal Resistance(Note 7) Parameter Symbol Thermal Resistance (Typ) Unit 1s(Note 9) 2s2p(Note 10) JA 138.9 39.1 C/W JT 11 5 C/W VQFN032V5050 Junction to Ambient Junction to Top Characterization Parameter(Note 8) (Note 7) Based on JESD51-2A (Still-Air) (Note 8) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface of the component package. (Note 9) Using a PCB board based on JESD51-3. (Note 10) Using a PCB board based on JESD51-5, 7. Layer Number of Measurement Board Single Material Board Size FR-4 114.3 mm x 76.2 mm x 1.57 mmt Top Copper Pattern Thickness Footprints and Traces 70 m Layer Number of Measurement Board 4 Layers Material Board Size TR-4 114.3 mm x 76.2 mm x 1.6 mmt Top Thermal Via(Note 11) Pitch Diameter 1.20 mm 0.30 mm 2 Internal Layers Bottom Copper Pattern Thickness Copper Pattern Thickness Copper Pattern Thickness Footprints and Traces 70 m 74.2 mm x 74.2 mm 35 m 74.2 mm x 74.2 mm 70 m (Note 11) This thermal via connects with the copper pattern of all layers. Use a thermal design that allows for a sufficient margin in consideration of power dissipation under actual operating conditions. This LSI exposes its frame at the backside of package. Note that this part is assumed to use after providing heat dissipation treatment to improve heat dissipation efficiency. Try to occupy as wide as possible with heat dissipation pattern not only on the board surface but also the backside. Recommended Operating Conditions Parameter Symbol Min Typ Max Unit Operating Temperature Topr -25 +25 +85 C - Supply Voltage VCC 4.5 - 13 V VCCA, VCCP1, VCCP2 RL1 5.4 - - BTL RL2 3.2 - - High Level Input Voltage VIH 2.0 - 3.3 V Low Level Input Voltage VIL 0 - 0.8 V Low Level Output Voltage VOL - - 0.8 V PBTL FSEL0, FSEL1, FSEL2, PDX, MUTEX FSEL0, FSEL1, FSEL2, PDX, MUTEX ERRORX, IOL = 0.5 mA Load Impedance(Note 12) Target Pins, Conditions (Note 12) Tj < 150 C www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 8/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Electrical Characteristics (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fPWM = 600 kHz, fIN = 1 kHz, RL = 8 , PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 15 H, C = 1 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) Parameter Symbol Min Typ Max Unit Standby Current ICC1 - 0.1 25 A Mute Current ICC2 - 10 20 mA Active Current ICC3 - 16 32 mA VREGG 4.45 5.55 6.05 V Input Impedance 1 RIN1 50 - - k Input Impedance 2 RIN2 140 200 260 k Output Power(Note 13) PO1 - 9 - W Gain 1(Note 13) GV1 19 20 21 dB Gain 2(Note 13) GV2 25 26 27 dB Gain 3(Note 13) GV3 31 32 33 dB Gain 4(Note 13) GV4 35 36 37 dB Total Harmonic Distortion(Note 13) THD - 0.03 - % CT 60 100 - dB VCC = 12 V, THD+N = 10 % PO = 1 W, GAIN_MS_SEL = 0 V PO = 1 W, GAIN_MS_SEL = 2/9 x VREGG PO = 1 W, GAIN_MS_SEL = 3/9 x VREGG PO = 1 W, GAIN_MS_SEL = 4/9 x VREGG PO = 1 W, BW = AES17 PO = 1 W, 1 kHz BPF PSRR - 55 - dB VRIPPLE = 0.2 VP-P, f = 1 kHz VNO - -80 -70 dBV fPWM1 1128 1200 1272 kHz fPWM2 940 1000 1060 kHz fPWM3 564 600 636 kHz fPWM4 470 500 530 kHz fPWM5 376 400 424 kHz Regulator Output Voltage Crosstalk(Note 13) PSRR(Note 13) Output Noise Voltage(Note 13) PWM (Pulse Width Modulation) Frequency Target Pins, Conditions No load nor filter, PDX = 0 V, MUTEX = 0 V No load nor filter, PDX = 3.3 V, MUTEX = 0 V No load or filter, No signal, PDX = 3.3 V, MUTEX = 3.3 V PDX = 3.3 V, MUTEX = 3.3 V MUTEX, PDX, FSEL0, FSEL1, FSEL2, SYNC (Slave mode only) PLIMIT PO = 0 W, BW = A-Weight FSEL2 = 3.3 V, FSEL1 = 3.3 V, FSEL0 = 3.3 V FSEL2 = 3.3 V, FSEL1 = 3.3 V, FSEL0 = 0 V FSEL2 = 3.3 V, FSEL1 = 0 V, FSEL0 = 3.3 V FSEL2 = 3.3 V, FSEL1 = 0 V, FSEL0 = 0 V FSEL2 = 0 V, FSEL1 = 3.3 V, FSEL0 = 3.3 V (Note 13) The typical performance of device is shown in the Limits of these items. It largely depends on the board layout, parts, and power supply. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 9/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Typical Performance Curves (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fPWM = 600 kHz, fIN = 1 kHz, PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 15 H, C = 1 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) 10 45 No load nor filter No signal "Power Down" Standby Current ICC1 [A] 8 No load nor filter No signal "MUTE" "ACTIVE" 40 Circuti Current : ICC2, ICC3 [mA] 9 7 6 5 4 3 2 1 35 ACTIVE with snubber 30 25 ACTIVE without snubber 20 15 10 MUTE 5 0 4 6 8 10 12 Supply Voltage : VCC [V] 0 14 4 Figure 5. Standby Current vs Supply Voltage (Power Down) 8 10 12 Supply Voltage : VCC [V] 14 Figure 6. Circuit Current vs Supply Voltage (MUTE, ACTIVE) 100 100 VCC = 5 V VCC = 9 V VCC = 12 V 90 90 80 80 70 VCC = 5 V 70 RL = 8 Efficiency [%] Efficiency [%] 6 60 50 40 VCC = 9 V VCC = 12 V RL = 6 60 50 40 30 30 20 20 10 10 0 0 0 2 4 6 8 10 12 0 14 Output Power [W/Ch] 4 6 8 10 12 14 Output Power [W/Ch] Figure 7. Efficiency vs Output Power (RL = 8 ) www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 2 Figure 8. Efficiency vs Output Power (RL = 6 ) 10/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Typical Performance Curves - continued (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fPWM = 600 kHz, fIN = 1 kHz, PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 15 H, C = 1 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) 16 100 VCC = 5 V 90 VCC = 9 V VCC = 12 V 14 RL = 8 80 12 PBTL RL = 4 Output LC filter: L = 10 H, C = 2.2 F 60 50 Output Power [W/Ch] Efficiency [%] 70 40 30 10 THD+N = 10 % 8 6 THD+N = 1 % 4 20 2 10 0 0 0 2 4 6 8 10 12 14 16 18 20 4 22 6 10 12 14 Supply Voltage : VCC [V] Output Power [W/Ch] Figure 10. Output Power vs Supply Voltage (RL = 8 ) Figure 9. Efficiency vs Output Power (PBTL, RL = 4 ) 16 24 PBTL RL = 4 Output LC filter: L = 10 H, C = 2.2 F 22 14 RL = 6 20 12 18 Output Power [W/Ch] Output Power [W/Ch] 8 THD+N = 10 % 10 8 6 THD+N = 1 % 4 16 14 THD+N = 10 % 12 10 8 THD+N = 1 % 6 4 2 2 0 0 4 6 8 10 12 14 Supply Voltage : VCC [V] 6 8 10 12 14 Supply Voltage : VCC [V] Figure 11. Output Power vs Supply Voltage (RL = 6 ) www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 4 Figure 12. Output Power vs Supply Voltage (PBTL, RL = 4 ) 11/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Typical Performance Curves - continued (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fPWM = 600 kHz, fIN = 1 kHz, PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 15 H, C = 1 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) 2.5 2.5 RL = 6 RL = 8 VCC = 12 V Current Consumption : ICC [A] Current Consumption : ICC [A] 2 VCC = 9 V 1.5 VCC = 5 V 1 0.5 VCC = 9 V 2 VCC = 12 V 1.5 VCC = 5 V 1 0.5 0 0 0 2 4 6 8 10 12 14 0 2 4 6 8 10 12 14 Output Power [W/Ch] Output Power [W/Ch] Figure 14. Current Consumption vs Output Power (RL = 6 ) Figure 13. Current Consumption vs Output Power (RL = 8 ) 2.5 PBTL RL = 4 Output LC filter: L = 10 H, C = 2.2 F Current Consumption : ICC [A] 2 VCC = 12 V 1.5 VCC = 9 V 1 VCC = 5 V 0.5 0 0 2 4 6 8 10 12 14 16 18 20 22 Output Power [W/Ch] Figure 15. Current Consumption vs Output Power (PBTL, RL = 4 ) www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 12/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Typical Performance Curves - continued (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fPWM = 600 kHz, fIN = 1 kHz, PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 15 H, C = 1 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) 0 36 OUT1 OUT2 FFT of Output Noise Voltage [dBV] -20 No Signal RL = 8 OUT1 OUT2 PO = 1 W RL = 8 31 Voltage Gain [dB] -40 -60 -80 -100 26 21 -120 -140 16 10 100 1k 10k 100k 10 100 Frequency [Hz] 1k 10k 100k Frequency [Hz] Figure 17. Voltage Gain vs Frequency (RL = 8 ) Figure 16. FFT of Output Noise Voltage vs Frequency (RL = 8 ) 10 10 OUT1 OUT2 fIN = 1 kHz fIN = 100 Hz fIN = 6 kHz 1 PO = 1 W Filter: AES17 RL = 8 1 THD+N [%] THD+N [%] fIN = 6 kHz fIN = 1 kHz 0.1 0.01 0.01 fIN = 100 Hz 0.001 0.01 0.1 Filter: AES17 RL = 8 0.001 0.1 1 10 100 100 1k 10k 100k Frequency [Hz] Output Power [W] Figure 19. THD+N vs Frequency (RL = 8 ) Figure 18. THD+N vs Output Power (RL = 8 ) www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 10 13/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Typical Performance Curves - continued (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fPWM = 600 kHz, fIN = 1 kHz, PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 15 H, C = 1 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) 0 0 OUT1 to OUT2 OUT2 to OUT1 -20 -20 -40 -60 -60 -80 -80 -100 -100 -120 0.01 -120 0.1 1 10 100 10 100 Output Power [W] 1k 10k 100k Frequency [Hz] Figure 20. Crosstalk vs Output Power (RL = 8 ) Figure 21. Crosstalk vs Frequency (RL = 8 ) 36 0 OUT1 OUT2 -20 OUT1 OUT2 No Signal RL = 6 PO = 1 W RL = 6 31 -40 Voltage Gain [dB] FFT of Output Noise Voltage [dBV] PO = 1 W RL = 8 -40 Crosstalk [dB] Crosstalk [dB] OUT1 to OUT2 OUT2 to OUT1 RL = 8 -60 -80 -100 26 21 -120 16 -140 10 100 1k 10k 100k 100 1k 10k 100k Frequency [Hz] Frequency [Hz] Figure 23. Voltage Gain vs Frequency (RL = 6 ) Figure 22. FFT of Output Noise Voltage vs Frequency (RL = 6 ) www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 10 14/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Typical Performance Curves - continued (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fPWM = 600 kHz, fIN = 1 kHz, PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 15 H, C = 1 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) 10 10 fIN = 1 kHz fIN = 100 Hz fIN = 6 kHz PO = 1 W Filter: AES17 RL = 6 1 1 fIN = 1 kHz 0.1 0.01 OUT1 OUT2 THD+N [%] THD+N [%] fIN = 6 kHz 0.1 0.01 fIN = 100 Hz Filter: AES17 RL = 6 0.001 0.01 0.001 0.1 1 10 100 10 Figure 24. THD+N vs Output Power (RL = 6 ) Figure 25. THD+N vs Frequency (RL = 6 ) 100k 0 OUT1 to OUT2 OUT2 to OUT1 OUT1 to OUT2 OUT2 to OUT1 RL = 6 -20 PO = 1 W RL = 6 -40 Crosstalk [dB] Crosstalk [dB] 10k Frequency [Hz] -40 -60 -60 -80 -80 -100 -100 -120 0.01 1k Output Power [W] 0 -20 100 -120 0.1 1 10 100 10 100 1k 10k Output Power [W] Frequency [Hz] Figure 26. Crosstalk vs Output Power (RL = 6 ) Figure 27. Crosstalk vs Frequency (RL = 6 ) www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 15/40 100k TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Typical Performance Curves - continued (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fPWM = 600 kHz, fIN = 1 kHz, PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 10 H, C = 2.2 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) 36 0 No Signal PBTL RL = 4 FFT of Output Noise Voltage [dBV] -20 PO = 1 W PBTL RL = 4 31 Voltage Gain [dB] -40 -60 -80 -100 26 21 -120 -140 16 10 100 1k 10k 100k 10 100 1k Frequency [Hz] Figure 29. Voltage Gain vs Frequency (PBTL, RL = 4 ) 10 10 PO = 1 W Filter: AES17 PBTL RL = 4 fIN = 1 kHz fIN = 100 Hz fIN = 6 kHz 1 fIN = 6 kHz THD+N [%] THD+N [%] 1 fIN = 1 kHz 0.1 0.001 0.01 100k Frequency [Hz] Figure 28. FFT of Output Noise Voltage vs Frequency (PBTL, RL = 4 ) 0.01 10k 0.1 0.01 fIN = 100 Hz Filter: AES17 PBTL RL = 4 0.001 0.1 1 10 100 100 1k 10k 100k Frequency [Hz] Output Power [W] Figure 30. THD+N vs Output Power (PBTL, RL = 4 ) www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 10 Figure 31. THD+N vs Frequency (PBTL, RL = 4 ) 16/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Typical Performance Curves - continued (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fIN = 1 kHz, PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 15 H, C = 1 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) 36 0 OUT1 OUT2 fPWM = 400 kHz No Signal RL = 8 fPWM = 400 kHz PO = 1 W RL = 8 31 -40 Voltage Gain [dB] FFT of Output Noise Voltage [dBV] -20 -60 -80 -100 26 21 -120 16 -140 10 100 1k 10k 10 100k 1k 10k Frequency [Hz] Frequency [Hz] Figure 32. FFT of Output Noise Voltage vs Frequency (fPWM = 400 kHz, RL = 8 ) Figure 33. Voltage Gain vs Frequency (fPWM = 400 kHz, RL = 8 ) 1 fIN = 6 kHz THD+N [%] fIN = 1 kHz 0.1 0.01 0.001 0.01 fPWM = 400 kHz PO = 1 W Filter: AES17 RL = 8 OUT1 OUT2 fIN = 1 kHz fIN = 100 Hz fIN = 6 kHz 1 100k 10 10 THD+N [%] 100 0.1 0.01 fIN = 100 Hz fPWM = 400 kHz Filter: AES17 RL = 8 0.001 0.1 1 10 100 Output Power [W] 100 1k 10k 100k Frequency [Hz] Figure 35. THD+N vs Frequency (fPWM = 400 kHz, RL = 8 ) Figure 34. THD+N vs Output Power (fPWM = 400 kHz, RL = 8 ) www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 10 17/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Typical Performance Curves - continued (Unless otherwise specified, Ta = 25 C, VCC = 11 V, fIN = 1 kHz, PDX = 3.3 V, MUTEX = 3.3 V, PLIMT = 0 V, Gain = 26 dB, Output LC filter: L = 15 H, C = 1 F when VCC > 11 V, snubber circuit is added: C = 680 pF, R = 5.6 ) 0 OUT1 to OUT2 OUT2 to OUT1 fPWM = 400 kHz RL = 8 -40 fPWM = 400 kHz PO = 1 W RL = 8 -40 -60 -80 -60 -80 -100 -100 -120 0.01 OUT1 to OUT2 OUT2 to OUT1 -20 Crosstalk [dB] Crosstalk [dB] -20 0 -120 0.1 1 10 100 Output Power [W] 100 1k 10k 100k Frequency [Hz] Figure 36. Crosstalk vs Output Power (fPWM = 400 kHz, RL = 8 ) www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 10 Figure 37. Crosstalk vs Frequency (fPWM = 400 kHz, RL = 8 ) 18/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Timing Chart VCCP1 1. Power up VCCP1, VCCP2, and VCCA simultaneously. And, all of these voltages should have the same value. 8. Power down VCCP1, VCCP2, and VCCA simultaneously. VCCP2 VCCA t 2. After power up, please set PDX to High. 7. Set PDX to Low. PDX t 4. Input audio signal. 5. Stop audio signal. IN1P IN1N IN2P IN2N t 200 ms or over 3. After input pin voltage rises, please set MUTEX to High. 6. After input signal stops, please set MUTEX to Low. MUTEX t OUT1P OUT1N OUT2P OUT2N t Speaker BTL output (After LC filter) t Figure 38. Power Up/Down Sequence www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 19/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Function Descriptions 1 The Setting of Power Down and Mute Pin Setting Normal PWM output ERRORX PDX MUTEX Output(Note 15) OUT1P, 1N, 2P, 2N High-Z_Low(Note 14) Low/ Low High High (Standby) (Note 14) High-Z_Low High Low High (MUTE_ON) Active High High High (MUTE_OFF) ERROR Detection PWM output ERRORX Output(Note 15) OUT1P, 1N, 2P, 2N High-Z_Low(Note 14) High (Standby) (Note 14) High-Z_Low Low (MUTE_ON) High-Z_Low(Note 14) Low (MUTE_ON) (Note 14) All power transistors are OFF and output pins are pulled down by 40 k (Typ). (Note 15) ERRORX is pulled up by 10 k resistor. 2 Gain and Master/Slave Setting Master/slave and gain are set by GAIN_MS_SEL voltage. REGG R6A R6A(Note 16) (to REGG) [k] 18 18 33 51 68 68 68 open REGG GAIN_MS_SEL R6B R6B(Note 16) (to ground) [k] Open 68 68 68 51 33 18 18 Master/Slave Gain [dB] Slave Slave Slave Slave Master Master Master Master 36 32 26 20 36 32 26 20 Input Impedance (IN1P,IN1N,IN2P,IN2N) [k] 30.0 (Typ) 45.1 (Typ) 79.3 (Typ) 127.9 (Typ) 30.0 (Typ) 45.1 (Typ) 79.3 (Typ) 127.9 (Typ) (Note 16) Please use 1 % tolerance resistor. Figure 39. GAIN_MS_SEL Setting Setting cannot be changed when LSI is active, but it can be set by rebooting (PDX = High to Low to High). Master/Slave Function This LSI has master and slave mode, and PWM frequency of two LSIs can be synchronized. In case the LSI is master mode, SYNC becomes signal output pin for synchronization and in case the LSI is slave mode, it becomes signal input pin for synchronization. So, in case PWM frequency of two LSIs need to be synchronized, be sure to connect the SYNC pins each other. Also setting of the FSEL2, FSEL1 and FSEL0 pins of 2 LSIs must be the same. 3 Parallel BTL Function Parallel BTL mode can be set by connecting IN2P and IN2N to ground. Please short OUT1P to OUT2P and OUT1N to OUT2N at near the LSI as much as possible. Do not connect IN1P and IN1N to ground. Stereo BTL Differential input IN1P OUT1P IN1N Parallel BTL Differential input IN1P OUT1P OUT1N IN1N OUT1N IN2P OUT2P IN2P OUT2P IN2N OUT2N IN2N OUT2N Figure 40. Parallel BTL Mode www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 20/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Function Descriptions - continued 4 Power Limit Function It is possible to limit the maximum output voltage for protection of speaker. Power:PPLIM[W] OutputPower LimitedOutput [W] Limited lim 12 Speaker output Soft clip Output voltage Typ 10 VCC = 12 V RL = 8 8 6 4 2 0 0 2 4 6 PLIMIT Voltage: VPLIMIT [V][V] PLIMIT pin voltage VPLIMIT Figure 41. Power Limit Waveform Figure 42. Power Limit C29 0.1 F REGA 29 LDO REGG 5 LDO C5 1 F R3A PLIMIT R3B 3 PLIMIT RIN2 Figure 43. PLIMIT Setting When the DC voltage is applied to PLIMIT, an output wave is clipped (Figure 41), and output power is limited. The relation between the voltage of PLIMIT (VPLIMIT) and limited output power PLIM is shown in Figure 42. It is possible that the voltage VPLIMIT is set by connecting external resistance R3A and R3B (Figure 43). The examples of setting R3A and R3B is shown in the table below. In case the power limit function is not used, connect PLIMIT to ground. R3A [k] R3B [k] Open 12 10 8.2 Short to ground 20 20 20 www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 Max output power PLIM [W] (RL = 8 ) Min Typ Max (unlimited) 3.4 6.8 13.6 2.5 5.0 10.0 1.7 3.4 6.8 21/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Function Descriptions - continued In case the power limit function is used under the setting except the table, PLIM is PLIM VPLIMIT (VREGA - VPLIMIT ) 2 39.8 [W] 2 RL 1 VREGG [V] 1 1 1 R3 A ( ) R3 A R3 B RIN 2 Where: VREGA is the voltage of REGA, 5.0 V (Typ) VREGG is the voltage of REGG, 5.55 V (Typ) RIN2 is pull-down resistance of PLIMIT, 200 k (Typ) Set the R3A and R3B to become the limited power. 5 FSEL2, FSEL1 and FSEL0 Setting (AM Avoidance Function) The FSEL2, FSEL1 and FSEL0 pins are used for PWM frequency setting. They can change the PWM frequency like below. FSEL2 FSEL1 FSEL0 PWM Frequency [kHz] High High High 1200 (Typ) High High Low 1000 (Typ) High Low High 600 (Typ) High Low Low 500 (Typ) Low High High 400 (Typ) Do not set following conditions to become un-recommended frequency: FSEL2 = Low, FSEL1 = High, FSEL0 = Low FSEL2 = Low, FSEL1 = Low, FSEL0 = High FSEL2 = FSEL1 = FSEL0 = Low 6 AM Avoidance Function PWM frequency is near to AM radio frequency band when this makes interference during AM radio is used, and may negatively affects reception of AM radio wave. This interference can be reduced by adjusting PWM frequency. Below are the recommended settings. For example, when receiving AM radio wave of 1269 kHz in Asia/Europe, PWM frequency must be set to 500 kHz. AM Frequency [kHz] Americas 540 to 917 917 to 1125 1125 to 1375 1375 to 1547 1547 to 1700 Recommended PWM Frequency Setting Asia/ Europe fPWM = 400 kHz FSEL2 = Low FSEL1 = High FSEL0 = High fPWM = 500 kHz FSEL2 = High FSEL1 = Low FSEL0 = Low fPWM = 600 kHz FSEL2 = High FSEL1 = Low FSEL0 = High fPWM = 1000 kHz FSEL2 = High FSEL1 = High FSEL0 = Low fPWM = 1200 kHz FSEL2 = High FSEL1 = High FSEL0 = High 522 to 540 540 to 914 914 to 1122 1122 to 1373 1373 to 1548 1548 to 1701 - www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 22/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Application Examples Application Circuit Example 1 (Stereo BTL, VCC = 4.5 V to 11 V) Overshoot of PWM output occurs depending on the board layout. Be sure to confirm that the voltage of the output pins are lower than absolute maximum ratings. If it exceeds the absolute maximum ratings, snubber circuit need to be added. The example of snubber circuit is shown in the next page. 32 C1 1 F 31 PROTECT IN1P VCC C26A 0.1 F C26B 10 F C27B 4.7 F 30 28 27 BSP1P VCCA NC 29 CONTROL I/F 1 C29 0.1 F REGA PDX ERRORX R32 10 k TEST 3.3 V To MCU VCC C27A 0.1 F VCCP1 1 26 C25 2.2 F 25 L24A 15 H LDO 24 REGG 3 Source PLIMIT 4 GAIN REGG REGG C5 1 F REGG R6A GAIN_MS_SEL R6B C7 1 F IN2P IN2N 5 DRIVER FET LDO DRIVER FET 6 21 19 7 18 REGG 8 OSC CONTROL I/F C8 1 F 12 13 FSEL2 11 FSEL1 10 FSEL0 SYNC 9 BSP1N 20 BSP2P PWM L22A C21 2.2 F 15 H C20 2.2 F L19A 15 H OUT2P C19A 1 F GNDP2 RL=8 /6 C17A 1 F 17 OUT2N L17A 15 H 14 MUTEX GNDA Audio RL=8 /6 22 OUT1N DRIVER FET R3B C24A 1 F C22A 1 F REGG REGG PLIMIT 23 DRIVER FET PWM OUT1P GNDP1 15 VCC C15A 0.1 F C16 2.2 F 16 BSP2N R3A 2 C2 1 F VCCP2 REGG NC IN1N C15B 10 F Figure 44. Application Circuit 1 BOM 1 (Stereo BTL, VCC = 4.5 V to 11 V) Parts Qty. Parts No. 1 R3A 1 R3B Resistor 1 R6A 1 R6B 1 R32 4 C1, C2, C7, C8 C5(Note 17) 1 C15A, C26A, C27A(Note 17) 3 C15B, C26B(Note 17) 2 Capacitor C16, C20, C21, C25(Note 17) 4 4 C17A, C19A, C22A, C24A C27B(Note 17) 1 C29(Note 17) 1 Inductor 4 L17A, L19A, L22A, L24A Description Ref. Function Description 4 Power Limit Function Ref. Function Description 2 Gain and Master/Slave Setting 10 k, 1/16 W, J (5 %) 1 F, 16 V, B (10 %) 1 F, 16 V, B (10 %) 0.1 F, 25 V, B (10 %) 10 F, 25 V, B (10 %) 2.2 F, 16 V, B (10 %) 1 F, 25 V, B (10 %) 4.7 F, 25 V, B (10 %) 0.1 F, 16 V, B (10 %) 15 H, 2.1 A, 20 % (Note 17) Please place it near pin as much as possible. Also, please mount C15 and C26 as close as possible to the VCC/ground pin on the same side as the LSI mounted side. Even if VCC/ground wiring is shorted on the board, either C15 or C26 cannot be removed. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 23/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Application Examples - continued Application Circuit Example 2 (Stereo BTL, VCC = 11 V to 13 V) Please add the snubber circuit at the output pins as shown below when VCC = 11 V to 13 V. 32 C1 1 F C26A 0.1 F C26B 10 F 31 30 29 28 27 BSP1P NC VCCA C29 0.1 F REGA TEST C27B 4.7 F 26 C25 2.2 F 25 OUT1P PROTECT IN1P VCC C27A 0.1 F PDX ERRORX R32 10 k To MCU VCC 3.3 V VCCP1 2 CONTROL I/F 1 LDO 24 REGG 3 Source REGG REGG C5 REGG 1 F R6A GAIN_MS_SEL R6B C7 1 F IN2P IN2N REGG REGG Audio PLIMIT 4 GAIN 5 DRIVER FET LDO DRIVER FET 6 21 REGG OSC 17 CONTROL I/F 12 13 FSEL2 11 FSEL1 10 FSEL0 SYNC 9 5.6 680 pF BSP1N OUT2P 18 8 R22 C22C OUT1N C24A 1 F RL=8 /6 C22A 1 F L22A C21 2.2 F 15 H Snubber circuit 19 7 C8 1 F 680 pF 5.6 20 BSP2P PWM C20 2.2 F L19A 15 H C19C R19 GNDP2 680 pF 5.6 C19A 1 F R17 C17C OUT2N 5.6 680 pF C17A 1 F RL=8 /6 L17A 15 H 14 MUTEX GNDA 22 DRIVER FET R3B C24C R24 GNDP1 15 VCC C15A 0.1 F C16 2.2 F 16 BSP2N PLIMIT 23 DRIVER FET PWM VCCP2 R3A 2 C2 1 F NC IN1N REGG L24A 15 H C15B 10 F Figure 45. Application Circuit 2 BOM 2 (Stereo BTL, VCC = 11 V to 13 V) Parts Qty. Parts No. 1 R3A 1 R3B 1 R6A Resistor 1 R6B 1 R32 R17, R19, R22, R24(Note 18) 4 4 C1, C2, C7, C8 C5(Note 18) 1 C15A, C26A, C27A(Note 18) 3 C15B, C26B(Note 18) 2 C16, C20, C21, C25(Note 18) 4 Capacitor 4 C17A, C19A, C22A, C24A C17C, C19C, C22C, 4 C24C(Note 18) C27B(Note 18) 1 C29(Note 18) 1 Inductor 4 L17A, L19A, L22A, L24A Description Ref. Function Description 4 Power Limit Function Ref. Function Description 2 Gain and Master/Slave Setting 10 k, 1/16 W, J (5 %) 5.6 , 1/10 W, J (5 %) 1 F, 16 V, B (10 %) 1 F, 16 V, B (10 %) 0.1 F, 25 V, B (10 %) 10 F, 25 V, B (10 %) 2.2 F, 16 V, B (10 %) 1 F, 25 V, B (10 %) 680 pF, 25 V, B (10 %) 4.7 F, 25 V, B (10 %) 0.1 F, 16 V, B (10 %) 15 H, 2.1 A, 20 % (Note 18) Please place it near pin as much as possible. Also, please mount C15 and C26 as close as possible to the VCC/ground pin on the same side as the LSI mounted side. Even if VCC/ground wiring is shorted on the board, either C15 or C26 cannot be removed. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 24/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Application Examples - continued Application Circuit Example 3 (Monaural PBTL, VCC = 4.5 V to 11 V) Overshoot of PWM output occurs depending on the board layout. Be sure to confirm that the voltage of the output pins are lower than absolute maximum ratings. If it exceeds the absolute maximum ratings, snubber circuit need to be added. The example of snubber circuit is shown in the next page. 32 C1 1 F 1 IN1N 2 C26A 0.1 F C26B 10 F 31 30 29 28 27 BSP1P NC VCCA C29 0.1 F REGA TEST C27B 4.7 F 26 C25 2.2 F 25 L24B 10 H OUT1P PROTECT IN1P VCC C27A 0.1 F PDX ERRORX R32 10 k To MCU VCC 3.3 V VCCP1 3 CONTROL I/F LDO 24 C24B 2.2 F REGG PWM 3 GAIN 5 R6A GAIN_MS_SEL R6B 6 IN2P 7 IN2N 8 DRIVER FET LDO L22B 10 H 20 BSP2P C20 2.2 F DRIVER FET 19 PWM OUT2P 18 GNDP2 REGG OSC 10 11 12 13 MUTEX SYNC 9 17 OUT2N CONTROL I/F FSEL2 REGG REGG C5 REGG 1 F PLIMIT 4 FSEL1 Audio Source 22 OUT1N C21 2.2 F 21 BSP1N REGG REGG DRIVER FET FSEL0 GNDA RL=4 14 VCC 15 C16 2.2 F 16 BSP2N PLIMIT R3B GNDP1 C22B 2.2 F VCCP2 R3A C2 1 F NC REGG 23 DRIVER FET C15A 0.1 F C15B 10 F Figure 46. Application Circuit 3 BOM 3 (Monaural PBTL, VCC = 4.5 V to 11 V) Parts Qty. Parts No. 1 R3A 1 R3B Resistor 1 R6A 1 R6B 1 R32 2 C1, C2 C5(Note 19) 1 C15A, C26A, C27A(Note 19) 3 C15B, C26B(Note 19) 2 Capacitor 4 C16, C20, C21, C25 C22B, C24B(Note 19) 2 1 C27B C29(Note 19) 1 Inductor 2 L22B, L24B Description Ref. Function Description 4 Power Limit Function Ref. Function Description 2 Gain and Master/Slave Setting 10 k, 1/16 W, J (5 %) 1 F, 16 V, B (10 %) 1 F, 16 V, B (10 %) 0.1 F, 25 V, B (10 %) 10 F, 25 V, B (10 %) 2.2 F, 16 V, B (10 %) 2.2 F, 25 V, B (10 %) 4.7 F, 25 V, B (10 %) 0.1 F, 16 V, B (10 %) 10 H, 2.6 A, 20 % (Note 19) Please place it near pin as much as possible. Also, please mount C15 and C26 as close as possible to the VCC/ground pin on the same side as the LSI mounted side. Even if VCC/ground wiring is shorted on the board, either C15 or C26 cannot be removed. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 25/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Application Examples - continued Application Circuit Example 4 (Monaural PBTL, VCC = 11 V to 13 V) Please add the snubber circuit at the output pins as shown below when VCC = 11 V to 13 V. 32 C1 1 F C26A 0.1 F C26B 10 F 31 30 28 27 26 BSP1P VCCA NC 29 CONTROL I/F 1 C29 0.1 F REGA TEST C27B 4.7 F PROTECT IN1P VCC C27A 0.1 F PDX ERRORX R32 10 k To MCU VCC 3.3 V VCCP1 4 C25 2.2 F 25 L24B 10 H LDO 24 REGG 3 5 R6A GAIN_MS_SEL R6B 6 IN2P 7 IN2N 8 DRIVER FET LDO GNDP1 OUT1N C24C 680 pF R24 5.6 C24B 2.2 F 5.6 680 pF C22B 2.2 F R22 C22C 20 BSP2P C20 2.2 F DRIVER FET 19 PWM RL=4 L22B 10 H C21 2.2 F BSP1N 21 REGG REGG GAIN Snubber circuit OUT2P 18 GNDP2 REGG OSC 10 11 12 13 MUTEX SYNC 9 17 OUT2N CONTROL I/F FSEL2 REGG 4 FSEL1 Source REGG C5 REGG 1 F PLIMIT FSEL0 Audio 22 DRIVER FET R3B GNDA 23 DRIVER FET PWM PLIMIT OUT1P 14 VCC 15 C16 2.2 F 16 BSP2N R3A 2 C2 1 F VCCP2 REGG NC IN1N C15A 0.1 F C15B 10 F Figure 47. Application Circuit 4 BOM 4 (Monaural PBTL, VCC = 11 V to 13 V) Parts Qty. Parts No. 1 R3A 1 R3B 1 R6A Resistor 1 R6B 1 R32 R22, R24(Note 20) 2 2 C1, C2 C5(Note 20) 1 C15A, C26A, C27A(Note 20) 3 C15B, C26B(Note 20) 2 C16, C20, C21, C25(Note 20) Capacitor 4 2 C22B, C24B C22C, C24C(Note 20) 2 C27B(Note 20) 1 C29(Note 20) 1 Inductor 2 L22B, L24B Description Ref. Function Description 4 Power Limit Function Ref. Function Description 2 Gain and Master/Slave Setting 10 k, 1/16 W, J (5 %) 5.6 , 1/10 W, J (5 %) 1 F, 16 V, B (10 %) 1 F, 16 V, B (10 %) 0.1 F, 25 V, B (10 %) 10 F, 25 V, B (10 %) 2.2 F, 16 V, B (10 %) 2.2 F, 25 V, B (10 %) 680 pF, 25 V, B (10 %) 4.7 F, 25 V, B (10 %) 0.1 F, 16 V, B (10 %) 10 H, 2.6 A, 20 % (Note 20) Please place it near pin as much as possible. Also, please mount C15 and C26 as close as possible to the VCC/ground pin on the same side as the LSI mounted side. Even if VCC/ground wiring is shorted on the board, either C15 or C26 cannot be removed. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 26/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Application Examples - continued Application Example 5 (MASTER/SLAVE mode, VCC = 4.5 V to 11 V) To MCU VCC 31 PROTECT IN1P 30 28 27 BSP1P VCCA NC 29 CONTROL I/F 1 C26Bm 10 F C29m 0.1 F REGA TEST PDX ERRORX 32 C1m 1 F C26Am 0.1 F C27Bm 4.7 F R32m 10 k Master Stereo BTL VCC C27Am 0.1 F 3.3 V VCCP1 5 This GAIN_MS_SEL setting is one example. So, another Gain setting can be used. 26 C25m 2.2 F 25 L24Am 15 H LDO 24 REGG PWM PLIMIT 3 GNDA R6Am R6Bm GAIN_MS_SEL C7m 1 F GAIN 5 DRIVER FET LDO DRIVER FET 6 20 BSP2P 19 PWM IN2P IN2N 7 18 REGG 8 OSC CONTROL I/F C8m 1 F 12 13 FSEL2 FSEL0 11 FSEL1 10 SYNC 9 14 VCC 15 To MCU VCC 31 PROTECT IN1P 1 IN1N 2 30 28 27 17 OUT2N C16m 2.2 F C15Bm 10 F 26 BSP1P VCCP1 VCCA C29s 0.1 F C25s 2.2 F 25 L24Bs 10 H LDO 24 PWM 3 GNDA DRIVER FET REGG2 C5s REGG 1 F GAIN_MS_SEL R6Bs 5 DRIVER FET LDO DRIVER FET 6 OUT2P 18 GNDP2 REGG OSC SYNC 9 10 11 CONTROL I/F 12 13 14 VCC 15 C15As 0.1 F 17 OUT2N C16s 2.2 F 16 BSP2N 8 VCCP2 IN2N L22Bs 10 H 20 BSP2P C20s 2.2 F 19 7 MUTEX IN2P RL=4 22 OUT1N C21s 2.2 F 21 BSP1N PWM FSEL2 R6As GAIN FSEL1 REGG2 PLIMIT 4 FSEL0 Audio Source GNDP1 C22Bs 2.2 F REGG REGG PLIMIT R3Bs C24Bs 2.2 F OUT1P 23 DRIVER FET NC R3As C2s 1 F RL=8 /6 C17Am 1 F REGG REGG2 C19Am 1 F C26Bs 10 F 29 CONTROL I/F OUT2P C26As 0.1 F NC TEST PDX ERRORX 32 C20m 2.2 F L19Am 15 H GNDP2 16 C27Bs 4.7 F R32s 10 k REGA Slave Monaural PBTL L22Am 15 H VCC C27As 0.1 F 3.3 V C21m 2.2 F L17Am 15 H C15Am 0.1 F C1s 1 F 21 BSP1N BSP2N REGG1 REGG1 C5m REGG 1 F PLIMIT 4 MUTEX Audio Source RL=8 /6 22 OUT1N DRIVER FET R3Bm C24Am 1 F GNDP1 C22Am 1 F VCCP2 R3Am C2m 1 F 23 DRIVER FET NC REGG1 2 REGG REGG IN1N OUT1P C15Bs 10 F Figure 48. Application Circuit 5 www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 27/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV About the Protection Function Protection Function Detecting & Releasing Condition PWM Output OUT1P, 1N, 2P, 2N ERRORX Output(Note 21) Output Short Protection Detecting Condition Detecting Current = 8 A (Typ) High-Z_Low (Latch)(Note 22) Low (Latch)(Note 22) DC Voltage Protection at Speaker Detecting Condition DC voltage is 3.5 V (Typ) or more for a period of 0.33 s to 0.66 s (Typ). High-Z_Low (Latch) (Note 22) Low (Latch)(Note 22) Detecting Condition Chip temperature is 150 C (Typ) or more. Overheat Protection Under Voltage Protection High-Z_Low Low Releasing Condition Chip temperature is 120 C (Typ) or less. Detecting Condition Power supply voltage is 4.0 V (Typ) or less. High-Z_Low Releasing Condition Power supply voltage is 4.1 V (Typ) or more. Active Active High (Note 21) ERRORX is pulled up by 10 k resistor. (Note 22) Once an LSI is latched, the circuit is not released automatically even after an abnormal status is gone. The following procedures 1. or 2. is available for recovery. 1. After turning MUTEX pin to Low (holding time to Low = 10 ms (Min)), turn back to High again. 2. Restore power supply after dropping to power supply voltage VCC < 3 V (10 ms (Min) holding) which internal power on reset circuit activates. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 28/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV About the Protection Function - continued 1 Output Short Protection (Short to the Power Supply Protection) This LSI has PWM output short protection circuit that stops the PWM output when the output speaker is short-circuited to the power supply (VCC) unintentionally. Detecting Condition - It will detect when MUTEX is set High and the current that flows into the PWM output pin becomes 8 A (Typ) or more for 250 ns (Typ). When the protection function starts, it stops the PWM output and latch output pins to High-Z_Low. Releasing Method - Latch can be released by the next "1" or "2". 1. After turning the MUTEX pin to Low (holding time to Low = 10 ms (Min)), turn back to High again. 2. Restore power supply after the voltage dropped to internal power on reset circuit activating power supply voltage VCC < 3 V (hold for 10 ms (Min)). Short to V CC Release from short to VCC OUT1P OUT1N OUT2P OUT2N t PWM out: LSI latches with state of High-Z_Low Released from latch state Over-Current 8 A(Typ) t ERRORX t 250 ns (Typ) MUTEX Latch release t 10 ms (Min) Figure 49. Output Short to the Power Supply Protection Sequence www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 29/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV About the Protection Function - continued 2 Output Short Protection (Short to ground) This LSI has PWM output short protection circuit that stops the PWM output when the output speaker is short-circuited to ground unintentionally. Detecting Condition - It will detect when MUTEX is set High and the current that flows into the PWM output pin becomes 8 A (Typ) or more for 250 ns (Typ). When the protection function starts, it stops the PWM output and latch output pins to High-Z_Low. Releasing Method - Latch can be released by the next "1" or "2". 1. After turning the MUTEX pin to Low (holding time to Low = 10ms (Min)), turn back to High again. 2. Restore power supply after the voltage dropped to internal power on reset circuit activating power supply voltage VCC < 3 V (hold for 10 ms (Min)). Short to ground Release from short to ground OUT1P OUT1N OUT2P OUT2N t Released from latch state PWM out: LSI latches with state of High-Z_Low Over-Current 8 A (Typ) t ERRORX t 250 ns (Typ) MUTEX Latch release t 10 ms (Min) Figure 50. Output Short to GND Protection Sequence www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 30/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV About the Protection Function - continued DC Voltage Protection at speaker This LSI is integrated with DC voltage protection circuit. When DC voltage is applied to the speaker unintentionally, speaker output will mute, and this protection will prevent the speaker from destruction. 3 Detecting Condition - In case that the voltage of speaker output is 3.5 V (Typ) or more in the time interval 0.33 s to 0.66 s (Typ) or more under the condition MUTEX is set to High the protection function starts. When the protection function starts, it stops the PWM output and latch output pins to High-Z_Low. Releasing Method - Latch can be released by the next "1" or "2". 1. After turning the MUTEX pin to Low (holding time to Low = 10 ms (Min)), turn back to High again. 2. Restore power supply after the voltage dropped to internal power on reset circuit activating power supply voltage VCC < 3 V (hold for 10 ms (Min)). Abnormal condition Impresses DC voltage to speaker output over 3.5 V OUT1P OUT1N OUT2P OUT2N Release abnormal condition PWM out : LSI latches with High-Z_Low t Released from latch state +3.5 V Speaker Output (After LC Filter) t OUT1P OUT1N OUT2P OUT2N -3.5 V Detection time TDET = 0.33 s to 0.66 s ERRORX t MUTEX Latch is released t 10 ms (Min) Figure 51. DC Voltage Protection at Speaker Sequence www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 31/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV About the Protection Function - continued 4 Overheat Protection This LSI has overheat protection circuit that prevents thermal runaway under an abnormal state for the chip temperature exceeded Tjmax = 150 C (Typ). It will detect when MUTEX is set High and the temperature of the chip becomes 150 C (Typ) or more. When the protection circuit is activated, the speaker output instantly goes to the state of High-Z_Low. Releasing Condition - It will release when MUTEX is set High and the temperature of the chip becomes 120 C (Typ) or less. The speaker output is back to its normal operation immediately when released. (Auto recovery) Detecting Condition - Tj 150 C 120 C t OUT1P OUT1N OUT2P OUT2N State of High-Z_Low t Speaker Output (After LC Filter) t ERRORX t Figure 52. Overheat Protection Sequence www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 32/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV About the Protection Function - continued 5 Under Voltage Protection This LSI has under voltage protection circuit that mutes the output speaker once extreme drop in the power supply voltage is detected. Detecting Condition - It will detect when MUTEX is set High and the power supply voltage becomes 4 V or under f(Typ). When under voltage protection circuit is activated, the speaker output instantly goes to the state of High-Z_Low. Releasing Condition - It will release when MUTEX is set High and the power supply voltage becomes 4.1 V or over (Typ). The speaker output is back to its normal operation immediately when released. (Auto recovery) VCCA VCCP1 VCCP2 4.1 V 4V t OUT1P OUT1N OUT2P OUT2N High-Z_Low t Speaker Output (After LC Filter) t 3.3 V ERRORX t Figure 53. Under Voltage Protection Sequence www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 33/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Selecting External Components 1 Output LC Filter Circuit This LSI uses output PWM frequencies any of 400 kHz, 500 kHz, 600 kHz, 1000 kHz or 1200 kHz. Since the current necessary for driving the speaker is supplied through a speaker cable with a long wiring length, the PWM frequency and harmonic components are emitted as EMI noise. Therefore, LC filter is required to eliminate EMI noise. This section takes an example of an LC type LPF shown below, in which coil L and capacitor C compose a differential filter with an attenuation property of -12 dB/oct. A large part of switching currents flow to capacitor C, and only a small part of the currents flow to speaker RL. This filter reduces unwanted emission this way. L The following shows output LC filter constants and cutoff frequencies fC with typical load impedances. OUT*P Stereo BTL C RL 6 , 8 RL C OUT*N L 15 H C 1 F fC 41 kHz L 10 H C 2.2 F fC 34 kHz Monaural PBTL RL 4 L Figure 54. Output LC Filter Use inductors with low ESR (equivalent series resistance) and with sufficient margin of allowable currents. Power loss will increase if inductors with high ESR are used. Select a closed magnetic circuit type product in normal cases to prevent emission noise. Use capacitors with low ESR, and good impedance characteristics at high frequency ranges (100 kHz or higher). Also, select an item with sufficient voltage rating because massive amount of high-frequency current flow is expected. 2 Snubber Circuit Constant When overshoot/undershoot of PWM Output exceeds absolute maximum rating, or when overshoot/undershoot of PWM output negatively affects EMI noise, snubber circuit is used as shown below. And if VCC > 11 V, the snubber circuit must be added. The following table shows ROHM recommended value of "Snubber filter constants" when using ROHM board. VCC Snubber circuit LC filter circuit PWM OUT pins C R Stereo BTL RL C R 6 8 680 pF, 25 V B (10 %) 680 pF, 25 V B (10 %) 5.6 , 1/10 W J (5 %) 5.6 , 1/10 W J (5 %) Monaural PBTL RL 4 C 680 pF, 25 V B (10 %) R 5.6 , 1/10 W J (5 %) Figure 55. Snubber Circuit Caution 1: If the impedance characteristics of the speakers at high-frequency range rise sharply, the LSI might not have stable operation in the resonance frequency range of the LC filter. Therefore, consider adding damping-circuit, etc., depending on the impedance of the speaker. Caution 2: This LSI has a short protection function. In case that speaker output is shorted to VCC or ground, over current occurs and short protection function starts. Be careful about that back electromotive force of the inductor in LC filter cause output over/undershoot, and the voltage of the output pins may exceed the maximum standard ratings, which leads to LSI destruction. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 34/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Selecting External Components - continued 3 Operating condition with the application component Parameter Tolerance of Capacitor for BSP Parts No. C16, C20, C21, C25 Limit Min Typ Max 2.2 2.95(Note 24) 1.0(Note 23) Unit F Conditions B characteristics, Rated voltage 16 V or more, Ceramic type capacitor recommended (Note 23) Set the capacitance not to be less than the minimum value in consideration of temperature characteristics and DC-bias properties. (Note 24) It is the value in consideration of 10 % tolerance of capacitance and 22 % capacitance change rate. Please use the capacitor within this rating. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 35/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the LSI. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the LSI's power supply pins. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. Ground Voltage Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. Ground Wiring Pattern When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance. 5. Recommended Operating Conditions The function and operation of the LSI are guaranteed within the range specified by the recommended operating conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics. 6. Inrush Current When power is first supplied to the LSI, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the LSI has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 7. Testing on Application Boards When testing the LSI on an application board, connecting a capacitor directly to a low-impedance output pin may subject the LSI to stress. Always discharge capacitors completely after each process or step. The LSI's power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the LSI during assembly and use similar precautions during transport and storage. 8. Inter-pin Short and Mounting Errors Ensure that the direction and position are correct when mounting the LSI on the PCB. Incorrect mounting may result in damaging the LSI. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. 9. Unused Input Pins Input pins of an LSI are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the LSI. So unless otherwise specified, unused input pins should be connected to the power supply or ground line. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 36/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Operational Notes - continued 10. Regarding the Input Pin of the LSI This monolithic LSI contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a parasitic diode or transistor. For example (refer to figure below): When ground > Pin A and ground > Pin B, the P-N junction operates as a parasitic diode. When ground > Pin B, the P-N junction operates as a parasitic transistor. Parasitic diodes inevitably occur in the structure of the LSI. The operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the ground voltage to an input pin (and thus to the P substrate) should be avoided Figure 56. Example of monolithic LSI structure 11. Ceramic Capacitor When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with temperature and the decrease in nominal capacitance due to DC bias and others. 12. Thermal Shutdown Circuit(TSD) This LSI has a built-in thermal shutdown circuit that prevents heat damage to the LSI. Normal operation should always be within the LSI's maximum junction temperature rating. If however the rating is exceeded for a continued period, the junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj falls below the TSD threshold, the circuits are automatically restored to normal operation. Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the LSI from heat damage. 13. Over Current Protection Circuit (OCP) This LSI incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the LSI should not be used in applications characterized by continuous operation or transitioning of the protection circuit. www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 37/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Ordering Information B D 2 8 4 Part Number 1 2 M U V - Package MUV: VQFN032V5050 E2 Packaging and forming specification E2: Embossed tape and reel Marking Diagram VQFN032V5050 (TOP VIEW) Part Number Marking D28412 LOT Number Pin 1 Mark www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 38/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Physical Dimension and Packing Information Package Name www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 VQFN032V5050 39/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 BD28412MUV Revision History Date Revision 29.Jan.2016 001 06.Jun.2016 002 21.Sep.2016 003 15.Feb.2019 004 22.Mar.2019 005 www.rohm.com (c) 2016 ROHM Co., Ltd. All rights reserved. TSZ22111 * 15 * 001 Changes New Release P.3 to P.5 Pin Description P.7 Absolute Maximum Ratings P.7 Thermal Resistance P.8 Thermal Resistance, Copper Pattern P.9 Electrical Characteristics, Input Impedance 1 P.11 to P.18 Typical Performance Curves P.19 Power Up/Down Sequence Figure 38. P.21 Power Limit Function P.23 to P.27 Application Circuit Example P.35 Operating condition with the application component ADD P.28 DC voltage protection P.31 DC voltage protection P.1 Typical Application Circuit Figure 1. P.7 Absolute Maximum Ratings Input Voltage 1 P.10 Typical Performance Curves Figure 5, Figure 6. P.19 Power Up/Down Sequence Figure 38. P.20 (3) Parallel BTL Function P.21 Figure number (41 to 43). P.28 to 31 Japanese font P.5 Add EXP-PAD for heat dissipation to the pin description. P.5 Add Note2 and Note3 to specify the notation in the datasheet. Others Fix the fluctuation of the expression in the datasheet Others Fix paragraph numbering and heading settings of all pages Others Fix all page format to ROHM latest format 40/40 TSZ02201-0C1C0E900620-1-2 22.Mar.2019 Rev.005 Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property ("Specific Applications"), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM's Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASS CLASSb CLASS CLASS CLASS CLASS 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM's Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used. However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice-PGA-E (c) 2015 ROHM Co., Ltd. All rights reserved. Rev.004 Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label A two-dimensional barcode printed on ROHM Products label is for ROHM's internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice-PGA-E (c) 2015 ROHM Co., Ltd. All rights reserved. Rev.004 Datasheet General Precaution 1. Before you use our Products, you are requested to carefully read this document and fully understand its contents. ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any ROHM's Products against warning, caution or note contained in this document. 2. All information contained in this document is current as of the issuing date and subject to change without any prior notice. Before purchasing or using ROHM's Products, please confirm the latest information with a ROHM sales representative. 3. The information contained in this document is provided on an "as is" basis and ROHM does not warrant that all information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or concerning such information. Notice - WE (c) 2015 ROHM Co., Ltd. All rights reserved. Rev.001 Datasheet bd28412muv - Web Page Buy Distribution Inventory Part Number Package Unit Quantity Minimum Package Quantity Packing Type Constitution Materials List RoHS bd28412muv VQFN032V5050 2500 2500 Taping inquiry Yes