Features

• Short propagation delays for TTL and IPM applications

• 15 kV/µs minimum Common Mode Transient immu-

nity at VCM = 1500 V for TTL/load drive

• High CTR at TA = 25°C

>25% for HCPL-4504/0454

>23% for HCNW4504

>19% for HCPL-J454

• Electrical specications for common IPM applications

– 5000 V rms/1min. for HCPL-4504 Option 020 and

CSA approved

IEC/EN/DIN EN 60747-5-2 approved

– VIORM = 560 Vpeak for HCPL-0454 Option 060

– VIORM = 630 Vpeak for HCPL-4504 Option 060

– VIORM = 891 Vpeak for HCPL-J454

– VIORM = 1414 Vpeak for HCNW4504

Applications

• Inverter circuits and Intelligent Power Module (IPM)

CMOS, TTL/LSTTL

• Replaces pulse transformers: Save board space and

weight

• Analog signal ground isolation: Integrated photode-

tector provides improved linearity over phototransis-

tors

A 0.1 µF bypass capacitor between pins 5 and 8 is recommended.

Description

The HCPL-4504 and HCPL-0454 contain a GaAsP LED

make the HCPL-4504 series an excellent solution to IPM

inverter dead time and other switching problems. The

CTR, propagation delay, and CMR are specied both for

TTL and IPM conditions which are provided for ease of

application. These single channel, diode-transistor opto-

couplers are available in 8-Pin DIP, SO-8, and Widebody

package congurations. An insulating layer between a

LED and an integrated photodetector provide electrical

insulation between input and output. Separate connec-

tions for the photodiode bias and output-transistor col-

Schematic

Package

Surface

Wing

Tape

& Reel

UL 1577

5000 Vrms/

1 Minute

Compliant

To order, choose a part number from the part number column and combine with the desired option from the option

column to form an order entry.

Example 1:

HCPL-4504-560E to order product of 300 mil DIP Gull Wing Surface Mount package in Tape and Reel packaging

with IEC/EN/DIN EN 60747-5-2 Safety Approval and RoHS compliant.

Example 2:

HCPL-4504 to order product of 300 mil DIP package in Tube packaging and non RoHS compliant.

Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.

Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since July 15, 2001 and

RoHS compliant will use ‘–XXXE.’

HCNW4504 Outline Drawing (8-Pin Widebody Package)

Solder Reow Temperature Prole

All Avago data sheets report the creepage and clearance

inherent to the optocoupler component itself. These di-

mensions are needed as a starting point for the equip-

ment designer when determining the circuit insulation

HCPL-

HCPL-

creepage, the shortest distance path along the surface

of a printed circuit board between the solder llets of

the input and output leads must be considered. There

are recommended techniques such as grooves and ribs

desired creepage and clearances. Creepage and clear-

ance distances will also change depending on factors

*Refer to the optocoupler section of the Designer's Catalog, under regulatory information (IEC/EN/DIN EN 60747-5-2) for a detailed description of

Method a and Method b partial discharge test proles.

NOTE: These optocouplers are suitable for "safe electrical isolation" only within the safety limit data. Maintenance of the safety data shall be ensured

by means of protective circuits.

NOTE: Insulation Characteristics are per IEC/EN/DIN EN 60747-5-2.

NOTE: Surface mount classication is Class A in accordance with CECC 00802.

Power Inverter Dead Time and Propagation Delay Specica-

tions

The HCPL-4504/0454/J454 and HCNW4504 include a

specication intended to help designers minimize “dead

time” in their power inverter designs. The new “propaga-

Figure 17), it is essential that they never conduct at the

same time. Extremely large currents will ow if there is

any overlap in their conduction during switching tran-

sitions, potentially damaging the transistors and even

the surrounding circuitry. This “shoot-through” current is

eliminated by delaying the turn-on of one transistor (Q2)

long enough to ensure that the opposing transistor (Q1)

has completely turned o. This delay introduces a small

amount of “dead time” at the output of the inverter dur-

ing which both transistors are o during switching tran-

optocoupler (the characteristics of the base/gate drive

circuit can be analyzed in the same way), it is important

to know the minimum and maximum turn-on (tPHL) and

turno (tPLH) propagation delay specications, prefer-

ably over the desired operating temperature range. The

importance of these specications is illustrated in Figure

17. The waveforms labeled “LED1”, “LED2”, “OUT1”, and

“OUT2” are the input and output voltages of the opto-

coupler circuits driving Q1 and Q2 respectively. Most in-

verters are designed such that the power transistor turns

transistor if an over-current condition is detected. The

timing illustrated in Figure 17 assumes that the power

transistor turns on when the optocoupler LED turns on.

For product information and a complete list of distributors, please go to our website: www.avagotech.com

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.

Data subject to change. Copyright © 2005-2008 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0552EN

AV02-0867EN - June 20, 2008

This expression can be rearranged to obtain

[(tPLHmax-tPHLmin)-(tPHLmin-tPHLmax)],

good the worst-case dead time can be for a given design.

Therefore, optocouplers with tight propagation delay

specications (and not just shorter delays or lower pulse-

width distortion) can achieve short dead times in power

inverters. The HCPL-4504/0454/J454 and HCNW4504

specify a minimum (tPLH - tPHL) of -0.7 µs over an operat-

ing temperature range of 0-70°C, resulting in a maximum

dead time of 2.0 µs when the LED turn-on delay is equal

to (tPLH-tPHL)max, or 1.3 µs.

It is important to maintain accurate LED turn-on delays

because delays shorter than (tPLH - tPHL)max may allow

shoot-through currents, while longer delays will increase

optocoupler should be delayed by an amount no less

than (tPLHmax - tPHLmin), which also happens to be the max-

imum data sheet value for the propagation delay dier-

ence specication, (tPLH - tPHL). The HCPL-4504/0454/J454

and HCNW4504 specify a maximum (tPLH - tPHL) of 1.3 µs

over an operating temperature range of 0-70°C.

Although (tPLH-tPHL)max tells the designer how much delay

is needed to prevent shoot-through current, it is insu-

cient to tell the designer how much dead time a design

will have. Assuming that the optocoupler turn-on delay

exactly equal to (tPLH - tPHL)max, it can be seen in Figure 17

that the maximum dead time is the sum of the maximum

dierence in turn-on delay plus the maximum dierence

in turno delay,

[(tPLHmax-tPLHmin)+(tPHLmax-tPHLmin)].