RoHS 2002/95/EC V A C U U M F LU O R ES C EN T D I S P LA Y M O D U LE S P EC I F I C A TI O N MODEL CU24025-UW1J SPECIFICATION NO. : DS-1594-0000-01 D A T E O F I S S U E : November 25, 2009 (00) R E V I S I O N (01) : April 27, 2010 : : : PUBLISHED BY NORITAKE ITRON CORP. / JAPAN http://www.noritake-itron.jp This specification is subject to change without prior notice. This product complies with RoHS Directive 2002/95/EC CU24025-UW1J Index 1 General Description ........................................................................................................................................................................ 2 Application................................................................................................................................................................................. 2 Construction ............................................................................................................................................................................... 2 Scope.......................................................................................................................................................................................... 2 Weight........................................................................................................................................................................................ 2 2 Absolute Maximum Ratings ........................................................................................................................................................... 2 3 Electrical Ratings............................................................................................................................................................................ 2 4 Electrical Characteristics ................................................................................................................................................................ 3 5 Optical Characteristics .................................................................................................................................................................... 3 6 Environmental Conditions .............................................................................................................................................................. 3 7 Functional Descriptions .................................................................................................................................................................. 4 7.1 Instruction table ......................................................................................................................................................................... 4 7.2 Display Clear ............................................................................................................................................................................. 6 7.3 Cursor Home .............................................................................................................................................................................. 6 7.4 Entry Mode Set .......................................................................................................................................................................... 6 7.5 Display ON/OFF ........................................................................................................................................................................ 7 7.6 Cursor/Display Shift .................................................................................................................................................................. 8 7.7 Function Set ............................................................................................................................................................................... 8 7.7.1 Function Set Command ......................................................................................................................................................... 8 7.7.2 Brightness Control................................................................................................................................................................. 9 7.8 Set CG RAM Address ................................................................................................................................................................ 9 7.9 Set DD RAM Address ................................................................................................................................................................ 9 7.10 Write Data ................................................................................................................................................................................ 10 7.11 Read Data ................................................................................................................................................................................. 10 7.12 Read Busy Flag/Address Counter ............................................................................................................................................ 10 8 Other features ............................................................................................................................................................................... 11 8.1 CG RAM .................................................................................................................................................................................. 11 8.2 Power-on reset ......................................................................................................................................................................... 12 8.3 CPU interface ........................................................................................................................................................................... 12 8.3.1 Select CPU .......................................................................................................................................................................... 12 8.3.2 4-bit CPU interface.............................................................................................................................................................. 12 8.3.3 Serial data transfer ............................................................................................................................................................... 13 8.4 Jumper...................................................................................................................................................................................... 14 9 Character Font .............................................................................................................................................................................. 15 9.1 Katakana character font............................................................................................................................................................ 15 9.2 International character font ...................................................................................................................................................... 16 10 Timing .......................................................................................................................................................................................... 17 10.1 CPU bus write timing (Parallel interface i80 type) .................................................................................................................. 17 10.2 CPU bus read timing (Parallel interface i80 type) .................................................................................................................... 17 10.3 CPU bus write timing (Parallel interface M68 type) ................................................................................................................ 18 10.4 CPU bus read timing (Parallel interface M68 type) ................................................................................................................. 18 10.5 Write timing (Serial interface) ................................................................................................................................................. 19 10.6 Read timing (Serial interface) .................................................................................................................................................. 19 11 Connector Pin assignment ............................................................................................................................................................ 20 11.1 14pin Connector (CN1) for parallel interface .......................................................................................................................... 20 11.2 6pin Connector (CN2) for serial interface ................................................................................................................................ 20 12 Outline dimension ........................................................................................................................................................................ 21 Notice for the Cautious Handling VFD Modules ....................................................................................................................................... 22 1.1 1.2 1.3 1.4 1 CU24025-UW1J 1 General Description 1.1 Application 1.2 1.3 1.4 2 : Readout of computer, micro-computer, communication terminal and automatic instruments. Construction : Single board display module consists of 48 characters (2x24) VFD, a controller which includes character generator ROM, RAM and DC/DC converter. Scope : Interface is 8/4 bit parallel and synchronous serial. +5V single power supply is required. Weight : About 47 g Absolute Maximum Ratings Parameter Symbol Power Supply Voltage Logic Input Voltage 3 VCC VI Min. 0 0 Typ. Max. 5.5 VCC+0.3 Unit VDC VDC Condition Unit Condition VDC VCC - VSS = 5.0V Electrical Ratings Measuring Conditions: TA (Ambient temperature) = 25 degree Parameter Symbol Min. Typ. Max. Logic Input Voltage "H" VIH1 2.0 - VCC DB0-DB7, RS, R/W(WR), E(RD), SCK, STB "L" VIL1 - VSS 0.8 Logic Input Voltage "H" VIH2 0.7VCC - VCC VCC - VSS VDC SI/SO = 5.0V "L" VIL2 VSS - 0.3VCC "H" V 0.8V - V V Logic Input Voltage IH3 CC CC CC - VSS VDC /RESET = 5.0V "L" VIL3 VSS - 0.2VCC Power supply Voltage VCC-VSS 4.75 5.00 5.25 VDC - Note: "/RESET" must be driven by open-collector or open-drain because this module has an internal Reset-IC. VCC /RESET R 10K Controller out Reset IC C Configuration of Reset-IC peripheral circuit. 2 CU24025-UW1J 4 5 6 Electrical Characteristics Measuring Conditions: TA (Ambient temperature) = 25degree, VCC = 5.0VDC Parameter Symbol Min. Typ. Max. Unit "H" VOH VCC-0.8 - - VDC "L" VOL - 0.6 - Logic Output Voltage "H" VOH VCC-0.5 - - VDC "L" VOL - 0.5 - Power Supply Current 1 ICC1 - 165 215 mA Power Supply Current 2 ICC2 - 13 25 mA Power Consumption - 0.825 1.075 W Note: ICC1 shows the current, when all dots are turned on. ICC might be anticipated twice as usual at power on rush. Optical Characteristics Number of characters Matrix format Display area Character size Character pitch Line pitch Dot size Dot pitch Luminance Color of illumination : : : : : : : : : : 48 (2 linesx24 chars) 5x7 dot with underline 85.2x11.5 mm (XxY) 2.4x4.7 mm (XxY) Underline is not included. 3.6 mm 6.1 mm 0.4x0.5 mm (XxY) 0.5x0.7 mm (XxY) 350 cd/m2 (100fL) Min. Green (Blue-green) Environmental Conditions Operating temperature : Storage temperature : Operating humidity : Vibration (Non operation) : Shock (Non operation) -40 to +85 degree -50 to +85 degree 20 to 80 % RH (Non condensation) 10 to 55 to 10 Hz (Frequency) 1.0 mm (Total Amplitude) 30 Min. (Duration) X, Y, Z each direction : 539 m/s2, 10ms 3 Condition IOH = -4 mA IOL = 4 mA IOH = -2 mA IOL = 2 mA Display ON Display OFF Display ON CU24025-UW1J 7 7.1 Functional Descriptions Instruction table Instruction RS CODE R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Time Description Clears all display and sets DD RAM address 0 in the address counter. Sets DD RAM address 0 in the address counter. Also returns the display being shifted to the original position. DD RAM contents remain unchanged. Sets the cursor direction and specifies display shift. These operations are performed during writing/reading data. Sets all display ON/OFF(D),cursor ON/OFF(C),cursor blink of character position (B). Shifts display or cursor, keeping DD RAM contents. Display Clear 0 0 0 0 0 0 0 0 0 1 100s MAX. Cursor Home 0 0 0 0 0 0 0 0 1 * 666ns Entry Mode Set 0 0 0 0 0 0 0 1 I/D S 666ns Display ON/OFF Control 0 0 0 0 0 0 1 D C B 666ns 0 0 0 0 0 1 S/C R/L * * 666ns 0 0 0 0 1 IF * * * * 666ns Sets data length (IF). 666ns Accepts 1 byte data of just after "Function set" as brightness control data. Cursor or Display Shift Function Set Brightness Control 1 0 * * * * * 4 * BR1 BR0 CU24025-UW1J Instruction CG RAM Address setting DD RAM Address setting Busy flag & Address Reading Data Writing to CG or DD RAM Data Reading from CG or DD RAM RS CODE R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 666ns Sets the CG RAM address. Sets the DD RAM address. 0 0 0 0 1 ADD 666ns 0 1 BF ACC 666ns 1 0 Data writing 666ns 1 I/D = 1 : I/D = 0 : S =1 : S =0 : S/C = 1 : S/C = 0 : R/L = 1 : R/L = 0 : BR1,BR0 = ACG Description 0 1 1 Time Data reading Increment Decrement Display shift enabled Cursor shift enabled Display shift Cursor move Shift to the right Shift to the left 00 : 100% 01 : 75% 10 : 50% 11 : 25% IF = 1 : 8-bits IF = 0 : 4-bits BF = 1 : Busy BF = 0 : Not busy Note: *: Don't care. 5 666ns Reads busy flag (BF) and address counter. Writes data into CG RAM or DD RAM. Reads data from CG RAM or DD RAM. DD RAM: Display Data RAM CG RAM: Character Generator RAM ACG: CG RAM Address ADD: DD RAM Address ACC: Address Counter CU24025-UW1J 7.2 Display Clear DB7 0 RS=0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1 01H This instruction 1. Fills all locations in the display data (DD) RAM with 20H (Blank character). 2. Clears the contents of the address counter to 0H. 3. Sets the display for zero character shift. 4. Sets the address counter to point to the DD RAM. 5. If the cursor is displayed, the cursor moves to the left most character in the top line (Line 1). 6. Sets the address counter to increment on each access of DD RAM or CG RAM. 7.3 Cursor Home DB7 0 RS=0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 1 DB0 * 02H to 03H *: Don't care. This instruction 1. Clears the contents of the address counter to 0H. 2. Sets the address counter to point to the DD RAM. 3. Sets the display for zero character shift. 4. If the cursor is displayed, moves the left most character in the top line (Line 1). 7.4 Entry Mode Set DB7 0 RS=0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 1 DB1 I/D DB0 S 04H to 07H The I/D bit selects the way in which the contents of the address counter are modified after every access to DD RAM or CG RAM. I/D=1: The address counter is increment. I/D=0: The address counter is decrement. The S bit enables display shifts instead of cursor shift, after each write or read to the DD RAM. S=1: Display shift enabled. S=0: Cursor shift enabled. The direction in which the display is shifted is opposite in sense to that of the cursor. For example if S=0 and I/D=1, the cursor would shift one character to the right after a CPU writes to DD RAM. However if S=1 and I/D=1, the display would shift one character to the left and the cursor would maintain its position on the panel. 6 CU24025-UW1J The cursor will already be shifted in the direction selected by I/D during reads of the DD RAM, irrespective of the value of S. Similarly reading and writing the CG RAM always shifts the cursor. Also both lines are shifted simultaneously. Cursor move and Display shift by the "Entry Mode Set" I/D S After writing DD RAM data After reading DD RAM data The cursor moves one character to The cursor moves one character to 0 0 the left. the left. The cursor moves one character to The cursor moves one character to 1 0 the right. the right. The display shifts one character to The cursor moves one character to 0 1 the right without cursor's move. the left. The display shifts one character to The cursor moves one character to 1 1 the left without cursor's move. the right. 7.5 Display ON/OFF DB7 0 RS=0 DB6 0 DB5 0 DB4 0 DB3 1 DB2 D DB1 C DB0 B 08H to 0FH This instruction controls various features of the display. The D bit turns the entire display on or off. D1: Display on D0: Display off Note: When display is turned off, power converter is also inhibited and reduces a power consumption. The C bit turns the cursor on or off. C=1: Cursor on C=0: Cursor off The B bit enables blinking of the character the cursor coincides with. B=1: Blinking on B=0: Blinking off Blinking is achieved by alternating between a normal and all on display of a character. The cursor blinks with a frequency of about 1Hz and DUTY 50%. 7 CU24025-UW1J 7.6 Cursor/Display Shift DB7 0 RS=0 DB6 0 DB5 0 DB4 1 DB3 S/C DB2 R/L DB1 * DB0 * 10H to 1FH *: Don't care. This instruction shifts the display and/or moves the cursor, on character to either left or right, without neither reading nor writing DD RAM. The S/C bit selects movement of the cursor or movement of both the cursor and the display. S/C=1: Shift both cursor and display. S/C=0: Shift cursor only. The R/L bit selects left ward or right ward movement of the display and/or cursor. R/L=1: Shift one character right. R/L=0: Shift one character left. Cursor move and Display shift by the "Cursor/Display Shift" S/C R/L Cursor shift Display shift 0 0 Move one character to the left No shift 0 1 Move one character to the right No shift 1 0 Shift one character to left with display Shift one character to the left 1 1 Shift one character to right with display Shift one character to the right 7.7 Function Set This command sets width of data bus line by itself, and sets screen brightness by following one byte data. 7.7.1 Function Set Command DB7 0 RS=0 DB6 0 DB5 1 DB4 IF DB3 * DB2 * DB1 * DB0 * 20H to 3FH *: Don't care. This instruction initializes the system, and must be the first instruction executed after power-on. The IF bit selects between an 8-bit or a 4-bit bus width interface. IF=1: 8-bit CPU interface using DB7 to DB0 IF=0: 4-bit CPU interface using DB7 to DB4 When serial interface is selected, IF=1. 8 CU24025-UW1J 7.7.2 Brightness Control DB7 * RS=1 DB6 * DB5 * DB4 * DB3 * DB2 * DB1 BR1 DB0 BR0 00H to 03H *: Don't care. One byte data (RS=1) which follows the "Function Set Command" is considered as brightness data. When a command (RS=0) is written after the "Function Set Command", the brightness control function is not initiated. Screen brightness is as follows. BR1 -------0 0 1 1 7.8 BR0 -------0 1 0 1 Brightness ----------------------100 % (Default) 75 % 50 % 25 % DB3 DB2 ACG DB1 Set CG RAM Address DB7 0 RS=0 DB6 1 DB5 DB4 DB0 40H to 7FH This instruction 1. Loads a new 6-bit address into the address counter. 2. Sets the address counter to address CG RAM. Once "Set CG RAM Address" has been executed, the contents of the address counter will be automatically modified after every access of CG RAM, as determined by the "7.4 Entry Mode Set" instruction. The active width of the address counter, when it is addressing CG RAM, is 6-bits so the counter will wrap around to 00H from 3FH if more than 64 bytes of data are written to CG RAM. 7.9 Set DD RAM Address DB7 1 RS=0 DB6 DB5 DB4 DB3 DB2 ADD DB1 DB0 80H to A7H (1 line), C0H to E7H (2 line) This instruction 1. Loads a new 7-bit address into the address counter. 2. Sets the address counter to point to the DD RAM. Once the "Set DD RAM Address" instruction has been executed, the contents of the address counter will be automatically modified after each access of DD RAM, as selected by the "7.4 Entry Mode Set" instruction. 9 CU24025-UW1J Valid DD RAM Address (ADD) Range Number of Characters 1st line 40 2nd line 40 7.10 Address 00H to 27H 40H to 67H Write Data DB7 DB6 DB5 DB4 DB3 DB2 DATA WRITE DB1 DB0 00H to FFH RS=1 This instruction writes the data in DB7 to DB0 into either the CG RAM or the DD RAM. The RAM space (CG or DD), and the address in that space, that is accessed depends on whether a "Set CG RAM Address" or a "Set DD RAM Address" instruction was last executed, and on the parameters of that instruction. The contents of the address counter will be automatically modified after each "Write Data", as determined by the "7.4 Entry Mode Set". When data is written to the CG RAM, the DB7, DB6 and DB5 bits are not displayed as characters. 7.11 Read Data DB7 DB6 DB5 DB4 DB3 DB2 DATA READ DB1 DB0 RS=1 This instruction reads data from either CG RAM or DD RAM, depending on the type of "Set RAM Address" instructions last sent. The address in that space depends on the "Set RAM Address" instruction parameters. Immediately before executing "Read Data", "Set CG RAM Address" or "Set DD RAM Address" must be executed. The contents of the address counter are modified after each "Read Data". As determined by the "7.4 Entry Mode Set". Display shift is not executed, as described at of the "7.4 Entry Mode Set". 7.12 Read Busy Flag/Address Counter DB7 BF RS=0 DB6 DB5 DB4 DB3 DB2 ACC DB1 DB0 Reading the instruction register yields the current value of the address counter and the busy flag. This instruction must be executed prior to any other instructions. ACC, the address counter value, will point to a location in either CG RAM or DD RAM, depending on the type of "Set RAM Address" instruction last sent. In "Busy Flag Check" immediately after executing "Write Data" instruction, a valid address counter value can be ready as soon as BF goes low. The BF bit shows the status of the busy flag. BF=1: busy. BF=0: ready for next instruction, command receivable. 10 CU24025-UW1J 8 8.1 Other features CG RAM The display module has CG RAM of 320 bit = (5x8 bit / char) x 8 chars which is for user definable character fonts. The character fonts consist of 5x7 dots with underline. The number 1-36 corresponds to character fonts. CG RAM address CG RAM data (character pattern) Character code DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 * * * 1 2 3 4 5 0 0 0 0 0 1 * * * 6 7 8 9 10 0 0 0 0 1 0 * * * 11 12 13 14 15 00H 0 0 0 0 1 1 * * * 16 17 18 19 20 or 0 0 0 1 0 0 * * * 21 22 23 24 25 (08H) 0 0 0 1 0 1 * * * 26 27 28 29 30 0 0 0 1 1 0 * * * 31 32 33 34 35 0 0 0 1 1 1 * * * 36 0 0 0 0 0 0 1 0 0 0 * * * 1 2 3 4 5 0 0 1 0 0 1 * * * 6 7 8 9 10 0 0 1 0 1 0 * * * 11 12 13 14 15 01H 0 0 1 0 1 1 * * * 16 17 18 19 20 or 0 0 1 1 0 0 * * * 21 22 23 24 25 (09H) 0 0 1 1 0 1 * * * 26 27 28 29 30 0 0 1 1 1 0 * * * 31 32 33 34 35 0 0 1 1 1 1 * * * 36 0 0 0 0 REMARKS; "*": Don't care. "0": Turned off. "1": Turned on. Dot assignment 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Dot 36 is for underline. 11 CU24025-UW1J 8.2 Power-on reset Internal status of the module is initialized, when the controller detects the rising of power supply up. The statuses are as follows: 1. Display clear Fills the DD RAM with 20Hex (Space code). During executing of "Display Clear" (Max. 100s), the busy flag (BF) is "1". 2. Sets the address counter to 0H. Sets the address counter to point the DD RAM. 3. Display ON/OFF D=0: Display OFF C=0: Cursor OFF B=0: Blink OFF 4. Entry Mode Set I/D=1: Increment (+1) S=0: No display shift 5. Function Set IF=1: 8-bit interface 6. Brightness Control BR0=BR1=0: 100% Remarks There is a possibility that reset doesn't work by slow start power supply. Therefore the initializing by commands needs. 8.3 CPU interface The display module is capable to select some interfaces such as parallel (i80 or M68, 8-bit or 4bit) or serial. 8.3.1 Select CPU The module is able to select to parallel or serial data transfer by setting JP6 jumper, and to connect to bus of i80 type or M68 type CPU by setting JP2 jumper. Refer to "8.4 Jumper" for detail. 8.3.2 4-bit CPU interface If 4-bit interface is used, the 8-bit instruction is written nibble by nibble: the high-order nibble being written first, followed by low-order nibble. It is not necessary to check the busy flag between writing separate nibbles of individual instructions. Refer to "7.7.1 Function Set Command" for detail. 12 CU24025-UW1J 8.3.3 Serial data transfer Serial data can be inputted when the Strobe goes to "0". Serial data consists of 2 bytes. The first byte (Start Byte) consists of a total of 8 bits: the Synchronous bits (bit1-bit5), R/W (bit6), RS (bit7) and bit8. The register is selected (Instruction Register or Data Register) by the RS (bit7). RS is "0" in Instruction Register, and it is "1" in Data Register. The data write or read is selected by R/W (bit6). R/W is "0" when the data is written, and it is "1" when the data is read. 0 Data Write Instruction Register R/W RS 1 Data Read Data Register In "Data Write", the second byte (8-bit Instruction / Data Byte) is written after the Start Byte. On the other hand, the second byte is the read data in "Data Read", such as the Busy Flag + Address Counter or the data written in the DD RAM or CG RAM. The read data is outputted at the falling edge of the shift clock. <Data Write> STB 1 2 3 4 6 5 7 8 9 10 11 12 13 14 15 16 D6 D5 D4 D3 D2 D1 D0 SCK SI "1""1""1""1""1" R/W RS "0" D7 M in Instruction ./ Data 60 ns Synchronous bits Start Byte <Data Read> STB 1s 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 SCK SI/SO "1""1""1""1""1" R/W RS "0" BF IR6 IR5 IR4 IR3 IR2 IR1 Synchronous bits Start Byte Read Data 13 IR0 CU24025-UW1J 8.4 Jumper Some jumpers are prepared on the PCB board, to set operating mode of the display module. A soldering iron is required to short jumper. No.2 and No.3 of jumper JP1 are used to reset of module. You can reset the module by shorting No.2 and No.3 of the jumper JP1 for some interval which is longer than 10s. The following figure shows the location of each jumper. Location The following table shows the function of No.1 and No.2 of JP1, JP2, JP5 and JP6. Default setting is no external reset inputs, M68 CPU bus parallel interface and Katakana font. External reset input signal is active when it is low. Table of No.1 and No.2 of JP1 setting No.1 and No.2 of JP1 No.3 of CN1 and No.6 of CN3 open NC short RESET NC: no connection Table of JP6 setting JP6 Interface open Parallel interface short Serial interface Table of JP2 setting JP2 CPU bus mode open M68 type short i80 type Control signals E,R/W WR, RD Table of JP5 setting JP5 Character font open Katakana font short International font JP3 and JP4 are factory use only. 14 CU24025-UW1J 9 9.1 Character Font Note: Font number 00-07Hex (08-0FHex) is User Definable Character Fonts. Katakana character font 15 CU24025-UW1J 9.2 International character font D7 D6 D5 D4 D D D D 3 2 1 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 2 0 0 1 1 3 0 1 0 0 4 0 1 0 1 5 0 1 1 0 6 0 1 1 1 7 1 0 0 0 8 1 0 0 1 9 1 0 1 0 A 1 0 1 1 B 1 1 0 0 C 1 1 0 1 D 1 1 1 0 E 1 1 1 1 F 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0 1 2 3 4 5 6 7 8 9 A B C D E F Font: G57206.cg 16 CU24025-UW1J 10 Timing Input signal rise time and fall time < 15 ns. 10.1 CPU bus write timing (Parallel interface i80 type) RS Min. 5ns Min. 0ns Min. 250ns /WR Min. 150ns Min. 60ns Min. 5ns D0D7 10.2 Min. 0ns Valid Data CPU bus read timing (Parallel interface i80 type) RS Min. 5ns Min. 0ns Min. 333ns /RD Min. 130ns Min. 190ns Max. 160ns D0D7 Min. 5ns Valid Data 17 CU24025-UW1J 10.3 CPU bus write timing (Parallel interface M68 type) RS Min. 20ns Min. 10ns Min. 500ns E Min. 230ns Min. 230ns R/W Min. 80ns D0D7 10.4 Min. 10ns Valid Data CPU bus read timing (Parallel interface M68 type) RS Min. 20ns Min. 10ns Min. 500ns E Min. 230ns Min. 230ns R/W Max. 160ns D0D7 Valid Data 18 Min 5ns CU24025-UW1J 10.5 Write timing (Serial interface) 1 STB 0 Min. 100ns SCK 1 0 Min. 200ns Min. 100ns 1 SI Min. 200ns Min. 500ns Min. 500ns Min. 500ns Min. 100ns Valid data 0 10.6 Read timing (Serial interface) STB 1 0 SCK 1 0 SI/SO Min. 200ns 1 Min. 200ns Min. 500ns Min. 500ns Max. 150ns Min. 500ns Max. 30ns Valid data Input 0 19 CU24025-UW1J 11 Connector Pin assignment The through holes are prepared for power supply and data communications. A connector or pins may be able to solder to the holes. Diameter of holes is 1.0mm. 11.1 14pin Connector (CN1) for parallel interface Pin No. 1 2 3 4 5 Function Direction Ground Input Power supply Input Non connection Switch signal Input Data transfer select Input (Write enable) 6 E(RD) Write enable Input (Read enable) 7 DB0 Data input/output Input/Output 8 DB1 Data input/output Input/Output 9 DB2 Data input/output Input/Output 10 DB3 Data input/output Input/Output 11 DB4 Data input/output Input/Output 12 DB5 Data input/output Input/Output 13 DB6 Data input/output Input/Output 14 DB7 Data input/output Input/Output *: The third through hole is for reset input when No.1 and No.2 of JP1 are short. (): At the i80 type. 11.2 Signal name GND VCC NC * RS R/W(WR) 6pin Connector (CN2) for serial interface Pin No. Signal name Function Direction 1 VCC Power supply Input 2 SI/SO Data input/output Input/Output 3 GND Ground Input 4 STB Strobe Input 5 SCK Display clock Input 6 NC * Non connection *: The 6th through hole is for reset input when No.1 and No.2 of JP1 are short. 20 CU24025-UW1J 12 Outline dimension 21 CU24025-UW1J Notice for the Cautious Handling VFD Modules Handling and Usage Precautions: Please carefully follow the appropriate product application notes for proper usage, safety handling, and operation standards for maximum performance. [VFD tubes are made of glass] Because the edges of the VFD glass-envelop are not smooth, it is necessary to handle carefully to avoid injuries to your hands Please avoid breaking the VFD glass-envelop to prevent injury from sharp glass particles. The tip of the exhaust pipe is fragile so avoid shock from impact. It is recommended to allow sufficient open space surrounding the exhaust pipe to avoid possible damage. Please design the PCB for the VFD-module within 0.3 mm warping tolerance to avoid any forces that may damage the display due to PCB distortion causing a breakdown of the electrical circuit leading to VFD failure. [High voltage] Avoid touching conductive electrical parts, because the VFD-module uses high voltage exceeding 30100 volts. Even when electric power is turned off, it may take more than one minute for the electrical current to discharge. [Cable connection] Do not unplug the power and/or data cables of VFD-modules during operating condition because unrecoverable damage may result. Sending input signals to the VFD-module during a power off condition sometimes causes I/O port damage. It is recommended to use a 30 cm or shorter signal cable to prevent functional failures. [Electrostatic charge] VFD-modules needs electrostatic free packaging and protection from electrostatic charges during handling and usage. [Structure] During operation, VFD and VFD-modules generate heat. Please consider sufficient heat radiation dissipation using heat sink solutions. We prefer to use UL grade materials or components in conjunction with VFD-modules. Wrap and twist motion causes stress and may break VFDs & VFD modules. Please adhere to allowances within 0.3mm at the point of attachment. [Power] Apply regulated power to the VFD-module within specified voltages to protect from failures. Because some VFD-modules may consume in rush current equal to twice the typical current at power-on timing, we recommend using a sufficient power capability and quick starting of the power regulator. VFD-module needs a specified voltage at the point of connection. Please use an adequate power cable to avoid a decrease in voltage. We also recommend inserting a power fuse for extra protection. [Operating consideration] Illuminating phosphor will decrease in brightness during extended operation. If a fixed pattern illuminates for an extended period, ( several hours), the phosphor efficiency will decrease compared to the non operating phosphor causing a non uniform brightness among pixels. Please consider programming the display patterns to use all phosphor segments evenly. Scrolling may be a consideration for a period of time to refresh the phosphor condition and improve even illumination to the pixels. We recommend using a signal cable 30cm or less to avoid some possible disturbances to the signal. [Storage and operating environment] Please use VFD-modules under the recommended specified environmental conditions. Salty, sulfur and dusty environments may damage the VFD-module even during storage. [Discard] Some VFDs contain a small amount of cadmium in the phosphor and lead in the solder. When discarding VFDs or VFD-modules, please adhere to governmental related laws or regulations. (Note: RoHS-compliant products do not contain cadmium) [Others] Although the VFD-module is designed to be protected from electrical noise, please plan your circuitry to exclude as much noise as possible. Do not reconstruct or repair the VFD-module without our authorization. We cannot assure the quality or reliability of unauthorized reconstructed VFD-modules. Notice: We do not authorize the use of any patents that may be inherent in these specifications. Neither whole nor partial copying of these specifications are permitted without our approval. If necessary, please ask for assistance from our sales consultant. This product is not designed for military, aerospace, medical or other life-critical applications. If you choose to use this product for these applications, please ask us for prior consultation or we cannot take responsibility for problems that may occur. 22 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Noritake: CU24025-UW1J