MB39A134
DC/DC Converter IC
for Charging Li-ion Battery
Cypress Semiconductor Corporation • 198 Champion Court • San Jose,CA 95134-1709 • 408-943-2600
Document Number: 002-08413 Rev. *C Revised April 20, 2017
Description
The MB39A134 is a DC/DC converter IC for charging Li-ion battery, which is suitable for down conversion, and uses pulse width
modulation (PWM) for controlling the charge voltage and current independently.
MB39A134 has a AC adapter detection comparator independent of the DC/DC converter controller, and can control the source of
power supply to a system. It supports a wide input voltage range, enables low current consumption in standby mode, and can
control the charge voltage and charge current with high precision, which is perfect for the built-in Li-ion battery charger used in
devices such as notebook PC.
Features
• Support 2, 3 and 4 Cell Battery Pack
• Built-in two constant current control loops
• Built-in AC adapter detection function (ACOK pin)
• Charge voltage accuracy : 0.7% (Ta 10° C to 85°C)
• Built-in charging voltage control without external setting resistor (4.20 V/Cell or 4.10 V/Cell)
Adjustable to charge voltage with external resistor
• Built-in two high accurate current detection amplifiers (1%) (At input voltage difference 100 mV)
(5%) (At input voltage difference 20 mV)
Input offset voltage: 0 mV (Current Amp1)
: +3 mV (Current Amp2)
• Built-in Charging Current Control without external resistor (RS 20 mΩ : 2.85 A)
Adjustable charging current with external resistor
• Setting of switching frequency using an external resistor
(Frequency setting capacitor integrated) : 100 kHz to 2 MHz
• Built-in under voltage lockout protection
• In standby mode (ICC 6 µA Typ) , only AC adapter detection function is operated
• Built-in VH regulator for reducing Qg loss of P-ch MOS FET
• Package : TSSOP-24
Applications
• Built-in charger for Notebook PC
• Handy terminal device etc.
MB39A134
Document Number: 002-08413 Rev. *C Page 2 of 44
Contents
Description ........................................................................ 1
Features ............................................................................. 1
Applications ......................................................................1
1. Pin Assignment .............................................................. 3
2. Pin Descriptions ............................................................. 4
3. Block Diagram ...............................................................5
4. Absolute Maximum Ratings ........................................... 6
5. Recommended Operating Conditions ........................... 7
6. Electrical Characteristics ...............................................8
7. Typical Characteristics ................................................ 12
8. Functional Description .................................................14
8.1 DC/DC Converter Block .....................................14
8.2 Protection Functions ...........................................16
9. Transit Response When A Load Changes Suddenly .. 21
10. Connection Without Using The Current Amp1, Current
Amp2 And The Error Amp1, Error Amp2 ................... 22
11. Input/Output Pin Equivalent Circuit Diagram ............. 23
12. Typical Application Circuit ......................................... 26
13. Application Note ........................................................ 30
14. Reference Data ......................................................... 39
15. Usage Precaution ...................................................... 41
16. Ordering Information .................................................. 41
17. RoHS Compliance Information .................................. 41
18. Package Dimension ................................................... 42
19. Document History ..................................................... 43
Sales, Solutions, and Legal Information ...................... 44
MB39A134
Document Number: 002-08413 Rev. *C Page 3 of 44
1. Pin Assignment
(TOP VIEW)
(STF024)
OUTC1
−INC1
ADJ1
COMP1
ACOK
VREF
ACIN
COMP2
ADJ2
OUTC2
CELLS
BATT
GND
+INC1
CVM
VCC
OUT
VH
VIN
RT
ADJ3
COMP3
CTL
+INC2
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
MB39A134
Document Number: 002-08413 Rev. *C Page 4 of 44
2. Pin Descriptions
Pin No. Pin Name I/O Description
1 -INC1 I Current detection amplifier (Current Amp1) inverted input pin.
2 OUTC1 O Current detection amplifier (Current Amp1) output pin.
3 ADJ1 I Error amplifier (Error Amp1) non-inverted input pin.
4 COMP1 O Error amplifier (Error Amp1) output pin.
5 ACOK O AC adapter voltage detection block (AC Comp.) output pin.
ACIN H : ACOK L, ACIN L : ACOK Hi-Z
6 VREF O Reference voltage output pin.
7 ACIN I AC adapter voltage detection block (AC Comp.) input pin.
8 COMP2 O Error amplifier (Error Amp2) output pin.
9 ADJ2 I Charge current control block setting input pin.
ADJ2 pin “GND to 4.4 V” : Charge current control block output ADJ2 pin
voltage
ADJ2 pin “4.6 V to VREF” : Charge current control block output 1.5 V
10 OUTC2 O Current detection amplifier (Current Amp2) output pin.
11 CELLS I Charge voltage setting switch pin (2 or 3 or 4 Cells).
CELLS = VREF: 4 Cells, CELLS = GND: 3 Cells, CELLS = OPEN: 2 Cells
12 BATT I Current detection amplifier (Current Amp2) inverted input pin.
Battery voltage input pin.
13 INC2 I Current detection amplifier (Current Amp2) non-inverted input pin.
14 CTL I Power supply control pin.
Setting the CTL pin at “H” level places the DC/DC converter IC in the operating mode.
Setting the CTL pin at “L” level places the DC/DC converter IC in the standby mode.
15 COMP3 O Error amplifier (Error Amp3) output pin.
16 ADJ3 I Charge voltage control block setting input pin.
ADJ3 pin “GND to 0.2 V” : Charge voltage setting 4.10 V/Cell
ADJ3 pin “0.4 V to 4.4 V” : Charge voltage setting 2 × VADJ3 pin voltage/Cell
ADJ3 pin “4.6 V to VREF” : Charge voltage setting 4.20 V/Cell
17 RT Triangular wAVe oscillation frequency setting resistor connection pin.
18 VIN Power supply pin for ACOK function block.
19 VH O Power supply pin for FET drive circuit (VH VCC 6 V)
20 OUT O External FET gate drive pin.
21 VCC Power supply pin for reference voltage , control circuit, and output circuit.
22 CVM O Constant voltage control state detection block (CV Comp.) output pin.
23 GND Ground pin.
24 INC1 I Current detection amplifier (Current Amp1) non-inverted input pin.
MB39A134
Document Number: 002-08413 Rev. *C Page 5 of 44
3. Block Diagram
+
+
−
+
−
+
−
+
+
+
−
+
−
+
−
+
V
IN
OUTC1
OUTC2
-INC1
+INC1
+INC2
ADJ1
ADJ2
BATT
VIN
CELLS COMP2
COMP1 COMP3 RT VREF GND
CTL
VH Batter
y
OUT
VCC
VO
2.85 A
RS
20 mΩ
TO SYSTEM
LOAD
<AC
Comp.>
<CV Comp.>
<Error Amp1>
<Current Amp1>
<Current Amp2> <Error Amp2>
<Error Amp3>
<PWM Comp.>
<OSC>
<VR1> <REF> <CTL>
Bias
Voltage
<VH>
VCC
UVLO
VREF
UVLO
VCC VCC
ACOKACINCVM
3 mV
Charge Current
Control
VO
REFIN
Control
ADJ3
VCC-6 V
Drive
1.26 V
VR1 5.0 V ON/OFF
VREF
Io
CT
−2.5 V
−1.5 V
VREF :
4.20 V/Cell
OPEN : 2Cell
GND : 3Cell
VREF : 4Cell
GND :
4.10 V/Cell
( 24-pin )
18
2
24
1
3
10
13
12
A
B
9
16
11 4 8 15 17 6
14
19
20 A B
21
5722
23
✕25
✕25
MB39A134
Document Number: 002-08413 Rev. *C Page 6 of 44
4. Absolute Maximum Ratings
*1 : See the diagram of “Typical Characteristics. Maximum Power Dissipation vs. Operating Ambient Temperature”, for the package
power dissipation of Ta from + 25° C to + 85° C.
*2 : When IC is mounted on a 10x10 cm two-layer square epoxy board.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Parameter Symbol Condition Rating Unit
Min Max
Power supply voltage VvCC VCC, VIN pin 0.3 28 V
VCC, VIN pin, t 10 µs 0.3 32 V
Output current IOUT OUT pin 60 60 mA
OUT pin
Duty 5% (t 1/fosc × Duty)
700 700 mA
CLT pin input voltage VCTL CTL pin 0.3 28 V
Input voltage VINE ADJ1, ADJ2, ADJ3, CELLS, ACIN
pin
0.3 VVREF 0.3 V
VINC -INC1, INC1, BATT, INC2 pin 0.3 28 V
Power dissipation PDTa 25° 1282*1,*2mW
Ta 85° 512*1,*2mW
Storage temperature TSTG 55 125 °C
MB39A134
Document Number: 002-08413 Rev. *C Page 7 of 44
5. Recommended Operating Conditions
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor
device. All of the device's electrical characteristics are warranted when the device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation outside these
ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet.
Users considering application outside the listed conditions are advised to contact their representatives beforehand.
Parameter Symbol Condition Value Unit
Min Typ Max
Power supply voltage VVCC VCC, VIN pin 8 25 V
Reference voltage output current IVREF 1 0mA
VH pin output current IVH 0 30 mA
Input voltage VINE ADJ1 pin 0 V
VREF
1.5
V
ADJ2 pin
(internal reference voltage
setting)
4.6 V
VREF V
ADJ2 pin
(external voltage setting)
0 4.4 V
ADJ3 pin
(internal reference voltage
setting)
0
0.2 V
4.6 VVREF V
ADJ3 pin
(external voltage setting)
0.4 4.4 V
CELLS pin 0 V
VREF V
VINC INC1, INC2, -INC1, BATT
pin
0 V
VCC V
ACIN pin input voltage VACIN 0 5V
ACOK pin output voltage VACOK 0 25 V
ACOK pin output current IACOK 0 1mA
CTL pin input voltage VCTL 0 25 V
Output current IOUT OUT pin 45 45 mA
OUT pin
Duty 5% (t 1 fosc × Duty)
600 600 mA
Switching frequency fOSC 100 500 2000 kHz
Timing resistor RRT RT pin 8.2 33 180 kΩ
VH pin capacitor CVH 0.1 1.0 µF
Reference voltage output
capacitor
CVREF VREF pin 0.1 1.0 µF
Operating ambient
temperature
Ta 30 25 85 °C
MB39A134
Document Number: 002-08413 Rev. *C Page 8 of 44
6. Electrical Characteristics
(Ta 25°, VCC pin 19 V, VREF pin 0 mA)
Parameter Symbol Pin
No. Condition Value Unit
Min Typ Max
Reference
Voltage Block
[REF]
Threshold
voltage
VVREF1 6 4.963 5.000 5.037 V
VVREF2 6Ta 10° to 85° 4.950 5.000 5.050 V
Input stability VREF
Line
6 VCC pin 8 V to 25 V 310mV
Load stability VREF
Load
6VREF pin 0 mA to 1 mA 110mV
Short-circuit
output
current
Ios 6 VREF pin 1 V 25 12 6mA
Triangular Wave
Oscillator Block
[OSC]
Switching
frequency
fOSC 20 RT pin 33 kΩ450 500 550 kHz
Frequency
temperature
variation
df/fdT 20 Ta 30° to 85° 1* %
Error Amplifier
Block
[Error Amp1]
Input offset
voltage
VIO 2, 3 COMP1 pin 2 V 15mV
Input bias
voltage
IADJ1 3 ADJ1 pin 0 V 100 nA
Transconduc-
tance
Gm 15 20* µA/V
Error Amplifier
Block
[Error Amp2]
Threshold
voltage
VTH1 10 ADJ2 pin VREF pin 1.5* V
Transconduc-
tance
Gm 15 20* µA/V
Error Amplifier
Block
[Error Amp3]
Threshold
voltage
accuracy
VTH1 12 COMP3 pin 2 V,
Ta 25°
ADJ3 pin VREF pin
(4.20 V/Cell setting)
0.5 0 0.5 %
VTH2 12 COMP3 pin 2 V,
Ta 10° to 85°,
ADJ3 pin VREF pin
(4.20 V/Cell setting)
0.7 0 0.7 %
VTH3 12 COMP3 pin 2 V,
Ta 25°
ADJ3 pin GND,
(4.10 V/Cell setting)
0.6 0 0.6 %
VTH4 12 COMP3 pin 2 V,
Ta 10° to 85°
ADJ3 pin GND,
(4.10 V/Cell setting)
0.8 0 0.8 %
MB39A134
Document Number: 002-08413 Rev. *C Page 9 of 44
(Ta 25°, VCC pin 19 V, VREF pin 0 mA)
Parameter Symbol Pin
No. Condition Value Unit
Min Typ Max
Error Amplifier
Block
[Error Amp3]
Input current IBATTH1 12 ADJ3 pin CELLS pin
VREF pin
BATT pin 16.8 V
25.2 38 A
IBATTL 12 VCC pin 0 V, BATT pin
16.8 V
01A
Transconduc-
tance
Gm 15 30* A/V
Current
Detection
Amplifier Block
[Current Amp1,
Current Amp2]
Input current IINCH 13, 24 INC1 pin INC2 pin 3 V to
VCC pin, Vin 100 mV
20 30 A
IINCH 1INC1 pin 3 V to VCC pin,
Vin 100 mV
0.1 0.2 A
IINCL 13, 24 INC1 pin INC2 pin 0.1 V,
Vin 100 mV
225 150 A
IINCL 1INC1 pin INC2 pin 0.1 V,
Vin 100 mV
255 170 A
Input offset
voltage
VOFF1 2INC1 pin 3 V to VCC pin 10 1mV
VOFF2 10 INC2 pin 3 V to VCC pin 2 3 4 mV
VOFF3 10 INC2 pin 0 V to 3 V 1 3 5 mV
Common mode
input
voltage range
VCM 2, 10 0 Vvcc V
Voltage gain AV2, 10 INC1 pin INC2 pin 3 V to
VCC pin, Vin 100 mV
24.5 25.0 25.5 V/V
Frequency band
width
BW 2, 10 AV 0 dB 2* MHz
Output voltage VOUTCH1 2 4.7 4.9 V
VOUTCH2 10 4.5 4.7 V
VOUTCL 2, 10 50 75 100 mV
Output source
current
ISOURCE 2, 10 OUTC1 pin OUTC2 pin 2 V 21mA
Output sink
current
ISINK 2, 10 OUTC1 pin OUTC2 pin 2 V 150 300 µA
PWM Comp.
Block
[PWM Comp.]
Threshold
voltage
VTL 20 Duty cycle 0% 1.4 1.5 V
VTH 20 Duty cycle 100% 2.5 2.6 V
MB39A134
Document Number: 002-08413 Rev. *C Page 10 of 44
(Ta 25°, VCC pin 19 V, VREF pin 0 mA)
Parameter Symbol Pin
No. Condition Value Unit
Min. Typ. Max.
Output Block
[OUT]
Output source
current
ISOURCE 20 OUT pin 13 V,
Duty 5%
(t 1/fosc Duty)
400* mA
Output sink
current
ISINK 20 OUT pin 19V,
Duty 5%
(t 1/fosc Duty)
400* mA
Output ON
resistance
ROH 20 OUT pin 45 mA 6.5 9.8 Ω
ROL 20 OUT pin 45 mA 5.0 7.5 Ω
Rise time tr1 20 OUT pin 3300 pF 50* ns
Fall time tf1 20 OUT pin 3300 pF 50* ns
Control Block
[CTL]
CTL input
voltage
VON 14 IC operation mode 2 25 V
VOFF 14 IC standby mode 0 0.8 V
Input current ICTLH 14 CTL pin 5 V 100 150 µA
ICTLL 14 CTL pin 0 V 01µA
Bias Voltage
Block
[VH]
Output
voltage
VH19 VCC pin 8 V to 25 V,
VH pin 0 to 30 mA
VVCC
6.5
VVCC
6.0
VVCC
5.5
V
Under Voltage
Lockout
Protection
Circuit Block
[UVLO]
Threshold
voltage
VTLH 21 VCC pin 6.0 6.2 6.4 V
VTHL 21 VCC pin 5.0 5.2 5.4 V
Hysteresis width VH21 VCC pin 1.0* V
Threshold
voltage
VTLH 6VREF pin 2.6 2.8 3.0 V
VTHL 6VREF pin 2.4 2.6 2.8 V
Hysteresis width VH6VREF pin 0.2 V
Over
Temperature
Detection
Detection
temperature
TTH 20 150 °C
Release
temperature
TTL 20 125 °C
AC Adapter
Voltage
Detection Block
[AC Comp.]
Threshold
voltage
VTLH 7 1.245 1.270 1.295 V
VTHL 7 1.215 1.250 1.285 V
Hysteresis width VH7 20 mV
ACOK
pin
output leak
current
ILEAK 5ACOK pin 25 V 01µA
ACOK pin
output “L”
level voltage
VACOKL 5ACOK pin 1 mA 0.9 1.1 V
Current
consumption
IVINL 18 VIN pin 19 V,
ACIN pin 0 V
01µA
IVINH 18 VIN pin 19 V,
ACIN pin 5 V
610µA
MB39A134
Document Number: 002-08413 Rev. *C Page 11 of 44
(Ta 25°, VCC pin 19 V, VREF pin 0 mA)
*: This parameter isn't be specified. This should be used as a reference to support designing the circuits.
Parameter Symbol Pin No. Condition Value Unit
Min. Typ. Max.
Charge Voltage
Control Block
[VO REFIN
Control]
Input voltage VH16 At 4.20 V/Cell 4.6 V
VREF V
VEXT 16 At external setting 0.4 4.4 V
VL16 At 4.10 V/Cell 0 0.2 V
Threshold
voltage
VTL 16 0.21 0.3 0.39 V
VTH 16 4.41 4.5 4.59 V
Input current IIN 16 ADJ3 pin 01µA
Input voltage VH11 At 4 Cells VVREF
0.4
V
VREF V
VM11 At 2 Cells 2.4 2.6 V
VL11 At 3 Cells 0 0.3 V
Input current IINL 11 CELLS 0 V 8.3 5 µA
IINH 11 CELLS IVREF 58.3µA
Charge Current
Control Block
[Charge Current
Control]
Input voltage VH9 At normal charge 4.6 V
VREF V
VEXT 9 At external setting 0 4.4 V
Threshold
voltage
VTH 9 4.41 4.50 4.59 V
Input current IIN 9 ADJ2 pin 01µA
General Standby
current
ICCS1 18 VCC pin 0 V,
CTL pin 0 V,
ACIN pin 5 V,
VIN pin 19 V
610µA
ICCS2 21 VIN pin 0 V,
CTL pin 0 V,
VCC pin 19 V
01µA
Power supply
current
ICC 21 CTL pin 5 V 2.7 4.0 mA
MB39A134
Document Number: 002-08413 Rev. *C Page 12 of 44
7. Typical Characteristics
Power supply current vs.
Power supply voltage
CTL pin input current, Reference voltage
vs. CTL pin input voltage
Power supply current ICC (mA)
CTL pin input current ICTL (A)
Reference voltage VVREF (V)
Power supply voltage VVCC (V) CTL pin input voltage VCTL (V)
Reference voltage vs.
Power supply voltage
Reference voltage vs.
Load current
Reference voltage VVREF (V)
Reference voltage VVREF (V)
Power supply voltage VVCC (V) Load current IVREF (mA)
Reference voltage vs.
Operating ambient temperature
Triangular wave oscillation frequency vs. Pow-
er supply voltage
Reference voltage VVREF (V)
Triangular wave oscillation
frequency fosc (kHz)
Operating ambient temperature Ta (°C) Power supply voltage VVCC (V)
0
1
2
3
4
5
0 5 10 15 20 25
Ta = +25 °C
VCTL = 5 V
0
100
200
300
400
500
600
700
800
900
1000
0 5 10 15 20 25
0
1
2
3
4
5
6
7
8
9
10
Ta = +25 °C
V
VCC
= 19 V
I
VREF
= 0 mA
V
VREF
I
CTL
0
1
2
3
4
5
6
0 5 10 15 20 25
Ta = +25 °C
V
CTL
= 5 V
I
VREF
= 0 mA
0
1
2
3
4
5
6
0 5 10 15 20 25
Ta = +25 °C
V
VCC
= 19 V
VCTL
= 5 V
450
460
470
480
490
500
510
520
530
540
550
0 5 10 15 20 25
Ta = +25 °C
V
CTL
= 5 V
RT = 33 kΩ
MB39A134
Document Number: 002-08413 Rev. *C Page 13 of 44
Triangular wave oscillation frequency vs. Oper-
ating ambient temperature
Triangular wave oscillation frequency vs. Tim-
ing resistor
Triangular wave oscillation
frequency fosc (kHz)
Triangular wave oscillation
frequency fosc (kHz)
Operating ambient temperature Ta (°C) Timing resistor RT (k)
Error amplifier threshold voltage vs.
Operating ambient temperature
Error amplifier threshold voltage vs.
Operating ambient temperature
Error amplifier threshold voltage
VTH (V)
Error amplifier threshold voltage
VTH (V)
Operating ambient temperature Ta (°C) Operating ambient temperature Ta (°C)
Error amplifier threshold voltage vs.
Operating ambient temperature
Permissible dissipation vs.
Operating ambient temperature
Error amplifier threshold voltage
VTH (V)
Permissible dissipation PD (mW)
Operating ambient temperature Ta (°C) Operating ambient temperature Ta (°C)
450
460
470
480
490
500
510
520
530
540
550
−40 −20 0 +20 +40 +60 +80 +100
V
VCC
= 19 V
V
CTL
= 5 V
RT = 33 kΩ
10
100
1000
10000
1 10 100 1000
Ta = +25 °C
VVCC
= 19 V
V
CTL
= 5 V
8.300
8.325
8.350
8.375
8.400
8.425
8.450
8.475
8.500
−40 −20 0
+20 +40 +60 +80 +100
V
VCC
= 19 V
VCTL
= 5 V
V
CELLS
= OPEN
12.500
12.525
12.550
12.575
12.600
12.625
12.650
12.675
12.700
−40 −20 0
+20 +40 +60 +80 +100
V
VCC
= 19 V
VCTL
= 5 V
V
CELLS
= GND
16.700
16.725
16.750
16.775
16.800
16.825
16.850
16.875
16.900
-40 -20 0
+20 +40 +60 +80 +100
V
VCC
= 19 V
VCTL
= 5 V
V
CELLS
= 5 V
0
200
400
600
800
1000
1200
1400
−40 −20 0 +20 +40 +60 +80 +100
1282
MB39A134
Document Number: 002-08413 Rev. *C Page 14 of 44
8. Functional Description
MB39A134 is a DC/DC converter which uses pulse width modulation (PWM) for charging Li-ion battery and controls the charge
voltage and current when charging the battery. It includes the charge control function for the battery and the AC adapter voltage
detection function to stably supply the voltage from the AC adapter and the battery to the system.
When controlling the charge voltage (constant voltage mode), the voltage entered in ADJ3 pin and CELLS pin can be used to set
an arbitrary voltage. The error amplifier (Error Amp3) compares BATT pin voltage with the internal reference voltage to generate
the PWM control signal for generating an arbitrary charge voltage.
When controlling the charge current (constant current mode), the current detection amplifier (Current Amp2) amplifies the voltage
drop generated between both ends of the charge current sense resistance (RS) to 25 times and outputs it through OUTC2 pin.
The error amplifier (Error Amp2) compares the output voltage from the current detection amplifier (Current Amp2) with the voltage
set at ADJ2 pin to generate the PWM control signal for executing the constant current charge.
When controlling the AC adapter power, the current detection amplifier (Current Amp1) amplifies the difference between -INC1
pin voltage and +INC1 pin voltage (VVREF) to 25 times and outputs it through OUTC1 pin when the output voltage of the AC
adapter drops. The error amplifier (Error Amp1) compares the output voltage from the current detection amplifier (Current Amp1)
with ADJ1 pin voltage to generate the PWM control signal for controlling the charge current so that AC adapter power can be kept
constant.
The triangular wave voltage generated from the triangular wave oscillator is compared with the lowest potential of the output
voltages from the error amplifier (Error Amp1, Error Amp2, and Error Amp3) and when the former is lower than the latter, the high
side switching FET is set on.
In addition, AC Comp detects installation/removal of the AC adapter and its information is generated through ACOK pin.
8.1 DC/DC Converter Block
8.1.1 Reference Voltage Block (REF)
The reference voltage circuit (REF) uses the voltage supplied from the VCC pin (pin 21) to generate stable voltage (Typ 5.0 V) that
has undergone temperature compensation. The generated voltage is used as the reference power supply for the internal circuitry of
the IC.
This block can output load current of up to 1 mA from the reference voltage VREF pin (pin 6).
8.1.2 Triangular Wave Oscillator Block (OSC)
The triangular wave oscillator builds the capacitor for frequency setting into, and generates the triangular wave oscillation waveform
by connecting the frequency setting resistor with the RT pin (pin 17). The triangular wave is input to the PWM comparator on the IC.
Triangular wave oscillation frequency: fosc
fosc (kHz) ≈ 17000 / RT (kΩ)
8.1.3 Error Amplifier Block (Error Amp1)
This amplifier detects the output signal from the current detection amplifier (Current Amp1) and outputs a PWM control signal.
In addition, a stable phase compensation can be made available to the system by connecting the resistor and the capacitor to the
COMP1 pin.
8.1.4 Error Amplifier Block (Error Amp2)
This amplifier detects the output signal from the current detection amplifier (Current Amp2), compares this to the output signal from
the charge current control circuit, and outputs a PWM control signal to be used in controlling the charge current.
In addition, a stable phase compensation can be made available to the system by connecting the resistor and the capacitor to the
COMP2 pin.
MB39A134
Document Number: 002-08413 Rev. *C Page 15 of 44
8.1.5 Error Amplifier Block (Error Amp3)
This error amplifier (Error Amp3) detects the output voltage from the DC/DC converter, compares this to the output signal from the
VO REFIN controller circuit, and outputs the PWM control signal.
Arbitrary output voltage from 2 Cell to 4 Cell can be set by connecting an external resistor of charging voltage to ADJ3 pin (pin 16).
In addition, a stable phase compensation can be made available to the system by connecting the resistor and the capacitor to the
COMP3 pin.
8.1.6 Current Detection Amplifier Block (Current Amp1)
The current detection amplifier (Current Amp1) amplifies the voltage difference between INC1 pin (pin 24) and -INC1 pin (pin 1) 25
times and the signal is output to the following error amplifier (Error Amp1) .
8.1.7 Current Detection Amplifier Block (Current Amp2)
The current detection amplifier (Current Amp2) detects a voltage drop on the both ends of the output sense resistor (RS) due to the
flow of the charge current, using the INC2 pin (pin 13) and BATT pin (pin 12). The signal amplified to 25 times is output to the
following error amplifier (Error Amp2).
8.1.8 PWM Comparator Block (PWM Comp.)
The PWM comparator circuit (PWM Comp.) is a voltage-pulse width converter for controlling the output duty of the error amplifiers
(Error Amp1 to Error Amp3) depending on their output voltage.
The PWM comparator circuit compares the triangular wave voltage generated by the triangular wave oscillator with the error
amplifier output voltage and turns on the external output transistor (MOS FET) , during the interval in which the triangular wave
voltage is lower than the error amplifier output voltage.
8.1.9 Output Block (OUT)
The output circuit uses a totem-pole configuration capable of driving an external P-ch MOS FET.
The output “L” level sets the output amplitude to 6 V (Typ) using the voltage generated by the bias voltage block (VH) .
This results in increasing conversion efficiency and suppressing the withstand voltage of the connected external transistor
(MOSFET) even in a wide range of input voltages.
8.1.10 Power Supply Control Block (CTL)
Setting the CTL pin (pin 14) to “L” level places the IC in the standby mode. During the standby mode, only AC adapter detection
function is operated. (The supply current is 6 µA at typical in the standby mode.)
Table 1. CTL Function Table
8.1.11 Bias Voltage Block (VH)
The bias voltage circuit outputs VVCC 6 V (Typ) as the minimum potential of the output circuit. In the standby mode, this circuit
outputs the potential equal to VVCC.
CTL Power AC Adapter Detection
L OFF (Standby) ON (Active)
H ON (Active) ON (Active)
MB39A134
Document Number: 002-08413 Rev. *C Page 16 of 44
8.2 Protection Functions
8.2.1 Under Voltage Lockout Protection Circuit Block (UVLO)
The transient state or a momentary decrease in supply voltage or internal reference voltage (VREF pin),
which occurs when the power supply (VCC pin) is turned on, may cause malfunctions in the control IC, resulting in breakdown or
deterioration of the system.
To prevent such malfunction, the under voltage lockout protection circuit detects internal reference voltage drop and fixes the OUT
pin (pin 20) to the “H” level. The system restores when the power supply and the internal reference reaches less than the threshold
voltage of the lockout protection circuit at the low voltage level.
Protection circuit (UVLO) operation function table
When UVLO is operating (VCC or VREF voltage is lower than UVLO threshold voltage.), the logic of the following pin is fixed at the
value shown.
8.2.2 Over Temperature Detection
The circuit protects an IC from heat-destruction. If the temperature at the joint part reaches 150°C, the circuit changes the level of
OUT pin to “H”, and stops the voltage output.
In addition, if the temperature at the joint part drops to 125°C, the output restarts again.
Therefore, make sure to design the DC/DC power supply system so that the over heating protection does not start frequently.
8.2.3 Detection Functions
AC adapter voltage detection block (AC Comp.)
The AC adapter voltage detection block (AC Comp.) detects that ACIN pin voltage is below 1.25 V (Typ)
and sets ACOK pin in the AC adapter voltage detection block to Hi-Z. In addition, a higher voltage from either VCC pin or VIN pin is
supplied as the IC power supply.
pin OUT
Status H
ACIN ACOK
<AC Comp.>
R1
R2
+
−
75
ACIN ACOK
HL
L Hi-Z
AC adapter
Micro
controller
MB39A134
Document Number: 002-08413 Rev. *C Page 17 of 44
AC adapter detection voltage setting
VIN Low to High
Vth (R1 R2) / R2 × 1.27 V
VIN High to Low
Vth (R1 R2) / R2 × 1.25 V
8.2.4 Setting the Charge Voltage
The charge voltage (DC/DC output) is set by the input voltage to ADJ3 pin (pin 16) and CELLS pin (pin 11). The ADJ3 pin (pin 16)
can set charge voltage per cell. An arbitrary charge voltage is set when external resistor is set. It does not need external resistor
when ADJ3 pin (pin 16) is input to VREF level or GND level by internal high accurate reference voltage. The CELLS pin (pin 11) can
set the series battery number when the pin is input VREF, OPEN or GND level.
The setting of ADJ3 pin (pin 16), CELLS pin (pin 11) and charge voltage (DC/DC output) is shown below.
• ADJ3 Pin Internal Circuit
ADJ3 Input Voltage CELLS Charge Voltage Note
VREF pin
(ADJ3 ≥4.6 V)
OPEN 8.4 V 2 Cell × 4.20 V/Cell
GND 12.6 V 3 Cell × 4.20 V/Cell
VREF 16.8 V 4 Cell × 4.20 V/Cell
GND pin
(ADJ3 0.2 V)
OPEN 8.2 V 2 Cell × 4.10 V/Cell
GND 12.3 V 3 Cell × 4.10 V/Cell
VREF 16.4 V 4 Cell × 4.10 V/Cell
External voltage setting
(ADJ3 0.4 V to 4.4 V)
OPEN 4 × ADJ3 pin voltage 2 Cell × 2 × ADJ3 pin voltage/Cell
GND 6 × ADJ3 pin voltage 3 Cell × 2 × ADJ3 pin voltage/Cell
VREF 8 × ADJ3 pin voltage 4 Cell × 2 × ADJ3 pin voltage/Cell
16
ADJ3
SELECTOR
Comparator_A
Comparator_B
LOGIC
2.1 V
2.05 V
To Error Amp3
VA
VA
4.5 V
0.3 V
+
−
+
−
MB39A134
Document Number: 002-08413 Rev. *C Page 18 of 44
8.2.5 Setting the Charge Current
The Error amplifier block (Error Amp2) compares the output voltage of charge current control block set by ADJ2 pin (pin 9) with the
output signal from the current detection amplifier (current Amp2) , and outputs a PWM control signal to be used in controlling the
maximum charge current for battery. When the current overflows the rated value, the current will be constantly charged to the rated
value, and the charge voltage will drop.
Battery charge current setting voltage : ADJ2
• ADJ2 Pin Internal Circuit
Upper limit of charge current Io Charge current control block output voltage (V) 0.075
Current detection amplifier block voltage gain (25.0 V/V Typ) ×
sense resistor RS (Ω)
ADJ2 Input Voltage
Charge Current
Control Block
Output Voltage
Charge Current
RS 40 mΩRS 20 mΩRS 15 mΩ
VREF
(ADJ2 4.6 V)
1.5 V 1.425 A 2.85 A 3.79 A
External Voltage Setting
(ADJ2 GND to 4.4 V)
VADJ2
(V)
VADJ2-0.075
(A)
2 × (VADJ2-0.075)
(A)
2.66 × (VADJ2-0.075)
(A)
9
ADJ2
Selector
Comparator_C
1.5 V
To Error Amp2
4.5 V
+
−
MB39A134
Document Number: 002-08413 Rev. *C Page 19 of 44
• Example of charge current setting (RS 40 mΩ)
V
ADJ2
Io
4.59 V
1.425 A
4.325 A
V
VREF
0 V
4.4 V
Internal reference voltage setting when ADJ2 = 4.6 V to VREF
External setting when ADJ2 = 0 V to 4.4 V
4.41 V
100
200
300
400
500
600
Io (mA)
200 300 400 500 600
V
ADJ2
(mV)
Io = 0 mA at V
ADJ2
= 0 V
Min V
ADJ2
> 50 mV at Io = 0 mA
Max V
ADJ2
< 100 mV at Io = 0 mA
Ty p V
ADJ2
= 75 mV at Io = 0 mA
100
Error (MB39A134) < ±25 mA
At R
S
= 40 mΩ,
+INC1 = 3 V to VCC
MB39A134
Document Number: 002-08413 Rev. *C Page 20 of 44
8.2.6 Setting Dynamically-Controlled-Charging
By connecting as shown in the example of the figure below, the AC adopter voltage (VIN) drops and becomes the calculated Vth,
and then, the dynamically-controlled charging loop reduce the charge current to keep a settled power level.
AC adopter voltage in dynamically controlled charging mode:
VREF : Reference voltage (5.0 V Typ) AV : Current detection amplifier block voltage gain (25.0 V/V Typ)
Vth VREF × (1 1×R4 ) ×R1 R2
AVR3 R4 R2
<Error Amp1>
<Current Amp1>
24
3
1
V
IN
+INC1
ADJ1
−INC1
VREF (5 V)
R1
R2 R3
R4
+
−
−
+
MB39A134
Document Number: 002-08413 Rev. *C Page 21 of 44
9. Transit Response When a Load Changes Suddenly
The constant voltage control loop and the constant current control loop are independent each other and when a load changes
suddenly, these two control loops switch over each other.
Overshoot of the battery voltage and current is generated by the delay in the control loop when changing the mode.
The delay time is determined by the phase compensation components values.
When the constant current control switches over to the constant voltage control when removing the battery, the control period with
higher duty than the rated charge voltage occurs, resulting in voltage overshoot. In such a period, since the battery is removed, no
excessive voltage should be applied to the battery.
When the constant voltage control switches over to the constant current control when installing the battery, the control period with
higher duty than the rated charge current occurs, resulting in current overshoot.
For MB39A134, it can not be as current overshoot with 10 ms or less.
Battery Current
Error Amp2 Output
Low VoltageConstant Current
Error Amp3 Output
Error Amp2 Output Error Amp3 Output
Battery Voltage
Constant Current
10 ms
When the charge control switches
over from the constant current control
to the constant voltage control, the
control period with higher duty than
the rated charge voltage occurs,
resulting in voltage overshoot. For MB39A134, it can not be
as current overshoot with 10
ms or less.
MB39A134
Document Number: 002-08413 Rev. *C Page 22 of 44
10. Connection Without Using The Current Amp1, Current Amp2 and
The Error Amp1, Error Amp2
When Current Amp1, 2 or Error Amp1, 2 are not used, please connect it as follows.
• +INC1 pin (pin 24), -INC1 pin (pin 1), ADJ1 pin (pin 3), and ADJ2 pin (pin 9) are connected with the VREF pin.
• +INC2 pin (pin 13) is connected with the pin BATT pin (pin 12).
• OUTC1 pin (pin 2) and OUTC2 pin (pin10) open.
1
24
2
10
6
13
12
3
9
4
8
OUTC1
VREF
+INC1
OUTC2
-INC1
ADJ1
ADJ2
COMP1
COMP2
+INC2
BATT
“OPEN”
“OPEN”
“OPEN”
“OPEN”
MB39A134
Document Number: 002-08413 Rev. *C Page 23 of 44
11. Input/Output Pin Equivalent Circuit Diagram
14
GND
33.1 k
Ω
51 kΩ
CTL
VCC
VCC VCC
6VREF
GND
GND
GND
GND
37.27 kΩ
12.10 kΩ
21
23 23
17 RT
6
23
VREF
VREF VREF
VREF
2
OUTC1
OUTC1 OUTC2
3ADJ1
COMP1
COMP3
6
23
4
VREF
GND
GND GND
10
OUTC2
+INE2 +INE3
COMP2
6
23
8
VREF
-INE3
+INC1 +INC2
-INC1
6
23
15
24
2
1
40 k
Ω
10 k
Ω
21
23
6
13
10
12
BATT
21
23
6
7.7 kΩ
40 kΩ
10 kΩ
<Reference voltage block> <Control bloc>
<Triangular wave oscillator block> <Error amplifier block (Error Amp1) >
<Error amplifier block (Error Amp2) >
<Error amplifier block (Error Amp3) >
<Current detection amplifier block (Current Amp1) > <Current detection amplifier block (Current Amp2) >
ESD protection
component
MB39A134
Document Number: 002-08413 Rev. *C Page 24 of 44
VREF
GND
GND
CT
COMP1
COMP2
COMP3
20 OUT
VH
VCC
VCC
GND
G
ND GND
VIN
ACIN ACOK
VREF
6
4
8
15
23
21
19
23
5
7
23
21
18
19 VH
100 kΩ16
V
CC
ADJ3 +INE
3
23
21
23
6
SELECTER
4.5V
0.3V
<PWM comparator block> <Output block>
<AC adapter detection block>
<Bias voltage block> <Charge voltage setting block>
MB39A134
Document Number: 002-08413 Rev. *C Page 25 of 44
9
GND
GND
GND
ADJ2
23
VREF
VREF
6
4.5 V
11
6
CELLS
23
12
BATT
SELECTER
+INE2
-INE3
1 MΩ
1 MΩ
<Charge current setting block>
<Cell switch block>
MB39A134
Document Number: 002-08413 Rev. *C Page 26 of 44
12. Typical Application Circuit
23
24
22
21
20
19
18
17
16
15
14
13
2
1
3
4
5
6
7
8
9
10
11
12
R2
CDRH104R-150
D1
MBRA340T3
R26
L1
15 μH
SGND
MB39A134
+INC2
CTL
COMP3
ADJ3
RT
VIN
VH
OUT
VCC
CVM
GND
+INC1
BATT
CELLS
OUTC2
ADJ2
COMP2
ACIN
VREF
ACOK
COMP1
ADJ1
OUTC1
−INC1
C20 *2
R34 *2
*2
DTr2 *2
R25 *1
VSYS
Wire short
R1
TPCA8102
Q2B
TPCA8102
Q2A
VIN
GND
ACOK
CTL SW1-1
C17 *2
R48 *2
R47
100 kΩ
R27
10 kΩ
Q3
TPCA8102
Q1-2 *2
Q1-1
C10 *2
C14
*2
R19
*2
R18
0 Ω
C11
0.1 μF
22 μF
20 mΩ
47 kΩ
R30 *1
C3C2
OUTC2
OUTC1
C15
SW1-2
SW1-2
off IO
2.85 A
ADJ2
VREF
CELLS
ACOFF
CVM
+INC1
5 V −INC1
18 V
GND
Vo
DTr1
DTC144EET1G
R9
10 kΩC9
0.001 μF
C1
10 μF
0.22
μF
C13 *2
R10
10 kΩC12
0.001 μF
R17
*2
R16
100 kΩ
R14
100 kΩ
R7
100 kΩ
R8
cut
R15
10 kΩ
C7
0.1 μF
C21
0.1 μF
C6
0.1 μF
R12
*1
R6
*1
R32 *1
R35 *1
R28 *1
C19 *2
C5 *2
R4
1 kΩ
R5
56 kΩ
*1 Patterm short
*2 Not mounted
R46
0 Ω
R13
*2
C8
*2
R11
cut
R23
200 kΩ
R24
100 kΩ
R20
6.2 kΩ
R22
10 kΩ
R21
91 kΩ
R43
11 kΩ
R45
100 kΩ
R44
240 kΩ
C4
0.022 μF
μPA2714GR
Place R12 0 Ω for output 4.2 V/Cell.
Place R13 0 Ω for output 4.1 V/Cell.
Place R18 0 for 4 Cells operation.
Place R19 0 for 3 Cells operation.
Open R18 & R19 2 Cells operation.
MB39A134
Document Number: 002-08413 Rev. *C Page 27 of 44
•Parts List
Com-
ponent Item Specification Vendor Package Parts No. Remarks
M1 IC MB39A134 Cypress TSSOP-24
Q1-1 P-ch FET VDS 20 V,
ID 7 A (Max)
RENESAS SOP-8 PA2714GR
Q1-2 P-ch FET Not mounted
Q2A P-ch FET VDS 30 V,
ID 40 A (Max)
TOSHIBA SOP
Advance
TPCA8102
Q2B P-ch FET VDS 30 V,
ID 40 A (Max)
TOSHIBA SOP
Advance
TPCA8102
Q3 P-ch FET VDS 30 V,
ID 40 A (Max)
TOSHIBA SOP
Advance
TPCA8102
DTr1 Transistor VCEO 50 V ON Semi SC-75 DTC144EET1G
DTr2 Transistor Not mounted
D1 Diode VF 0.45 V (Max)
at IF 3 A
ON Semi RMDS MBRA340T3
L1 Inductor 15 µH 50 mW
Irms 3.1 A
SUMIDA SMD CDRH104R-150
C1 Ceramic Capacitor 10 µF (25 V) TDK 3225 C3225X5R1E106K
C2 Ceramic Capacitor 22 µF (25 V) TDK 3225 C3225JC1E226M
C3 Ceramic Capacitor Not mounted
C4 Ceramic Capacitor 0.022 µF (50 V) TDK 1608 C1608JB1H223K
C5 Ceramic Capacitor Not mounted
C6 Ceramic Capacitor 0.1 µF (50 V) TDK 1608 C1608JB1H104K
C7 Ceramic Capacitor 0.1 µF (50 V) TDK 1608 C1608JB1H104K
C8 Ceramic Capacitor Not mounted
C9 Ceramic Capacitor 0.001 µF (50 V) TDK 1608 C1608JB1H102J
C10 Ceramic Capacitor Not mounted
C11 Ceramic Capacitor 0.1 µF (50 V) TDK 1608 C1608JB1H104K
C12 Ceramic Capacitor 0.001 µF (50 V) TDK 1608 C1608JB1H102J
C13 Ceramic Capacitor Not mounted
C14 Ceramic Capacitor Not mounted
C15 Ceramic Capacitor 0.22 µF (25 V) TDK 1608 C1608JB1H224K
C17 Not mounted
C19 Ceramic Capacitor Not mounted
C20 Ceramic Capacitor Not mounted
C21 Ceramic Capacitor 0.1 µF (50 V) TDK 1608 C1608JB1H104K
MB39A134
Document Number: 002-08413 Rev. *C Page 28 of 44
Com-
ponent Item Specification Vendor Package Parts No. Remarks
R1 Resistor 0 ΩMac-Eight SMD MJP-0.2 Wire short
R2 Resistor 20 mΩKOA SL1 SL1TTE20L0D
R4 Resistor 1 kΩSSM 1608 RR0816P102D
R5 Resistor 56 kΩSSM 1608 RR0816P563D
R6 Resistor Pattern short
R7 Resistor 100 kΩSSM 1608 RR0816P104D
R8 Resistor Pattern cut
R9 Resistor 10 kΩSSM 1608 RR0816P103D
R10 Resistor 10 kΩSSM 1608 RR0816P103D
R11 Resistor Pattern cut
R12 Resistor Pattern short
R13 Resistor Not mounted
R14 Resistor 100 kΩSSM 1608 RR0816P104D
R15 Resistor 10 kΩSSM 1608 RR0816P103D
R16 Resistor 100 kΩSSM 1608 RR0816P104D
R17 Resistor Not mounted
R18 Resistor 0 ΩKOA 1608 RK73Z1J
R19 Resistor Not mounted
R20 Resistor 6.2 kΩSSM 1608 RR0816P622D
R21 Resistor 91 kΩSSM 1608 RR0816P913D
R22 Resistor 10 kΩSSM 1608 RR0816P103D
R23 Resistor 200 kΩSSM 1608 RR0816P204D
R24 Resistor 100 kΩSSM 1608 RR0816P104D
R25 Resistor Pattern short
R26 Resistor 47 kΩSSM 1608 RR0816P473D
R27 Resistor 10 kΩSSM 1608 RR0816P103D
R28 Resistor Pattern short
R30 Resistor Pattern short
R32 Resistor Pattern short
R34 Not mounted
R35 Resistor Pattern short
R43 Resistor 11 kΩSSM 1608 RR0816P113D
R44 Resistor 240 kΩSSM 1608 RR0816P244D
R45 Resistor 100 kΩSSM 1608 RR0816P104D
R46 Resistor 0 KOA 1608 RK73Z1J
MB39A134
Document Number: 002-08413 Rev. *C Page 29 of 44
Note : These components are recommended based on the operating tests authorized.
RENESAS : Renesas Electronics Corporation
TOSHIBA : TOSHIBA Corporation
ON Semi : ON Semiconductor
SUMIDA : SUMIDA Corporation
TDK : TDK Corporation
Mac-Eight : Mac-Eight Co.,Ltd
KOA : KOA Corporation
SSM : SUSUMU Co.,Ltd
MATSUKYU : Matsukyu Co.,Ltd
Compo-
nent Item Specification Vendor Package Parts No. Remarks
R47 Resistor 100 kΩSSM 1608 RR0816P104D
R48 Not mounted
SW1 DIP SW SW MATSUKYU SMD DMS-2H
PIN Wiring Pin WT-2-1 Mac-Eight WT-2-1 11-pin
MB39A134
Document Number: 002-08413 Rev. *C Page 30 of 44
13. Application Note
• Inductor selection
The inductance value should be selected, as a reference, so that the peak-to-peal value of the inductor ripple current is 50 or less
of the maximum charge current. In such a case, the inductance value can be obtained as follows :
L : Inductance value [H]
IOMAX : Max. charge current [A]
LOR : Peak-to-peak value of inductor ripple current - max. charge current ratio (0.5)
VIN : Switching system power supply voltage [V]
VO : Charge voltage [V]
fosc : Switching frequency [Hz]
The minimum charge current value (critical current value) without backward inductor current can be obtained as follow :
IOC : Critical current [A]
L : Inductance value [H]
VIN : Switching system power supply voltage [V]
VO : Charge voltage [V]
fosc : Switching frequency [Hz]
To judge that the current passing through the inductor is below a rated value, it is necessary to obtain a maximum current value
passing through the inductor. The maximum inductor current value can be obtained as follows :
ILMAX : Max. inductor current [A]
IOMAX : Max. charge current [A]
IL : Peak-to-peak value of inductor ripple current [A]
L ≥VIN VO×VO
LOR × IOMAX VIN × fOSC
IOC VO×VIN VO
2 × LV
IN × fOSC
ILMAX ≥ IOMAX IL
2
IL ≥ VIN VO×VO
LV
IN× fOSC
MB39A134
Document Number: 002-08413 Rev. *C Page 31 of 44
• Switching FET Selection
If MB39A134 is used for the charger for a notebook PC, since the output voltage of an AC adapter, which is the input voltage of an
switching FET, is 25 V or less, in general, a 30 V class MOS FET can be used as the switching FET. Obtain the maximum value of
the current flowing through the switching FET in order to determine whether the current flowing through the switching FET is within
the rated value. The maximum current flowing through the switching FET can be found by the following formula.
IDMAX : Max. switching FET drain current [A]
IOMAX : Max. charge current [A]
IL : Peak-to-peak value of inductor ripple current [A]
In addition, to judge that permissible switching FET loss is below the rated value, it is necessary to obtain the switching FET loss.
To reduce switching FET loss as much as possible. when selecting a switching FET, take into consideration that the continuity loss
is equal to the switching loss.
The switching FET continuity loss can be obtained by the following formula:
PRon : Switching FET continuity loss [W]
IO : Charge current [A]
VIN : Switching system power supply voltage [V]
VO : Charge voltage [V]
Ron : Switching FET on resistance []
IDMAX≥ IOMAX + IL
2
PRon VO×IO2× Ron
VIN
ΔIL
0
I
OMAX
I
OC
IL
MAX
Inductor current
Varies depending on a load current.
Time
MB39A134
Document Number: 002-08413 Rev. *C Page 32 of 44
The switching FET switching loss can be obtained simply as follows :
PSW : Switching FET switching loss [W]
ILMIN IOMAX IL 2 : Lower value of inductor current [A]
ILMAX IOMAX IL 2 : Upper value of inductor current [A]
VIN : Switching system power supply voltage [V]
fosc : Switching frequency [Hz]
Tr : Switching FET turn-on time [s]
Tf : Switching FET turn-off time [s]
• Flyback Diode Selection
Select the shot-key barrier diode (Flyback diode) with a small forward voltage as much as possible.
To judge that the current passing through the flyback diode is below the rated value, it is necessary to obtain the value of peak
current passing through the flyback diode. The maximum current value of the flyback diode can be obtained as follows :
If : Forward current [A]
IOMAX : Max. charge current [A]
IL : Peak-to-peak value of inductor ripple current [A]
Furthermore, to judge that permissible flyback diode loss is below a rated value, it is necessary to obtain the flyback diode loss. The
flyback diode loss can be obtained as follows :
PSBD : Flyback diode loss [W]
IOMAX : Max. charge current [A]
VIN : Switching system power supply voltage [V]
VO : Charge voltage [V]
Vf : Forward voltage [V]
PSW 1× VIN × ILMIN × fosc × Tr 1× VIN× ILMAX × fosc × Tf
22
If ≥IOMAX + IL
2
PSBD IOMAX × (1 VO) × Vf
VIN
MB39A134
Document Number: 002-08413 Rev. *C Page 33 of 44
• Output Capacitor Selection
Since a high ESR causes the output ripple voltage to increase, a low-ESR capacitor is needs to be used in order to reduce the
output ripple voltage. Use a capacitor that has sufficient ratings to surge current generated when the battery is inserted or removed.
Generally, the ceramic capacitor is used as the output capacitor.
With the switching ripple voltage taken into consideration, the minimum capacitance required can be found by the following formula.
Co : Output capacitor [F]
ESR : Serial resistance of output capacitor []
VO : Switching ripple voltage [V]
IL : Peak-to-peak value of inductor ripple current [A]
fosc : Switching frequency [Hz]
Since an overshoot occurs in the DC/DC converter output voltage when a battery being charged is removed, use a capacitor having
sufficient withstand voltage. Generally, the capacitor having a rated withstand voltage higher than the maximum input voltage is
sued.
Moreover, use a capacitor having sufficient tolerance for allowable ripple current. The allowable ripple current required can be found
by the following formula.
Irms : Acceptable ripple current (effective value) [A]
IL : Peak-to-peak value of inductor ripple current [A]
Co ≥1
2 × fosc× ( VO ESR)
IL
Irms≥IL
2 3
MB39A134
Document Number: 002-08413 Rev. *C Page 34 of 44
• Input Capacitor Selection
Select an input capacitor that has an ESR as small as possible. A ceramic capacitor is ideal. If a high capacitance capacitor is
needed for which there is no suitable ceramic capacitor use a polymer capacitor or a tantalum capacitor having a low ESR.
The ripple voltage by the switching operation of the DC/DC converter is generated in the power supply voltage. Please consider the
lower limit value of the input capacitor according to the allowable ripple voltage. The ripple voltage of the power supply can be easily
found by the following formula.
VIN : Peak-to-peak value of switching system power supply ripple voltage [V]
IOMAX : Maximum charge current [A]
CIN : Input capacitor [F]
VIN : Switching system power supply voltage [V]
VO : Charge voltage [V]
fOSC : Switching frequency [Hz]
ESR : Series resistance component of input capacitor []
IL : Peak-to-peak value of inductor ripple current [A]
The ripple voltage of the power supply can be decreased by raising the switching frequency besides using the capacitor.
The capacitor has the features in the frequency, temperature and bias voltage, so that the effect capacitance can be extremely small
depending on the use conditions.
Please choose the one of having the enough margin for the input voltage and ripple current to ratings of the capacitor.
The acceptable ripple current is given by the following formula.
Irms : Acceptable ripple current (effective value) [A]
IOMAX : Maximum charge current [A]
VIN : Switching system power supply voltage [V]
VO : Charge voltage [V]
VIN IOMAX ×VO+ ESR × (IOMAX IL )
CIN VIN×fOSC 2
Irms ≥ IOMAX×VIN
VO× (VIN VO)
MB39A134
Document Number: 002-08413 Rev. *C Page 35 of 44
• Designing Phase Compensation Circuit
(1) Constant Voltage (CV) Mode Phase Compensation Circuit
It is common to connect a 1-pole-1-zero phase compensation circuit to the output pin (COMP3) of the error amplifier 3 (gm
amplifier). When a low-ESR capacitor, such as a ceramic capacitor, is used as the output capacitor, it is easier for the DC/DC
converter to oscillate as the phase delay approaches 180 degrees due to the resonance frequency of LC. In this situation, perform
phase compensation by connecting a RC phase lead compensator to the COMP3 pin, and between the -INE3 pin and the BATT pin.
Figure 1. 1pole-1zero Phase Compensation Circuit
Rc (Ω) and Cc (F) of the phase lead circuit can be obtained by the following formula.
IO : Charge current [A]
VIN : Switching system power supply voltage [V]
L : Inductance value of inductor [H]
Co : Output capacitor value [F]
VO : Charge voltage [V]
In this situation, the crossover frequency [Hz] can be obtained by the following formula.
RC ≈
IO×L
190 × 106× VIN Co
CC ≈RC
fCO ≈ 1×105×VIN
VO×CC
Vrefint1
VO
COMP3
Rc
R1
R2
Cc
BATT
Error
Amp3
−
+
12
15
To PWM
Comp.
L× Co
MB39A134
Document Number: 002-08413 Rev. *C Page 36 of 44
(2) Constant Current (CC) Mode Phase Compensation Circuit
Since the output capacitor impedance has a small influence to the loop response characteristics in this mode, the phase
compensation circuit with 1pole-1zero is normally connected to the output pin (COMP2) of the error amplifier 2 (gm amplifier) .
Figure 2. 1pole-1zero Phase Compensation Circuit
Rc (Ω) and Cc (F) of the phase lead circuit can be obtained by the following formula.
Rs : Resistance value of charge current detection []
VIN : Switching system power supply voltage [V]
L : Inductance value [H]
Co : Output capacitance value [F]
fCO : Crossover frequency [Hz]
RC ≈ 1.2×104×fCO×L
Rs×VIN
CC ≈RC
Vrefint2
COMP2
Rc
Current Amp2
Rs
Cc
Error
Amp2
BATT
+INC2
−
+
−
+
12
13
To PWM
Comp.
L×Co
MB39A134
Document Number: 002-08413 Rev. *C Page 37 of 44
• Allowable Loss, and Thermal Design
In general, the allowable loss and thermal design of this IC can be ignored because this IC is highly effective. However, when this IC
is used with high power supply voltage, high switching frequency, high load, or high temperature, it is necessary to take account of
the allowable loss and thermal design while using this IC.
The IC internal loss (PIC) can be found by the following formula.
PIC VCC× (ICC Qg×fOSC)
PIC : IC's Internal loss [W]
VCC : Power supply voltage (VIN) [V]
ICC : Power supply current [A] (4.0 mA Max)
Qg : Total amount of charges of all switching FETs [C] (when Vgs 6 V)
fOSC : Switching frequency [Hz]
The temperature at the joint part (Tj) can be obtained as follows :
Tj Ta ja × PIC
Tj : Joint part temperature [°C]
Ta : Ambient temperature [°C]
ja : TSSOP-24 package thermal resistance (78°C / W)
PIC : IC's internal loss [W]
MB39A134
Document Number: 002-08413 Rev. *C Page 38 of 44
• Board Layout
When designing the layout, consider the points listed below. Take account of the following points when designing the board
layout.
• Place a GND plane on the IC mounting surface whenever possible. Connect the controller GND to PGND only at one point of
PGND in order to prevent a large current path from passing the controller GND.
• Connect to the input capacitor (CIN), switching FET, flyback diode, inductor (L), sense resistance (Rs), and the output capacitor
(Co) on the surface layer. Do not connect to them via any through-hole.
• For a loop composed of input capacitors (CIN), switching FET and flyback diode, minimize its current loop. When minimizing
routing and loops, give priority to this loop over others.
• Connect GND pins of the input capacitor (CIN), flyback diode, and the output capacitor (Co) to GNDs on the inner layer via the
through holes by making them close to the pins.
• Large currents momentarily flow through the nets of the OUT pin, which are connected to the switching FET gate. Use a wiring
width of about 0.8 mm and minimize the length of routing.
• Place the bypass capacitor connected to VCC, VIN, VREF, and VH pins, and the resistance connected to the RT pin as close
to the respective pins as possible. Moreover, connect the bypass capacitor and the GND pins of the VCC, VIN, and VREF of
the fOSC:setting resistance in close proximity to the GND pin of the IC. (Strengthen the connection to the internal layer GND by
making through-holes in close proximity to each of the GND pin of the IC, terminals of bypass capacitors, terminals of the fosc
setting resistors.)
• Since nets of INC1, INCx, BATT, COMPx, and RT pins are sensitive to noise, make wiring for them as shortly as possible,
and keep them away from switching system parts as much as possible.
•The remote sensing (Kelvin connection) of the routing of the +INC2 and BATT pins are very sensitive to noise. Therefore, make
their routing close to each other and keep the routing as far away from switching components as possible.
GND
VCC
PGND
GND
PGND
VREF
VH RT
VIN
CIN
Co
L
VIN
VO
PGND
Rs
GND wiring example Switching system part arrangement example
Through hole connecting of GND
and PGND at a single point
Surface layer
Inner layer
Inner layer
Surface layer
Feedback line
To BATT
To INC2
Flyback diode
Switching FET
MB39A134
Document Number: 002-08413 Rev. *C Page 39 of 44
14. Reference Data
Unless explained specially, the measurement conditions are VIN = 19 V, IO = 2.85 A, Li+ battery 4 Cell, and
Ta = 25°C.
Conversion efficiency vs. Charging current
(Constant voltage mode) Charging voltage vs. Charging current
Conversion efficiency (%)
Charging voltage Vo (V)
Charging current Io (A) Charging current Io (A)
Conversion efficiency vs. Charging voltage
(Constant current mode)
Conversion efficiency (%)
Charging voltage Vo (V)
Switching waveform
(Constant voltage mode) Switching waveform
(Constant current mode)
80
82
84
86
88
90
92
94
96
98
100
0.0 0.5 1.0 1.5 2.0 2.5 3.0
3 Cells
4 Cells
2 Cells
0
2
4
6
8
10
12
14
16
18
20
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
SW1-2 = OFF
4 Cells
3 Cells
2 Cells
024681012141618
50
55
60
65
70
75
80
85
90
95
100
1
μs
/div
V
LX
V
OUT
I
O
= 1.5 A
V
LX
(V)
V
OUT
(V)
0
10
20
5
15 0
5
10
15
0
VLX
(V)
10
20
5
15 0
VOUT
(V)
5
10
15
1 μs/div
VLX
VOUT
VO = 10 V
MB39A134
Document Number: 002-08413 Rev. *C Page 40 of 44
Start and stop
(Constant voltage mode)
Start and stop
(Constant current mode)
Load-step response
(Constant voltage mode)
Battery insertion
Load-step response
(Constant voltage mode)
Battery removal
Load-step operation response
(Constant current mode)
Battery insertion
Load-step operation response
(Constant current mode)
Battery removal
V
O
I
O
V
CTL
20 ms/div
5
10
0
5
0
2
15
V
O
(V)
V
CTL
(V)
I
O
(A)
V
O
I
O
V
CTL
4 ms/div
5
10
0
5
0
2
15
V
O
(V)
V
CTL
(V)
I
O
(A)
20 ms/div
I
O
V
O
CV to CV
14
16
V
O
(V)
0
I
O
(A)
1
18
20
20 ms/div
I
O
V
O
CV to C V
14
16
V
O
(V)
0
I
O
(A)
1
18
20
20 ms/div
I
O
V
O
CV to CC
14
16
V
O
(V)
0
I
O
(A)
1
18
20
2
3
20 ms/div
IO
VO
CC to CV
14
16
VO
(V)
0
IO(A)
1
18
20
2
3
MB39A134
Document Number: 002-08413 Rev. *C Page 41 of 44
15. Usage Precaution
1. Do not Configure the IC Over the Maximum Ratings
If the lC is used over the maximum ratings, the LSl may be permanently damaged.
It is preferable for the device to be normally operated within the recommended usage conditions. Usage outside of these conditions
can have a bad effect on the reliability of the LSI.
2. Use the Devices within Recommended Operating Conditions
The recommended operating conditions are the recommended values that guarantee the normal operations of LSI.
The electrical ratings are guaranteed when the device is used within the recommended operating conditions and under the
conditions stated for each item.
3. Printed Circuit Board Ground Lines Should be Set up with Consideration for Common Impedance
4. Take Appropriate Measures Against Static Electricity
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1MΩ in series between body and ground.
5. Do not Apply Negative Voltages
The use of negative voltages below 0.3 V may cause the parasitic transistor to be activated on LSI lines, which can cause
malfunctions.
16. Ordering Information
17. RoHS Compliance Information
The LSI products of Cypress with “E1” are compliant with RoHS Directive, and has observed the standard of lead, cadmium,
mercury, hexavalent chromium, polybrominated biphenyls (PBB), and polybrominated diphenyl ethers (PBDE). A products whose
part number has trailing characters “E1” is RoHS compliant.
Part Number Package Remarks
MB39A134PFT 24-pin plastic TSSOP
(STF024) –
MB39A134
Document Number: 002-08413 Rev. *C Page 42 of 44
18. Package Dimension
$//',0(16,216$5(,10,//,0(7(5
',0(16,21,1*$1'72/(5$1&,1*3(5$60(<0
',0(16,21,1*',1&/8'(02/')/$6+',0(16,21,1*('2(6127,1&/8'(
,17(5/($')/$6+253527586,21,17(5/($')/$6+253527586,216
6+$//127(;&(('PP3(56,'('DQG(',0(16,21$5('(7(50,1('
$7'$780+
7+(3$&.$*(7230$<%(60$//(57+$17+(3$&.$*(%27720
',0(16,21,1*'DQG($5('(7(50,1('$77+(287(50267
(;75(0(62)7+(3/$67,&%2'<(;&/86,9(2)02/')/$6+
7+(%$5%8556*$7(%8556$1',17(5/($')/$6+%87,1&/8',1*
$1<0,60$7&+%(7:((17+(723$1'%277202)7+(3/$67,&%2'<
'$7806$%72%('(7(50,1('$7'$780+
1,67+(0$;,080180%(52)7(50,1$/326,7,216)257+(63(&,),('
3$&.$*(/(1*7+
7+(',0(16,21$33/<727+()/$76(&7,212)7+(/($'%(7:((1PP
72PP)5207+(/($'7,3
',0(16,21E'2(6127,1&/8'(7+('$0%$53527586,21$//2:$%/(
'$0%$53527586,216+$//%(PP727$/,1(;&(662)7+(E',0(16,21
$70$;,0800$7(5,$/&21',7,21
7+('$0%$50$<127%(/2&$7('217+(/2:(55$',862)7+()227
7+,6&+$0)(5)($785(,6237,21$//),7,612735(6(177+(1$3,1
,'(17,),(50867%(/2&$7(':,7+,17+(,1'(;$5($,1',&$7('
$,6'(),1('$67+(9(57,&$/',67$1&()5207+(6($7,1*3/$1(72
7+(/2:(6732,17217+(3$&.$*(%2'<(;&/8',1*7+(/,'$1'25
7+(50$/(1+$1&(0(1721&$9,7<'2:13$&.$*(&21),*85$7,216
127(6
11. JEDEC SPECIFICATION NO. REF : N/A
L1
L
c
NOM.MIN.
E
0°
D
A
1A
MAX.
8°
ș
E1
b
e
L20.25 BSC
0.50 BSC
1.00 REF
4.40 BSC
6.40 BSC
6.50 BSC
0.05 0.15
1.10
0.12 0.22
0.17 0.22 0.27
0.45 0.60 0.75
SYMBOL
DIMENSIONS
D
4
5
E1 E
0.20 CA-B D
A
A1
10
DETAIL A
e0.08 C
SEATING
PLANE
b0.10 CA-B D8
SIDE VIEW
TOP VIEW
b
SECTION A-A'
c
L1
L
GAUGE
PLANE
DETAIL A
L2
șA
A'
0.10 H D
;
0.10 H D
㻭㻰
㻯
4
5
INDEX AREA
;
㻮
BOTTOM VIEW
Package Code: STF024
002-15917 Rev. **
MB39A134
Document Number: 002-08413 Rev. *C Page 43 of 44
19. Document History
Document Title: MB39A134 DC/DC converter IC for Charging Li-ion battery
Document Number: 002-08413
Revision ECN Orig. of
Change
Submission
Date Description of Change
** - TAOA 05/22/2008 Migrated to Cypress and assigned document number 002-08413.
No change to document contents or format.
*A 5148176 TAOA 03/08/2016 Updated to Cypress template
*B 5626720 HIXT 02/13/2017
Updated Pin Assignment:
Change the package name from FPT-24P-M08 to STF024
Updated Ordering Information:
Change the package name from FPT-24P-M08 to STF024
Deleted the words, “Lead Free version”, in the Remarks.
Deleted “Ev Board Ordering Information”
Deleted “Marking Format (Lead Free Version)”
Deleted “Labeling Sample (Lead Free Version)”
Deleted “MB39A134PFT Recommended Conditions Of Moisture Sensitivity Level”
Updated Package Dimension: Updated to Cypress format
*C 5703758 AESATMP8 04/20/2017 Updated logo and Copyright.
Document Number: 002-08413 Rev. *C Revised April 20, 2017 Page 44 of 44
MB39A134
© Cypress Semiconductor Corporation, 2008-2017. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC (“Cypress”). This document,
including any software or firmware included or referenced in this document (“Software”), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries
worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other
intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress
hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to
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(either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patents that are infringed by the Software (as
provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation
of the Software is prohibited.
TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE
OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. To the extent
permitted by applicable law, Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any
product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is
the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products
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