GS74108ATP/J/X SOJ, TSOP, FP-BGA Commercial Temp Industrial Temp 8, 10, 12 ns 3.3 V VDD Center VDD and VSS 512K x 8 4Mb Asynchronous SRAM Features SOJ 512K x 8-Pin Configuration * Fast access time: 8, 10, 12 ns * CMOS low power operation: 120/95/85 mA at minimum cycle time * Single 3.3 V power supply * All inputs and outputs are TTL-compatible * Fully static operation * Industrial Temperature Option: -40 to 85C * Package line up J: 400 mil, 36-pin SOJ package TP: 400 mil, 44-pin TSOP Type II package GP: Pb-Free 400 mil, 44-pin TSOP Type II package X: 6 mm x 10 mm Fine Pitch Ball Grid Array package GX: Pb-Free 6 mm x 10 mm Fine Pitch Ball Grid Array package * Pb-Free TSOP-II and FP-BGA packages available Description The GS74108A is a high speed CMOS Static RAM organized as 524,288 words by 8 bits. Static design eliminates the need for external clocks or timing strobes. The GS74108A operates on a single 3.3 V power supply and all inputs and outputs are TTL-compatible. The GS74108A is available in 400 mil SOJ, 400 mil TSOP Type-II, and 6 mm x 10 mm FP-BGA packages. Pin Descriptions A4 1 36 NC A3 2 35 A5 A2 3 34 A6 A1 4 33 A7 A0 5 32 A8 CE 6 31 OE DQ1 7 30 DQ8 DQ2 8 29 DQ7 VDD 9 28 VSS VSS 10 27 VDD DQ3 11 26 DQ6 DQ4 12 25 DQ5 WE 13 24 A9 A17 14 23 A10 A16 15 22 A11 A15 16 21 A12 A14 17 20 A18 A13 18 19 NC 36-pin 400 mil SOJ FP-BGA 512K x 8 Bump Configuration (Package X) 1 2 3 4 5 6 A NC OE A2 A6 A7 NC Symbol Description B DQ1 NC A1 A5 CE DQ8 A0-A18 Address input C DQ2 NC A0 A4 NC DQ7 DQ1-DQ8 Data input/output CE Chip enable input D VSS NC A18 A3 NC VDD WE Write enable input E VDD NC A17 A9 NC VSS OE Output enable input F DQ3 NC A13 A10 NC DQ6 VDD +3.3 V power supply G DQ4 NC A14 A11 WE DQ5 VSS Ground H NC A16 A15 A12 A8 NC NC No connect 6 x 10 mm Rev: 1.06 12/2004 1/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X TSOP-II 512K x 8-Pin Configuration A13 19 20 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC 21 22 24 23 NC NC A4 A3 A2 A1 A0 CE DQ1 DQ2 VDD VSS DQ3 DQ4 WE A17 A16 A15 A14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 44-pin 400 mil TSOP II NC NC NC A5 A6 A7 A8 OE DQ8 DQ7 VSS VDD DQ6 DQ5 A9 A10 A11 A12 A18 NC NC NC Block Diagram A0 Address Input Buffer Row Decoder Column Decoder A18 CE WE OE Memory Array I/O Buffer Control DQ1 Rev: 1.06 12/2004 DQ8 2/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X Truth Table CE OE WE DQ1 to DQ8 VDD Current H X X Not Selected ISB1, ISB2 L L H Read L X L Write L H H High Z IDD Note: X: "H" or "L" Absolute Maximum Ratings Parameter Symbol Rating Unit Supply Voltage VDD -0.5 to +4.6 V Input Voltage VIN -0.5 to VDD +0.5 ( 4.6 V max.) V Output Voltage VOUT -0.5 to VDD +0.5 ( 4.6 V max.) V Allowable power dissipation PD 0.7 W Storage temperature TSTG -55 to 150 o C Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. Recommended Operating Conditions Parameter Symbol Min Typ Max Unit Supply Voltage for -8/-10/-12 VDD 3.0 3.3 3.6 V Input High Voltage VIH 2.0 -- VDD +0.3 V Input Low Voltage VIL -0.3 -- 0.8 V Ambient Temperature, Commercial Range TAc 0 -- 70 o Ambient Temperature, Industrial Range TAI -40 -- 85 o C C Notes: 1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns. 2. Input undershoot voltage should be greater than -2 V and not exceed 20 ns. Rev: 1.06 12/2004 3/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X Capacitance Parameter Symbol Test Condition Max Unit Input Capacitance CIN VIN = 0 V 5 pF Output Capacitance COUT VOUT = 0 V 7 pF Notes: 1. Tested at TA = 25C, f = 1 MHz 2. These parameters are sampled and are not 100% tested. DC I/O Pin Characteristics Parameter Symbol Test Conditions Min Max Input Leakage Current IIL VIN = 0 to VDD - 1 uA 1 uA Output Leakage Current ILO Output High Z VOUT = 0 to VDD -1 uA 1 uA Output High Voltage VOH IOH = -4 mA 2.4 -- Output Low Voltage VOL ILO = +4 mA -- 0.4 V Power Supply Currents Parameter Symbol Test Conditions 0 to 70C -40 to 85C 8 ns 10 ns 12 ns 8 ns 10 ns 12 ns IDD CE VIL All other inputs VIH or VIL Min. cycle time IOUT = 0 mA 120 mA 95 mA 85 mA 130 mA 105 mA 95 mA Standby Current ISB1 CE VIH All other inputs VIH or VIL Min. cycle time 30 mA 25 mA 22 mA 40 mA 35 mA 32 mA Standby Current ISB2 CE VDD - 0.2V All other inputs VDD - 0.2V or 0.2V Operating Supply Current Rev: 1.06 12/2004 10 mA 4/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. 20 mA (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X AC Test Conditions Output Load 1 Parameter Conditions Input high level VIH = 2.4 V Input low level VIL = 0.4 V 50 Input rise time tr = 1 V/ns VT = 1.4 V Input fall time tf = 1 V/ns Input reference level 1.4 V Output Load 2 Output reference level 1.4 V 3.3 V Output load Fig. 1& 2 DQ 589 DQ Notes: 1. Include scope and jig capacitance. 2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted. 3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ 30pF1 5pF1 434 AC Characteristics Read Cycle Parameter Symbol Read cycle time -8 -10 -12 Unit Min Max Min Max Min Max tRC 8 -- 10 -- 12 -- ns Address access time tAA -- 8 -- 10 -- 12 ns Chip enable access time (CE) tAC -- 8 -- 10 -- 12 ns Output enable to output valid (OE) tOE -- 3.5 -- 4 -- 5 ns Output hold from address change tOH 3 -- 3 -- 3 -- ns Chip enable to output in low Z (CE) tLZ* 3 -- 3 -- 3 -- ns Output enable to output in low Z (OE) tOLZ* 0 -- 0 -- 0 -- ns Chip disable to output in High Z (CE) tHZ* -- 4 -- 5 -- 6 ns Output disable to output in High Z (OE) tOHZ* -- 3.5 -- 4 -- 5 ns * These parameters are sampled and are not 100% tested. Rev: 1.06 12/2004 5/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X Read Cycle 1: CE = OE = VIL, WE = VIH tRC Address tAA tOH Data Out Previous Data Data valid Read Cycle 2: WE = VIH tRC Address tAA CE tAC tHZ tLZ OE tOE Data Out Rev: 1.06 12/2004 tOLZ High impedance tOHZ DATA VALID 6/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X Write Cycle Parameter Symbol Write cycle time -8 -10 -12 Unit Min Max Min Max Min Max tWC 8 -- 10 -- 12 -- ns Address valid to end of write tAW 5.5 -- 7 -- 8 -- ns Chip enable to end of write tCW 5.5 -- 7 -- 8 -- ns Data set up time tDW 4 -- 5 -- 6 -- ns Data hold time tDH 0 -- 0 -- 0 -- ns Write pulse width tWP 5.5 -- 7 -- 8 -- ns Address set up time tAS 0 -- 0 -- 0 -- ns Write recovery time (WE) tWR 0 -- 0 -- 0 -- ns Write recovery time (CE) tWR1 0 -- 0 -- 0 -- ns Output Low Z from end of write tWLZ* 3 -- 3 -- 3 -- ns Write to output in High Z tWHZ* -- 3.5 -- 4 -- 5 ns * These parameters are sampled and are not 100% tested. Write Cycle 1: WE control tWC Address tAW tWR OE tCW CE tAS tWP WE tDW Data In DATA VALID tWHZ Data Out Rev: 1.06 12/2004 tDH tWLZ HIGH IMPEDANCE 7/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X Write Cycle 2: CE control tWC Address tAW tWR1 OE tAS tCW CE tWP WE tDW Data In tDH DATA VALID Data Out HIGH IMPEDANCE 36-Pin SOJ, 400 mil Dimension in inch L D e A A1 A A2 1 GE E HE c y B B1 Detail A Q Dimension in mm Symbol min nom max min nom max A -- -- 0.146 -- -- 3.70 A1 0.026 -- -- 0.66 -- -- A2 0.105 0.110 0.115 2.67 2.80 2.92 B 0.013 0.017 0.021 0.33 0.43 0.53 B1 0.024 0.028 0.032 0.61 0.71 0.81 c 0.006 0.008 0.012 0.15 0.20 0.30 D 0.920 0.924 0.929 23.37 23.47 23.60 E 0.395 0.400 0.405 10.04 10.16 10.28 e -- 0.05 -- -- 1.27 -- HE 0.430 0.435 0.440 10.93 11.05 11.17 GE 0.354 0.366 0.378 9.00 9.30 9.60 L 0.082 -- -- 2.08 -- -- y -- -- 0.004 -- -- 0.10 Q 0o -- 10o 0o -- 10o Notes: 1. Dimension D& E do not include interlead flash. 2. Dimension B1 does not include dambar protrusion/intrusion. Rev: 1.06 12/2004 8/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X 44-Pin, 400 mil TSOP-II D HE A 22 e B y L L1 A1 A A2 1 Dimension in inch Dimension in mm Symbol min nom max min nom max c 23 E 44 Detail A Q A -- -- 0.047 -- -- 1.20 A1 0.002 -- -- 0.05 -- -- A2 0.037 0.039 0.041 0.95 1.00 1.05 B 0.01 0.014 0.018 0.25 0.35 0.45 c -- 0.006 -- -- 0.15 -- D 0.721 0.725 0.729 18.31 18.41 18.51 E 0.396 0.400 0.404 10.06 10.16 10.26 e -- 0.031 -- -- 0.80 -- HE 0.455 0.463 0.471 11.56 11.76 11.96 L 0.016 0.020 0.024 0.40 0.50 0.60 L1 -- 0.031 -- -- 0.80 -- y -- -- 0.004 -- -- 0.10 Q o -- o o -- 5o 0 5 0 Notes: 1. Dimension D& E do not include interlead flash. 2. Dimension B does not include dambar protrusion/intrusion. 3. Controlling dimension: mm Rev: 1.06 12/2004 9/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X 6 mm x 10 mm FP-BGA Symbol D E Pin A1 Index Top View A Unit: mm A 1.100.10 A1 0.20~0.30 fb f0.30~0.40 c 0.36(TYP) D 10.00.05 D1 5.25 E 6.00.05 E1 3.75 e 0.75(TYP) aaa 0.10 c A1 Pin A1 Index Side View aaa A B C D E F G H 1 2 3 4 5 6 fb Solder Ball e E1 e D1 Bottom View Rev: 1.06 12/2004 10/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X Ordering Information Part Number* Package Access Time Temp. Range GS74108ATP-8 400 mil TSOP-II 8 ns Commercial GS74108ATP-10 400 mil TSOP-II 10 ns Commercial GS74108ATP-12 400 mil TSOP-II 12 ns Commercial GS74108ATP-8I 400 mil TSOP-II 8 ns Industrial GS74108ATP-10I 400 mil TSOP-II 10 ns Industrial GS74108ATP-12I 400 mil TSOP-II 12 ns Industrial GS74108AGP-8 Pb-free 400 mil TSOP-II 8 ns Commercial GS74108AGP-10 Pb-free 400 mil TSOP-II 10 ns Commercial GS74108AGP-12 Pb-free 400 mil TSOP-II 12 ns Commercial GS74108AGP-8I Pb-free 400 mil TSOP-II 8 ns Industrial GS74108AGP-10I Pb-free 400 mil TSOP-II 10 ns Industrial GS74108AGP-12I Pb-free 400 mil TSOP-II 12 ns Industrial GS74108AJ-8 400 mil SOJ 8 ns Commercial GS74108AJ-10 400 mil SOJ 10 ns Commercial GS74108AJ-12 400 mil SOJ 12 ns Commercial GS74108AJ-8I 400 mil SOJ 8 ns Industrial GS74108AJ-10I 400 mil SOJ 10 ns Industrial GS74108AJ-12I 400 mil SOJ 12 ns Industrial GS74108AX-8 6 mm x 10 mm FP-BGA 8 ns Commercial GS74108AX-10 6 mm x 10 mm FP-BGA 10 ns Commercial GS74108AX-12 6 mm x 10 mm FP-BGA 12 ns Commercial GS74108AX-8I 6 mm x 10 mm FP-BGA 8 ns Industrial GS74108AX-10I 6 mm x 10 mm FP-BGA 10 ns Industrial GS74108AX-12I 6 mm x 10 mm FP-BGA 12 ns Industrial GS74108AGX-8 Pb-free 6 mm x 10 mm FP-BGA 8 ns Commercial GS74108AGX-10 Pb-free 6 mm x 10 mm FP-BGA 10 ns Commercial GS74108AGX-12 Pb-free 6 mm x 10 mm FP-BGA 12 ns Commercial GS74108AGX-8I Pb-free 6 mm x 10 mm FP-BGA 8 ns Industrial Rev: 1.06 12/2004 11/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Status (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X Ordering Information * Part Number* Package Access Time Temp. Range GS74108AGX-10I Pb-free 6 mm x 10 mm FP-BGA 10 ns Industrial GS74108AGX-12I Pb-free 6 mm x 10 mm FP-BGA 12 ns Industrial Status Customers requiring delivery in Tape and Reel should add the character "T" to the end of the part number. For example: GS74108ATP-8T Rev: 1.06 12/2004 12/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc. GS74108ATP/J/X 4M Asynchronous Datasheet Revision History Rev. Code: Old; New Types of Changes Format or Content Page #/Revisions/Reason Format/Content * Creation of new datasheet 74108A_r1; 74108A_r1_01 Content * Added 6 ns speed bin * Updated all power numbers 74108A_r1_01; 74108A_r1_02 Content * Updated Recommended Operating Conditions table on page 4 * Added 7 ns bin to entire document * Added X package 74108A_r1_02; 74108A_r1_03 Content * Removed 6 ns speed bin from entire document * Corrected "X" package pinout 74108A_r1_03; 74108A_r1_04 Content * Removed 7 ns speed bin from entire document 74108A_r1_04; 74108A_r1_05 Content * Updated format * Added Pb-free information for TSOP-II package 74108A_r1_05; 74108A_r1_06 Content * Added Pb-free information for FP-BGA package 74108A_r1 Rev: 1.06 12/2004 13/13 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. (c) 2001, Giga Semiconductor, Inc.