Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
1
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS840002-01 is a 2 output LVCMOS/LVTTL
Synthesizer optimized to generate Ethernet
reference clock frequencies and is a member of
the HiPerClocksTM family of high performance
clock solutions from ICS. Using a 25MHz 18pF
parallel resonant crystal, the following frequencies can be
generated based on the 2 frequency select pins (F_SEL1:0):
156.25MHz, 125MHz, and 62.5MHz. The ICS840002-01 uses
ICS’ 3rd generation low phase noise VCO technology and can
achieve 1ps or lower typical random rms phase jitter, easily
meeting Ethernet jitter requirements. The ICS840002-01 is
packaged in a small 16-pin TSSOP package.
HiPerClockS™
ICS
BLOCK DIAGRAM PIN ASSIGNMENT
F_SEL0
nXTAL_SEL
TEST_CLK
OE
MR
nPLL_SEL
VDDA
VDD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
F_SEL1
GND
GND
Q0
Q1
VDDO
XTAL_IN
XTAL_OUT
ICS840002-01
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm
package body
G Package
Top View
FEATURES
• Two LVCMOS/LVTTL outputs @ 3.3V,
17Ω typical output impedance
• Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
• Output frequency range: 56MHz - 175MHz
• VCO range: 560MHz - 700MHz
• Output skew: 12ps (maximum)
• RMS phase jitter at 156.25MHZ (1.875MHz - 20MHz):
0.47ps (typical)
Phase noise:
Offset Noise Power
100Hz ............... -97.4 dBc/Hz
1kHz .............. -120.2 dBc/Hz
10kHz .............. -127.6 dBc/Hz
100kHz .............. -126.1 dBc/Hz
• Full 3.3V or 3.3V core/2.5V output supply mode
• -30°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
packages
Q0
Q1
OE
F_SEL1:0
nPLL_SEL
nXTAL_SEL
XTAL_IN
XTAL_OUT
TEST_CLK
MR
OSC
Phase
Detector VCO
M = ÷25 (fixed)
F_SEL1:0
0 0 ÷4
0 1 ÷5
1 0 ÷10
1 1 ÷5
0
1
1
0
2
N
25MHz
Pullup
Pulldown
Pulldown
Pulldown
Pullup:Pullup
Pulldown
FREQUENCY SELECT FUNCTION TABLE
stupnI ycneuqerFtuptuO
).feRzHM52(
1LES_F0LES_FeulaVrediviDMeulaVrediviDN
00 524 52.651
01 525 521
10 52015.26
11 525 521
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
2
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
rebmuNemaNepyTnoitpircseD
10LES_FtupnIpulluP.slevelecafretniLTTVL/SOMCVL.niptcelesycneuqerF
2LES_LATXntupnInwodll
uP
ecnereferLLPehtsastupniKLC_TSETrolatsyrcehtneewtebstceleS
LATXstceles,WOLnehW.KLC_TSETstceles,HGIHnehW.ecruos
.slevelecafretniLTTVL/SOMCVL.stupni
3KLC_TSETtupnInwodlluP.tupnikcolcLTTVL/SOMCVLdedne-elgniS
4EOtup
nIpulluP eht,WOLnehW.evitcaerastuptuoeht,HGIHnehW.nipelbanetuptuO
.slevelecafretniLTTVL/SOMCVL.etatsecna
depmihgihanierastuptuo
5RMtupnInwodlluP
erasredividlanretnieht,HGIHcigolnehW.teseRretsaMHGIHevitcA
lanretni
eht,WOLcigolnehW.wologotstuptuoevitcagnisuacteser
.slevelecafretniLTTVL/SOMCVL.delbaneerastuptuoehtdna
sredivid
6LES_LLPntupnInwodlluP
.tuptuoOCVehtmorfnevirdsituptuoeht,WOLnehW.ssapyBLLP
=ycneuqerftuptuoehtdna
dessapybsiLLPeht,HGIHnehW
.redividtuptuoN/ycneuqerfkcolcecnerefer
.slevelecafretniLTTVL/SOMCVL
7V
ADD
rewoP.nipylppusgolanA
8V
DD
rewoP.nipylppuseroC
,9
01
,TUO_LATX
NI_LATX tupnI .tuptuoehtsiTUO_LATX.ecafretnirotallicsolatsyrC
.tupniehtsi
NI_LATX
11V
ODD
rewoP.nipylppustuptuO
31,210Q,1QtuptuO .slevelecafretniLTTVL/SOMCVL.stuptuokcolcdedne-elgniS
51,41DNGrewoP.dnu
orgylppusrewoP
611LES_FtupnIpulluP.slevelecafretniLTTVL/SOMCVL.niptcelesycneuqerF
:ETON pulluP dna nwodlluP .se
ulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotrefer
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
ecnaticapaCtupnI 4Fp
C
DP
ecnaticapaCnoitapissiDrewoP 8Fp
R
PULLUP
rotsiseRpulluPtupnI 15kΩ
R
NWODLLUP
rotsiseRnwodlluPtupnI 15kΩ
R
TUO
ecnadepmItuptuO %5±V3.3417112Ω
%5±V5.2611252Ω
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
3
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 3.3V±5% OR 2.5V±5%, TA = -30°C TO 85°C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD 4.6V
Inputs, VI-0.5V to VDD + 0.5 V
Outputs, VO-0.5V to VDDO + 0.5V
Package Thermal Impedance, θJA 89°C/W (0 lfpm)
Storage Temperature, T
STG -65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
egatloVhgiHtupnI 2V
DD
3.0+V
V
LI
egatloVwoLtupnI 3.0-8.0V
I
HI
tupnI
tnerruChgiH
1LES_F,0LES_F,EO V
DD
V=
NI
V564.3=
V526.2ro 5Aµ
,RM,LES_LLPn
KLC_TSET,LES_LATXn
V
DD
V=
NI
V564.3=
V526.2ro 051Aµ
I
LI
tupnI
tnerruCwoL
1LES_F,0LES_F,EO V
DD
,V526.2roV564.3=
V
NI
V0= 051-Aµ
,RM,LES_LLPn
KLC_TSET,LES_LATXn
V
DD
,V526.2roV564.3=
V
NI
V0= 5-Aµ
V
HO
1ETON;egatloVhgiHtuptuO V
ODD
%5±V564.3=6.2V
V
ODD
%5±V5.2=8.1V
V
LO
1ETON;egatloVwoLtuptuOV
ODD
%5±V5.2roV3.3=5.0V
05htiwdetanimretstuptuO:1ETON ΩVot
ODD
.stiucriCtseTdaoLtuptuO,noitamrofnItnemerusaeMretemaraPeeS.2/
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 3.3V±5% OR 2.5V±5%, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 531.33.3564.3V
V
ADD
egatloVylppuSgolanA 531.33.3564.3V
V
ODD
egatloVylppuStuptuO 531.33.3564.3V
573.25.2526.2V
I
DD
tnerruCylppuSrewoP 001Am
I
ADD
tnerruCylppuSgolanA 21Am
I
ODD
tnerruCylppuStuptuO 5Am
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
4
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = -30°C TO 85°C
TABLE 4. CRYSTAL CHARACTERISTICS
TABLE 5B. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 2.5V±5%, TA = -30°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
TUO
ycneuqerFtuptuO
00=]0:1[LES_F041571zHM
10=]0:1[LES_F211041zHM
11ro01=]0:1[LES_F6507zHM
t)o(ks3,1ETON;wekStuptuO 21sp
t)Ø(tij ;)modnaR(rettiJesahPSMR
2ETON
)zHM02-zHM578.1(zHM52.65174.0sp
)zHM02-zHM578.1(zHM52175.0sp
)zHM02-zHM57
8.1(zHM5.2615.0sp
t
R
t/
F
emiTllaF/esiRtuptuO%08ot%02002007sp
cdoelcyCytuDtuptuO 6445%
.snoitidnocdaollauqehtiwdnasegatlovylppusemasehtta
stuptuoneewtebwekssadenifeD:1ETON
VtaderusaeM
ODD
.2/
.tolPesioNesahPehtotreferesaelP:2ETON
.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:3ETON
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
TUO
ycneuqerFtuptuO
00=]0:1[LES_F041571zHM
10=]0:1[LES_F211041zHM
11ro01=]0:1[LES_F6586zHM
t)o(ks3,1ETON;wekStuptuO 21sp
t)Ø(tij ;)modnaR(rettiJesahPSMR
2ETON
)zHM02-zHM578.1(zHM52.65174.0sp
)zHM02-zHM578.1(zHM52155.0sp
)zHM02-zHM57
8.1(zHM5.2694.0sp
t
R
t/
F
emiTllaF/esiRtuptuO%08ot%02002007sp
cdoelcyCytuDtuptuO 6445%
.snoitidnocdaollauqehtiwdnasegatlovylppusemasehtta
stuptuoneewtebwekssadenifeD:1ETON
VtaderusaeM
ODD
.2/
.tolPesioNesahPehtotreferesaelP:2ETON
.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:3ETON
retemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
noitallicsOfoedoM latnemadnuF
ycneuqerF 52zHM
)RSE(ecnatsiseRs
eireStnelaviuqE 05 Ω
ecnaticapaCtnuhS 7Fp
leveLevirD 1Wm
.latsyrctnanoserlellarapFp81nagnisudeziretcarahC:ETON
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
5
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TYPICAL PHASE NOISE AT 62.5MHZ @3.3V
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
62.5MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.51ps (typical)
OFFSET FREQUENCY (HZ)
NOISE POWER dBc
Hz
Phase Noise Result by adding
1Gb Ethernet Filter to raw data
Raw Phase Noise Data
1Gb Ethernet Filter
➤
➤
➤
100 1k 10k 100k 1M 10M 100M
TYPICAL PHASE NOISE AT 156.25MHZ @3.3V
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
156.25MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.47ps (typical)
OFFSET FREQUENCY (HZ)
NOISE POWER dBc
Hz
Phase Noise Result by adding
10Gb Ethernet Filter to raw data
Raw Phase Noise Data
10Gb Ethernet Filter
➤
➤
➤
100 1k 10k 100k 1M 10M 100M
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
6
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
PARAMETER MEASUREMENT INFORMATION
tPERIOD
tPW
tPERIOD
odc =
V
DDO
2
x 100%
tPW
Q0, Q1
RMS PHASE JITTER
3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
LVCMOS
1.65V±5%
-1.65V±5%
OUTPUT SKEW
Clock
Outputs
20%
80% 80%
20%
t
R
t
F
VDD,
VDDA, VDDO
GND
Phase Noise Mas
k
Offset Frequency
f
1
f
2
Phase Noise Plot
RMS Jitter = Area Under the Masked Phase Noise Plot
Noise Power
tsk(o)
V
DDO
2
V
DDO
2
Qx
Qy
OUTPUT RISE/FALL TIME
SCOPE
Qx
LVCMOS
2.05V±5%
-1.25V±5%
VDD,
VDDA
GND
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
1.25V±5%
VDDO
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
7
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS840002-01 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VDD, VDDA, and VDDO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01μF bypass
capacitor should be connected to each VDDA. The 10Ω re-
sistor can also be replaced by a ferrite bead.
POWER SUPPLY FILTERING T ECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10Ω
VDDA
10μF
.01μF
3.3V
.01μF
VDD
CRYSTAL INPUT INTERFACE
The ICS840002-01 has been characterized with 18pF paral-
lel resonant crystals. The capacitor values shown in Figure 2
Figure 2. CRYSTAL INPUt INTERFACE
below were determined using a 25MHz 18pF parallel reso-
nant crystal and were chosen to minimize the ppm error.
ICS84332
XTA L_I N
XTA L_ OU T
X1
18pF Parallel Cry stal
C2
22p
C1
22p
ICS840002-01
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
8
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
LAYOUT GUIDELINE
Figure 3 shows a schematic example of the ICS840002-01. An
example of LVCMOS termination is shown in this schematic.
Additional LVCMOS termination approaches are shown in the
LVCMOS Termination Application Note. In this example, an 18
pF parallel resonant 25MHz crystal is used. The C1=22pF and
FIGURE 3. ICS840002-01 SCHEMATIC EXAMPLE
C2=22pF are recommended for frequency accuracy. For differ-
ent board layout, the C1 and C2 may be slightly adjusted for
optimizing frequency accuracy. 1KΩ pullup or pulldown resis-
tors can be used for the logic control input pins.
VDD
RD2
1K
X1
If not using the crystal input, it can be left floating.
For additional protection the XTAL_IN pin can be
tied to ground.
C5
0.1u
XT A L2
XT A L1
VDD A
RU2
Not Install
C4
0.01u
To Logic
Input
pins
VDD
Set Logic
Input to
'1'
Zo = 50 Ohm
R3
100
Logic Control Input Examples
To Logic
Input
pins
Optional Termination
C6
0.1u
C2
22pF
Zo = 50 Ohm
R2
33
RU1
1K
RD1
Not Install
VDD
Unused output can be left floating. There should
no trace attached to unused output. Device
characterized with all outputs terminated.
VDD
VDD
U1
ICS840002-01
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
FSEL0
XTAL_SEL
TEST_CLK
OE
MR
nPLL_SEL
VDDA
VDD XTAL_OUT
XTA L_ I N
VDDO
Q1
Q0
GND
GND
FSEL1
C3
10uF
R4
100
Set Logic
Input to
'0'
R1
10
LVCMOS
LVCMOS
C1
22pF
INPUTS:
CRYSTAL INPUT:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1kΩ
resistor can be tied from XTAL_IN to ground.
TEST_CLK INPUT:
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1kΩ resistor can be tied from the TEST_CLK to
ground.
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVCMOS OUTPUT:
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
9
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS840002-01 is: 3085
TABLE 6. θJAVS. AIR FLOW TABLE FOR 16 LEAD TSSOP
θθ
θθ
θJA by Velocity (Linear Feet per Minute)
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 137.1°C/W 118.2°C/W 106.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 89.0°C/W 81.8°C/W 78.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
10
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
PACKAGE OUTLINE - G SUFFIX FOR 16 LEAD TSSOP
TABLE 7. PACKAGE DIMENSIONS
Reference Document: JEDEC Publication 95, MO-153
LOBMYS sretemilliM
muminiMmumixaM
N61
A--02.1
1A50.051.0
2A08.050.1
b91.003.0
c90.002.0
D09.401.5
ECISAB04.6
1E03.405.4
eCISAB56.0
L5
4.057.0
α°0°8
aaa--01.0
Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
11
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 8. ORDERING INFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
The aforementioned trademarks, HiPerClockS and FEMTOCLOCKS are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
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Integrated
Circuit
Systems, Inc.
840002AG-01 www.icst.com/products/hiperclocks.html REV. B JANUARY 13, 2006
12
ICS840002-01
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TEEHSYROTSIHNOISIVER
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60/31/1
