RELEASE NOTE
R01AN3104EJ0207 Rev.2.07 Page 1 of 17
Dec 19, 2017
RZ/A1H Group
CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
Introduction
This document describes the RZ/A1H CMSIS-RTOS RTX BSP (which is a package hereinafter called the BSP).
Contents
1. History of Changes to the Previous Versions .............................................................. 2
2. Package Contents .......................................................................................................... 6
2.1 Software ....................................................................................................................................... 6
2.2 Documents ................................................................................................................................... 6
2.2.1 Manuals .................................................................................................................................. 6
2.2.2 Sample program build procedures ..................................................................................... 7
3. Folder structure .............................................................................................................. 8
4. Information about the BSP ............................................................................................ 9
4.1 Software ....................................................................................................................................... 9
4.2 Tools ............................................................................................................................................. 9
4.3 Hardware ...................................................................................................................................... 9
4.4 Operation procedure of Blinky sample program (On-chip RAM Download) ...................... 11
4.4.1 Build Process ...................................................................................................................... 11
4.4.2 Sample program Execution ............................................................................................... 11
4.4.3 Sample program Execu tion Result ................................................................................... 12
4.5 Operation procedure of Blinky sample program (Seria l Flash Boot) .................................. 13
4.5.1 Build Process ...................................................................................................................... 13
4.5.2 Writing in to the Serial Flash ............................................................................................. 13
4.5.3 Sample program Execu tion ............................................................................................... 13
4.5.4 Sample program Execu tion Result ................................................................................... 13
4.6 Operation procedure of Blinky sample program (NOR Flash Boot) .................................... 14
4.6.1 Build Process ...................................................................................................................... 14
4.6.2 Writing in to the NOR Flash ............................................................................................... 14
4.6.3 Sample program Execu tion ............................................................................................... 14
4.6.4 Sample program Execu tion Result ................................................................................... 14
5. Restrictions .................................................................................................................. 15
6. Precautions ................................................................................................................... 16
R01AN3104EJ0207
Rev.2.07
Dec 19, 2017
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 2 of 17
Dec 19, 2017
1. History of Changes to the Previous Versions
Ver
No.
Type
Description
Remarks
V2.07
1
ALL
The defect a build error generates was
corrected in the environment that
e2studio was installed by the minimum
configuration.
Corrected file: .cproject of
all projects.
2
Sample program
The defect to which the osKernelSysTick
function returns wrong time is corrected.
Corrected file:
RTX_Conf_CM.c of each
sample program folder.
3
RIIC
Fixed a bug that the RIIC driver
communicates extra 1 byte more than
the specify size when the RIIC driver's
operation delayed due to high load.
Corrected file: riic.c,
riic_int.c, riic_task.c
V2.06
1
ALL
The name of the top folder is changed to
CMSIS_RTOS_RTX.
2
RIIC, RSPI
RIIC and RSPI drivers are corrected for
prohibited for doing osThreadTerminate
to the thread which is already ended.
3
Sample program
Build procedure text files moved to
README subfolder.
4
Bus setting of SDRAM is corrected.
Corrected file:
RZ_A1H_RSK_Init.c of
each sample program
folder.
5
L2 cache setting is reconsidered and the
prefetch is changed to Enable.
Corrected file: pl310.c of
each sample program
folder.
6
The instruction set and the label type are
added to the assembler function
declaration.
Corrected file: initsect.S
and lv1cache.S of each
sample program folder.
V2.05
1
ALL
The version of the tool of the software
environment has been renewed.
2
The reference destination of stdint.h and
stdbool.h was changed to
ENV/KPIT/optlibinc folder in the BSP
source.
Therefore, copy work of header files has
been eliminated from the proc edure of
installation.
3
SSIF
When all except for 16bit, 32bit has been
used for the data word size, a defect with
a possibility that channels in left and right
is reversed has been corrected.
4
Sample program
Moved a project folder of all sample
programs below the App folder.
5
The SPIBSC boot loader image to which
each sample program refers has been
changed to common folder
Tool/FlashImage.
6
The name of ex1 sample program has
been chan ged to SSIF.
7
The name of Display sample program
has been changed to vdc5_vdec.
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 3 of 17
Dec 19, 2017
8
TouchPanel sample program has been
added.
9
Blinky sample program has been added.
10
The processing which executes
LDREX/STREX order to internal RAM in
the state of the MMU invalidity at the
time of an OS start has been corrected.
When an exclusion access order is
executed in the state of the MMU
invalidity, atomic access o ccurs directly
to the AXI bus, but LSI Internal bus of
RZ/A1H is non-correspondence in
atomic access.
Corrected file:
system_Renesas_RZ_A1.c
and
startup_Renesas_RZ_A1.S
of a sample program
folder.
The reference document:
RZ/A1H user's manual
hardware Rev.2. 00 "5.8
AXI Protocol Control
Signals"
11
The defect to which the osKernelSysTick
function returns unjust time has been
corrected.
The frequency different from actual OS
timer was set to OS_CLOCK macro of
RTX_Conf_CM.c.
Corrected file:
RTX_Conf_CM.c of a
sample program folder.
12
Kernel_HW
dependence
OS update: CMSIS-RTOS RTX V4.80
13
When timer interrupt occurred during
os_resume function execution, the defect
a scheduler of OS suspends has been
corrected.
Corrected file: OS.
V2.04
1
ALL
RZ_A1H_sflash_boot_init_kpitgcc.x was
replaced with a right boot loader image
file because an image who does nothing
as a boot loader was incl ud ed.
V2.03
1
ALL
Fixed an issue where it was lacking in a
dummy reading procedure of a stand-by
control register after module stop
release.
2
DMA
Fixed an issue which doesn't control
exclusion when ca ll ing API f r om an
interrupt context.
3
IOIF, SCIF
Fixed an issue which doesn't control
exclusion when calling free function.
See "5.Restrictions"
4
RIIC
Fixed an issue which sometimes makes
the restart condition occur twice in case
of continuous transfer.
5
Fixed the error return processing in case
of continuous transfer.
6
SCIF
Fixed an issue which forwarded at DMA
channel 0, not an unused DMA channel
when specified DMA transmission.
7
SCUX
Fixed an issue which after the
initialization release of SRC, head of the
data that converted by SRC becomes
mute.
8
Fixed an issue which after calling
SCUX_IOCTL_SET_FLUSH_STOP, tail
of the data that converted by SRC isn't
output.
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 4 of 17
Dec 19, 2017
9
SOUND,
RIIC_CH3
Added RIICH_CH3 driver.
Changed the RIIC communication of a
SOUND driver to a calling of RIIC_CH3
driver.
10
Sample program
Changed the procedure of flash writing.
The procedur e which w ai ts for input of
"y" before flash writing was eliminated.
See "4.5.2 Writing in to the
Serial Flash"
See "4.6.2 Writing in to the
NOR Flash"
11
Fixed heap start address judgement
processing.
The end symbol in the linker script file
was made same as start address of
heap.
Corrected file: Linker script
file of each sample
program folder.
12
Fixed heap termination address
judgement processing.
A return value of the _top_of_heap
function was corrected in the address of
the __heap_end symbol from the SP
register va lue.
Corrected file:
GCC/newheap.c of each
sample program folder
13
Fixed an issue which sometimes aborted
when copying initial values of global
variables.
Corrected file: Linker script
file of a sample program
folder.
14
Added a processing which initialize
global constructor of C++.
The declaration for init_array is being
added to the linker script file and a
calling of the constructor initialization
function is being ad ded to the
__libc_init_array function.
Corrected file: The
following file of each
sample program folder.
Linker script file
GCC/cstartup.c
15
Changed the file name of the library.
Added prefix lib to the file name of the
library, and the way of a link was
changed to a "-l" option of a linker.
Corrected file: .cproject of
each sample program
folder.
16
A file of a platform and compiler
dependenc e was put in ord er.
The function of the platform and compiler
dependence was added to the existence
file of CMSIS-RTOS RTX.
Moved such function to a GCC folder of
sample program.
17
Fixed an issue which aborted when
setting OS_RUNPRIV as 0 in
RTX_Conf_CM.c in the sample program
project folder.
Corrected file:
system_Renesas_RZ_A1.c
of each sample program
folder.
18
A transfer order to the sleep mode in the
Idle thread was changed for the
processing which considered use of a
software stand-by mode.
Corrected file:
RTX_Conf_CM.c of each
sample program folder.
The reference document:
RZ/A1H user's manual
hardware Rev.2. 00 "55.3.1
Sleep Mode"
19
Kernel_HW
dependence
Fixed an issue which the following inline
assembler function will be the empty
function when a compiler was optimized
effectively.
__set_SP, __get_LR, __set_LR
Corrected file:
Include/core_caFunc.h
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 5 of 17
Dec 19, 2017
20
Fixed an issue which generated a linker
error when the following inline assembler
function was used.
__enable_fault_irq, __disable_fault_irq
Corrected file:
Include/core_caFunc.h
21
OS update: Corresponding to NEON.
Corrected file: O S and
system_Renesas_RZ_A1.c
of a sample program
folder.
22
OS update: Corresponding to Tick-less
operation.
Corrected file: OS.
V2.02
1
VDC5(Display)
Update the version of RZ/A1H Group
Video Display Controller 5 Driver, in
Ver.1.00
2
Sample program
Support NOR flash boot ( U LINK 2 writ e)
3
Kernel_HW
dependence
Fixed an issue where not waiting for a
status change after L2 cache operation
4
Fixed an issue where a data abort error
occurs when interrupt ID is 1022 or 1023
5
Add restrictions (No.1, No.2)
See "5.Restrictions"
6
Fixed an issue where use register s0-s3
of VFP instead of general r0-r3 when set
option "-mfloat-abi=hard" in compiler.
7
Fixed an issue where not replace the
stack size of main thread changed
OS_MAINSTKSIZE in RTX_Conf_CM.c.
V2.01a
-
-
new
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 6 of 17
Dec 19, 2017
2. Package Contents
Thi s package contains the fo llowing items:
2.1 Software
No.
Name
Folder na me
1
A set of BSP source codes
BSP
2.2 Documents
2.2.1 Manuals
No.
Revision
No.
File name
1
V2.07 (e2studio / KPITGCC) release note
2.07
[J] r01an3104jj0207-rza1h.pdf
[E] r01an3104ej0207-rza1h.pdf
(this document)
2
1.00
[J] r01an1822jj0100_rza1h.pdf
[E] r01an1822ej0100_rza1h.pdf
3
1.00
[J] r01an1823jj0100_rza1h.pdf
[E] r01an1823ej0100_rza1h.pdf
4
1.03
[J] r01an2520jj0103-rza1h.pdf
[E] r01an2520ej0103-rza1h.pdf
5
IOIF Application Note
1.03
[J] r01an2521jj0103-rza1h.pdf
[E] r01an2521ej0103-rza1h.pdf
6
1.04
[J] r01an2523jj0104-rza1h.pdf
[E] r01an2523ej0104-rza1h.pdf
7
SOUND Driver Application Note
1.05
[J] r01an2524jj0105-rza1h.pdf
[E] r01an2524ej0105-rza1h.pdf
8
1.04
[J] r01an2525jj0104-rza1h.pdf
[E] r01an2525ej0104-rza1h.pdf
9
RIIC CH3 Driver Application Note
1.04
[J] r01an2641jj0104-rza1h.pdf
[E] r01an2641ej0104-rza1h.pdf
10
1.01
[J] r01an3179jj0101-rza1h.pdf
[E] r01an3179ej0101-rza1h.pdf
11
ADC Driver Applicati on Not e
1.04
[J] r01an3712jj0104-rza1h.pdf
[E] r01an3712ej0104-rza1h.pdf
12
1.05
[J] r01an3713jj0105-rza1h.pdf
[E] r01an3713ej0105-rza1h.pdf
13
KPIT GCC Application Note
1.04
[J] r01an3714jj0104-rza1h.pdf
[E] r01an3714ej0104-rza1h.pdf
14
1.05
[J] r01an3715jj0105-rza1h.pdf
[E] r01an3715ej0105-rza1h.pdf
15
RSPI Driver Applicati on Note
1.05
[J] r01an3716jj0105-rza1h.pdf
[E] r01an3716ej0105-rza1h.pdf
16
1.05
[J] r01an3717jj0105-rza1h.pdf
[E] r01an3717ej0105-rza1h.pdf
17
SCUX Driver Application Note
1.05
[J] r01an3718jj0105-rza1h.pdf
[E] r01an3718ej0105-rza1h.pdf
18
1.05
[J] r01an3720jj0105-rza1h.pdf
[E] r01an3720ej0105-rza1h.pdf
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 7 of 17
Dec 19, 2017
2.2.2 Sample program build procedures
No.
Sample
program
name
File name
Storage destination
1
Blinky
[J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt
[E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt
App\Blinky\sample1\README
2
SSIF
[J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt
[E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt
App\SSIF\sample1\README
3
Potentiometer
[J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt
[E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt
App\ADC\sample1\README
4
SCUX
[J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt
[E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt
App\SCUX\sample1\README
5
VDC5_VDEC
[J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt
[E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt
App\vdc5_vdec\sample1\README
6
TouchPanel
[J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt
[E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt
App\TouchPanel\sample1\README
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 8 of 17
Dec 19, 2017
3. Folder structure
Below is the folder structure of this package.
Top
+-- Documentation
| +-- ReleaseNote : Release note
| +-- Specification : Documents (see Section 1.2.)
+-- Software
+-- BSP : BSP source folder
+-- App : BSP sample program TOP
| | .project
| +-- ADC
| | +-- sample1 : Main body of the potentiometer sample program
| +-- Blinky
| | +-- sample1 : Main body of the Blinky sample program
| +-- inc : Common header for the sample programs
| +-- lib : Common library for the sample programs
| +-- SCUX
| | +-- sample1 : Main body of the SCUX sample program
| +-- SSIF
| | +-- sample1 : Main body of the SSIF sample program
| +-- TouchPanel
| | +-- lib : TouchPanel sample program driver
| | +-- sample1 : Main body of the TouchPanel sample program
| +-- vdc5_vdec
| +-- lib : vdc5_vdec sample program driver
| +-- sample1 : Main body of the vdc5_vdec sample program
+-- CMSIS_RTOS_RTX
| | .project
| +-- Include
| +-- RTOS
| +-- RTX
| +-- Boards
| | +-- Renesas
| | +--RZ_A1H_RSK
| | +-- INC : Common header
| | +-- iodefines : Chip dependence header
| | +-- RenesasBSP : BSP driver
| | | version.txt : BSP version information
| | +-- drv_inc : Driver header
| | +-- drv_lib : Driver library
| | +-- drv_src
| | +-- adc : ADC driver
| | +-- dma : DMA driver
| | +-- ioif : IOIF
| | +-- riic : RIIC driver
| | +-- riic_ch3 : RIIC CH3 driver
| | +-- rspi : RSPI driver
| | +-- scif : SCIF driver
| | +-- scux : SCUX driver
| | +-- sound : SOUND driver
| | +-- ssif : SSIF driver
| | +-- vdc5_vdec : VDC5 & VDEC driver
| +-- INC : OS header
| +-- LIB : OS library
| +-- SRC : Main body of the OS
+-- ENV
| | .project
| +-- KPIT
| +-- optlibinc : KPIT GCC optlib library additional files
+-- Tool
+-- FlashImage : Binary file of the boot loader for SPIBSC boot
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 9 of 17
Dec 19, 2017
4. Information about the BSP
The requirements for using the BSP source codes are as follows.
4.1 Software
• Base OS
RTX for Cortex-A9 (8th June 2016)
• Drivers
IOIF, DMA, SCIF, SSIF, RSPI, RIIC, RIIC_CH3, ADC, SCUX, SOUND, VDC5_VDEC
• Sample programs
Blinky, SS IF, Potentiometer, SCUX, VDC5_VDEC, TouchPanel
4.2 Tools
• Build environment
IDE
e2studio (V e r sion: 5.3.0.023)
development tools
Renesa s ARM -NONE Toolchain v16.01
• Execution envi ronment
Segger J-Link AR M （6.10n）
4.3 Hardware
• Device
RZ/A1H
• Target board
Board name
Renesas Starter Kit+ for RZ/A1H (YR0K77210S003BE)
Operation mode
Clock in = 13.33 MHz, CKIO = 66.67 MHz
I Clock = 400.00 MHz
G Clock = 266.66 MHz
B Clock = 133.33 MHz
P1 Clock = 66.67 MHz
P0 Clock = 33.33 MHz
• Setup metho d
*For information about the positions of the jumpers and switches, refer to "RZ/A1H Group Renesas Starter Kit+
User's Manual For e2studio" of the Target Board Package.
Table 1 Connector Hookup
Part No.
Connected equipment
CN20
Speaker (headset)
CN18
USB serial cable
CN14
JTAG cable
CN5
AC adapter
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 10 of 17
Dec 19, 2017
Table 2 Debug Serial Port Settings
Baud rate
115200
Character length
8 bits
Parity
None
Stop bit
1 bit
Flow control
None
Line feed code
CR
Table 3 Target Board Jumper Settings
Jumper
Setting
Boot mode 0
Boot mode 3
JP11
1-2
1-2
JP12
1-2
1-2
JP18
1-2
1-2
JP21
1-2
1-2
PWR SEL
2-3
2-3
Table 4 Target Board Switch Se ttings (SW4)
DIP
switch
Setting
Boot mode 0
Boot mode 3
SW4-1
OFF
OFF
SW4-2
OFF
OFF
SW4-3
OFF
OFF
SW4-4
OFF
OFF
SW4-5
OFF
OFF
SW4-6
OFF
OFF
SW4-7
OFF
OFF
SW4-8
OFF
OFF
Table 5 Target Board Switch Se ttings (SW6)
DIP
switch
Setting
Boot mode 0
Boot mode 3
SW6-1
ON
OFF
SW6-2
ON
ON
SW6-3
ON
OFF
SW6-4
ON
ON
SW6-5
ON
ON
SW6-6
ON
ON
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 11 of 17
Dec 19, 2017
4.4 Operation procedure of Blinky sample program (On-chip RAM Download)
4.4.1 Build Process
1. Create a new e2studio workspace*1
A) Create a work folder*2 in an arbitrary position. (Yo u can decide the folder name freely)
B) Copy the source files (all the file groups under the BSP source folder) to the folder created in step A)
e.g. ) T he folder structure when making the work folder "C:\Workspace"
C:
└─Workspace
├─App
├─CMSIS_RTOS_RTX
├─ENV
└─Tool
C) Start e2 studio
D) Select the [File] menu --> [Switch Workspace] --> [Other...].
E) Click [Browse...] in the [Workspace Launcher] dialog box.
F) Select the folder crated in step A). Then, click [OK].
G) e2studio automatically restarts and the [Welcome to e2studio] screen appears.
H) Close the [Welcome to e2studio] screen.
*1: Even if there is an existing workspace, be sure to create a new one instead of using the existing workspace.
*2: Be sure to create a work folder in the place near the route of a drive so that the number restrictions of characters
of the pathname of Windows (260 characters) may not be exceeded.
2. Select the [Window] menu --> [Show View] --> [P roj ect Explorer].
3. Right-click the [Proje ct Explore r] view and select [Import.. .].
4. In the [Select an import source] of [Import] dialog box, select [General] --> [Existing Projects into Workspace].
Then, click t he [Ne xt] button.
5. In the [Import] dialog box, check [Select root directory] and then click [Browse...].
6. In the [Reference Folder] dialog box, select the source-file co py destination (folder name created in step 1-A)) and
then click [OK].
7. Chec k the [Search for nested projects] in the [Import] dialog box.
8. Remove the check mark from [Copy projects into wor kspace] in the [I mport] dialog box.
9. Click [Finish] in the [Import] dial og box.
10. Right-cl ick the "Blinky_smp1" project displayed in the [Project Explorer] view. Then, select [Clean Project].
11. Right-click like step 10 and then click [Build Project].
The file below is created.
App\Blinky\sample1\HardwareDebug\Blinky_smp1.x
4.4.2 Sample program Execution
• The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for boot mode
0.
• Before exec uting this s tep, create an executable file for the Blinky sample program (by referring to Section 3.4.1
Build Pr ocess).
• Before e xecuting this step, you must do setup the "R S K USB Serial P ort" on PC with "5.16 USB Ser ial Port" of
RZ/A1H Group Renesas Starter Kit+ User's Manual
• Take the steps below while the e2studio Debug perspective is displayed.
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 12 of 17
Dec 19, 2017
1. Connect j-Link to CN14 of a CPU board and USB connector of the PC.
2. Connect PC to CN18 of a CPU board by USB serial cable.
3. Start e2studio.
4. Select [Run] menu --> [Debug Configurations...].
5. Select [Blinky_smp1 HardwareDebug] in the "Renesas GDB Hardware Debugging" list in the [Debug
Configurations] dialog box.
Then, click [D ebu g].
(The target board and e2studio are connected and the downloading of the executable file begins.)
6. Click [Resume] button (gre e n p la yback mar k) twice in the [ Debug Cont rol] view.
4.4.3 Sample program Execution Result
When execution of a s amp l e pr ogram is begun, LED0 flashes on and off.
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 13 of 17
Dec 19, 2017
4.5 Operation procedure of Blinky sample program (Serial Flash Boot)
4.5.1 Build Process
1. Perform steps 1 through 10 described in Section 4.4.1.
2. Right-click the "Blinky_smp1" project displayed in the [ Project Explo rer] view. Then, select [P roperties].
3. Select [Setting s] for [C/C++ B uild ] in the [Pr operties] dialog box.
4. In the [Tool Settings] tab, sele c t [Linker] --> [Other].
5. Edit [File] entr y, set the path below.
"${ProjDirPath}/${ProjName}_sflashboot.ld"
6. Right-click the "Blinky_smp1" project displayed in the [Project Explorer] view. Then, select [Clean Project].
7. Right-click like step 6 and then click [B uild Pr oject].
4.5.2 Writing in to the Serial Flash
• The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for boot mode
3.
• Before exec uting this s tep, create an executable file for the Blinky sample program (by referring to Section 3. 5.1
Build Pro cess).
• Take the steps below while the e2studio Debug perspective is displayed.
1. Connect j-Link to CN14 of a CPU board and USB connector of the PC.
2. Start e2studio.
3. Select [Run] menu --> [Debug Configurations...].
4. Select [Blinky_smp1_sflash HardwareDebug] in the "Renesas GDB Hardware Debugging" list in the [Debug
Configurations] dialog box.
Then, click [D ebu g].
(The target board and e2studio are connected and the downloading of the executable file begins.)
5. Right-click [Download] butto n i n the [Debug] vi ew. Then, select "RZ_A1H_sflash_boot_init_kpitgcc.x".
6. Right-click [Blinky_smp1_sflash HardwareDebug] in the [Debug] view. Then, select [Terminate].
(The target board and e2studio are disconnected.)
7. Power off the target board.
4.5.3 Sample program Execution
• The jumpers and swit ches on the tar get board shoul d be in the p ositi ons shown in T ables 3 through 5 for boot mode
3.
• Before e xecuting this step, you must do setup the "R S K USB Serial P ort" on PC with "5.16 USB Se rial Port" of
RZ/A1 H Group Renesas Star ter Kit+ User's Manual
1. Connect PC to CN18 of a CPU board by USB ser ia l cable.
2. Power on the target board.
4.5.4 Sample program Execution Result
When execution of a s amp l e pr ogram is begun, LED0 flashes on and off.
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 14 of 17
Dec 19, 2017
4.6 Operation procedure of Blinky sample program (NOR Fla sh Boot)
4.6.1 Build Process
1. Perform steps 1 through 10 described in Section 4.4.1.
2. Right-click the "Blinky_smp1" project displayed in the [ Project Explo rer] view. Then, select [P roperties].
3. Select [Setting s] for [C/C++ B uild ] in the [Pr operties] dialog box.
4. In the [Tool Settings] tab, sele c t [Linker] --> [Other].
5. Edit [File] entr y, set the path below.
"${ProjDirPath}/${ProjName}_nflashboot.ld"
6. Right-click the "Blinky_smp1" project displayed in the [Project Explorer] view. Then, select [Clean Project].
7. Right-click like step 6 and then click [B uild Pr oject].
4.6.2 Writi ng in to the N OR Flas h
• The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for boot mode
0.
• Before exec uting this s tep, create an executable file for the Blinky sample program (by referring to Section 4.6.1
Build Pro cess).
• Take the steps below while the e2studio Debug perspective is displayed.
1. Connect j-Link to CN14 of a CPU board and USB connector of the PC.
2. Start e2studio.
3. Select [Run] menu --> [Debug Configurations...].
4. Select [Blinky_smp1_nflash HardwareDebug] in the "Renesas GDB Hardware Debugging" list in the [De bug
Configurations] dialog box.
Then, click [D ebu g].
(The target board and e2studio are connected and the downloading of the executab le file begins.)
5. Right-click [Blinky_smp1_nflash HardwareDebug] in the [Debug] view. Then, select [Terminate].
(The target board and e2studio are disconnected.)
6. Power off the target board.
4.6.3 Sample program Execution
• The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for boot mode
0.
• Before e xecuting this step, you must do setup the "R S K USB Serial P ort" on PC with "5.16 USB Ser ial Port" of
RZ/A1 H Group Renesas Star ter Kit+ User's Manual
1. Connect PC to CN18 of a CPU board by USB ser ia l cable.
2. Power on the target board.
4.6.4 Sample program Execution Result
When execution of a s amp l e program is begun, LED0 flashes on and off.
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 15 of 17
Dec 19, 2017
5. Restrictions
No.
Type
Precaution
1
Standard C
library
The KPIT GNU Tools GNUARM-NONE's Standard C library is non-correspondence in
multi-threading.
When execute the library function at the same time from more than one threads, a
processing result is unsettled.
When using the library function which operates the heap such as malloc, calloc,
realloc and etc., pl ease execute in the state of the interrupt disabled to prevent a
thread change.
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 16 of 17
Dec 19, 2017
6. Precautions
No.
Type
Precaution
1
Kernel_HW
dependence
Both the debug serial port (printf output destination) and the SCIF driver's channel 2
use the same port. Note that opening channel 2 results in contention.
2
SCUX,
SSIF
If an SSIF channel is selected as the output destination with the SCUX driver, opening
this channel with the SSIF driver results in contention. Thus, use exclusive mode for
channel access.
RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC)
R01AN3104EJ0207 Rev.2.07 Page 17 of 17
Dec 19, 2017
Website and Support
Renesas Electronics Website
http://www.renesas.com/
Inquiries
http://www.renesas.com/contact/
All trademarks and registered trademarks are the property of their respective owners.
Revision History
Rev.
Date
Description
Page
Summary
2.03
Dec 14, 2015
-
V2.03 for e2studio is released.
2.04
Feb 19, 2016
-
Replace an image file of a boot loader.
2.05
Oct 06, 2016
-
RTX OS has been updated to V4.80.
Various defects have been corrected.
The folder structure of the BSP source has been changed.
The sample programs of Blinky and TouchPanel have been
added.
The explanation of the sample execution procedure has been
changed to the explanation of the Blinky sample program.
2.06
Mar 17, 2017
2
1. History of Changes to the Previous Versions
Added V2.06 inf or mation.
6-7
2.2 Documents
The document numbers are renewed according to the latest
documents.
2.07
Dec 19, 2017
2
1. History of Changes to the Previous Versions
Added V2.07 inf or mation.
6-7
2.2 Documents
The document numbers are renewed according to the latest
documents.
General Prec autions in the H a ndling of Microprocessing Unit and Microcontroller Unit Products
The following usage notes are applicable to all Microprocessing unit and Microcontroller unit products from Rene sas.
For detailed usage notes on the products covered by this document, refer to the relevant sections of the document as
well as any tec hnical updates that have been issued for the products.
1. Handling of Unused Pins
Handle unused pins in accordance with the directions given under Handling of Unused Pins in the
manual.
The input pins of CMOS products are generally in the high-impedance state. In operation with
an unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of
LSI, an associate d sho ot-through current flows internally, and malfunctions occur due to the
false recognition of the pin state as an input signal become possible. Unused pins should be
handled as described under Handling of Unused Pins in the manual.
2. Proces s ing at Po wer -on
The state of the product is undefined at the moment when power is supplied.
The states of internal circuits in the LSI are indeterminate and the states of register settings and
pins are undefined at the moment when power is supplied.
In a finished product where the reset signal is applied to the external reset pin, the states of
pins are not guaranteed from the moment when power is supplied until the reset process is
completed.
In a similar way, the states of pins in a product that is reset by an on-ch ip po wer-on reset
function are not guaranteed from the moment when power is supplied until the power reaches
the level at which resetting has been specified.
3. Prohibition of Access to Reserved Addresses
Access to reserved addresses is prohibited.
The reserved addresses are provided for the possible future expansion of functions. Do not
access these addresses; the correct operation of LSI is not guaranteed if they are accessed.
4. Clock Signals
After applying a reset, only release the reset line after the operating clock signal has become
stable. When switching the clock signal during program execution, wait until the target clock signal
has stabilized.
When the clock signal is generated with an external resonator (or from an external oscillator)
during a reset, ensure that the reset line is only released after full stabilization of the clock
signal. Moreover, when switching to a clock signal produced with an external resonator (or by
an external oscillator) while program execution is in progress, wait until the target clock signal is
stable.
5. Differences between Products
Before changing from one product to another, i.e. to a product with a different part number, confirm
that the change will not lead to problems.
The characteristics of Microprocessing unit or Microcontroller unit products in the same group
but having a different part number may differ in terms of the internal memory capacity, layout
pattern, and other factors, which can affect the ranges of electrical characteristics, such as
characteristic values, operating margins, immunity to noise, and amount of radiated noise.
When changing to a product with a different part number, implement a system-evaluation test
for the given product.
Notice
1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for
the incorporation or any other use of the circuits, software, and information in the design of your product or system. Renesas Electronics disclaims any and all liability for any losses and damages incurred by
you or t hir d par ties aris ing from the use of these cir c uits, s oftwar e, or inf or m ation.
2. Renesas Electronics hereby expressly disclaims any warranties against and liability for infringement or any other disputes involving patents, copyrights, or other intellectual property rights of third parties, by or
arising from the use of Renesas Electronics products or technical information described in this document, including but not limited to, the product data, drawing, chart, program, algorithm, application
examples.
3. No license, ex pr es s , implied or otherwise, is granted hereby under any patents , copyr ights or other int ellec tual property r ights of Renes as E lec tronics or others.
4. You shall not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Renesas Electronics disclaims any and all liability for any losses or damages
incurred by y ou or third parties aris ing from s uc h alterat ion, modif ic ation, c opy or otherwise m is appr opr iation of Renes as Elec tronic s pr oduc ts.
5. Renesas Electronics products are classified according to the following two quality grades: "Standard" and "High Quality". The intended applications for each Renesas Electronics product depends on the
product ’s quality grade, as indicated below.
"Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic
equipment; and indust r ial r obots et c .
"High Q uality": Tr ans por tation equipm ent (aut om obiles , tr ains , ships, etc .); traf fic control (traf fic light s ) ; large- s c ale c om m unic ation equipment ; key financial t er m inal s y s tems; saf ety control equipment; etc.
Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose adirect threat to human life or bodily injury (artificial life support devices or systems, surgical
implantations etc.), or may cause serious property damages (space and undersea repeaters; nuclear power control systems; aircraft control systems; key plant systems; military equipment; etc.). Renesas
Electronics disclaims any and all liability for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas
Electronics.
6. When using the Renesas Electronics products, refer to the latest product information (data sheets, user’s manuals, application notes, "General Notes for Handling and Using Semiconductor Devices" in the
reliability handbook, etc.), and ensure that usage conditions are within the ranges specified by Renesas Electronics with respect to maximum ratings, operating power supply voltage range, heat radiation
characteristics, installation, etc. Renesas Electronics disclaims any and all liability for any malfunctions or failure or accident arising out of the use of Renesas Electronics products beyond such specified
ranges.
7. Although Renesas Electronics endeavors to improve the quality and reliability of Renesas Electronics products, semiconductor products have specific characteristics such as the occurrence of failure at a
certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please ensure to implement safety measures to guard them
against the possibility of bodily injury, injury or damage caused by fire, and social damage in the event of failure or malfunction of Renesas Electronics products, such as safety design for hardware and
software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures by your own responsibility as warranty
for y our pr oduc ts/ s y s tem. B ec aus e the evaluat ion of micr oc om puter softwar e alone is v er y diffic ult and not pr ac tical, pleas e ev aluate the s afety of the final products or s y s tems m anufact ur ed by y ou.
8. Please contact aRenesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please investigate applicable laws and
regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive carefully and sufficiently and use Renesas Electronics products in compliance with all
these applic able laws and r egulations. Renes as E lec tronics dis c laim s any and all liability f or dam ages or los s es oc c ur r ing as a r es ult of y our nonc om plianc e with applicable laws and r egulations.
9. Renesas Electronics products and technologies shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws
or regulations. You shall not use Renesas Electronics products or technologies for (1) any purpose relating to the development, design, manufacture, use, stockpiling, etc., of weapons of mass destruction,
such as nuclear weapons, chemical weapons, or biological weapons, or missiles (including unmanned aerial vehicles (UAVs)) for delivering such weapons, (2) any purpose relating to the development,
design, manufacture, or use of conventional weapons, or (3) any other purpose of disturbing international peace and security, and you shall not sell, export, lease, transfer, or release Renesas Electronics
products or technologies to any third party whether directly or indirectly with knowledge or reason to know that the third party or any other party will engage in the activities described above. When exporting,
selling, transferring, etc., Renesas Electronics products or technologies, you shall comply with any applicable export control laws and regulations promulgated and administered by the governments of the
countr ies as s er ting jurisdic tion over the part ies or transac tions.
10. Please acknowledge and agree that you shall bear all the losses and damages which are incurred from the misuse or violation of the terms and conditions described in this document, including this notice,
and hold Renesas Elec tronics har m les s , if s uc h m is us e or v iolation results f r om y our r es ale or m ak ing Renes as E lec tronics pr oduc ts available any third party.
11. This doc um ent shall not be r epr inted, r epr oduc ed or duplic ated in any f or m , in whole or in part, without pr ior wr itten c ons ent of Renes as E lec tronics .
12. Please contact a Renes as E lec tronics s ales offic e if you have any ques tions regar ding the infor m ation cont ained in this docum ent or Renesas E lec tronics pr oduc ts.
(Note 1) "Renesas E lec tronics " as us ed in this docum ent means Renes as E lec tronics Cor por ation and also includes its major ity-owned s ubs idiar ies .
(Note 2) "Renesas E lec tronics pr oduc t(s)" m eans any pr oduc t developed or m anufact ur ed by or for Renesas E lec tronics .
http://www.renesas.com
Refer to "http://www.renesas.com/" for the latest and detailed information.
Renesas Electronics America Inc.
2801 Scott Boulevard Santa Clara, CA 95050-2549, U.S.A.
Tel: +1-408-588-6000, Fax: +1-408-588-6130
Renesas Electronics Canada Limited
9251 Yonge Street, Suite 8309 Richmond Hill, Ontario Canada L4C 9T3
Tel: +1-905-237-2004
Renesas Electronics Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K
Tel: +44-1628-585-100, Fax: +44-1628-585-900
Renesas Electronics Europe GmbH
Arcadiastrasse 10, 40472 Düsseldorf, Germany
Tel: +49-211-6503-0, Fax: +49-211-6503-1327
Renesas Electronics (China) Co., Ltd.
Room 1709, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100191, P.R.China
Tel: +86-10-8235-1155, Fax: +86-10-8235-7679
Renesas Electronics (Shanghai) Co., Ltd.
Unit 301, Tower A, Central Towers, 555 Langao Road, Putuo District, Shanghai, P. R. China 200333
Tel: +86-21-2226-0888, Fax: +86-21-2226-0999
Renesas Electronics Hong Kong Limite d
Unit 1601-1611, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong
Tel: +852-2265-6688, Fax: +852 2886-9022
Renesas Electronics Taiwan Co., Ltd.
13F, No. 363, Fu Shing North Road, Taipei 10543, Taiwan
Tel: +886-2-8175-9600, Fax: +886 2-8175-9670
Renesas Electronics Singapore Pte. Ltd.
80 Bendemeer Road, Unit #06-02 Hyflux Innovation Centre, Singapore 339949
Tel: +65-6213-0200, Fax: +65-6213-0300
Renesas Electronics Malaysia Sdn.Bhd.
Unit 1207, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: +60-3-7955-9390, Fax: +60-3-7955-9510
Renesas Electronics India Pvt. Ltd.
No.777C, 100 Feet Road, HAL II Stage, Indiranagar, Bangalore, India
Tel: +91-80-67208700, Fax: +91-80-67208777
Renesas Electronics Korea Co., Ltd.
12F., 234 Teheran-ro, Gangnam-Gu, Seoul, 135-080, Korea
Tel: +82-2-558-3737, Fax: +82-2-558-5141
SALES OFFICES
© 2017 Renesas Electronics Corporation. All rights reserved.
Colophon 6.0
(Rev. 3.0-1 Novem ber 2016)