© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 High- and Low-Side Gate Driver
February 2007
FAN7382 Rev. 1.0.8
FAN7382
High- and Low-Side Gate Driver
Features
Floating Channe ls Designed for Bootstrap Operation
to +600V
Typically 350mA/650mA Sourcing/Sinking Current
Driving Capability for Both Channels
Common-Mode dv/dt Noise Canceling Circuit
Extended Allowable Negative VS Swing to -9.8V for
Signal Propagation at VCC=VBS=15V
VCC & VBS Supply Range from 10V to 20V
UVLO Functions for Both Channels
TTL Compatible Input Logic Threshold Levels
Matched Propagation Delay Below 50n sec
Output In-phase with Input Signal
Applications
PDP Scan Driver
Fluorescent Lamp Ballast
SMPS
Motor Driver
Description
The FAN738 2, a monolithic high and low side ga te-drive
IC, can drive MOSFETs and IGBTs that operate up to
+600V. Fairchild’s high-voltage process and common-
mode noise canceling technique provides stable opera-
tion of the high-side driver under high-dv/dt noise circum-
stances. An advanced level-shift circuit allows high-side
gate driver operation up to VS=-9.8V (typical) for
VBS=15V. The input logic level is compatible with stan-
dard TTL-series logic gates. UVLO circuits for both chan-
nels prevent malfunction when V CC or VBS is lower than
the specified threshold voltage. Output drivers typically
source/sink 350mA/650mA, respectively, which is suit-
able for fluorescent lamp ballasts, PDP scan drivers,
motor controls, etc.
Ordering Information
Note:
1. These devices passed wave soldering test by JESD22A-111.
8-SOP 8-DIP 14-SOP
Part Number Package Pb-Free Operating Temperature Ra ng e Packing Me tho d
FAN7382N 8-DIP
Yes -40°C ~ 125°C
Tube
FAN7382M(1) 8-SOP Tube
FAN7382MX(1) Tape & Reel
FAN7382M1(1) 14-SOP Tube
FAN7382M1X(1) Tape & Reel
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 2
FAN7382 High- and Low-Side Gate Driver
Typical Application Circuit
Figure 1. Applica tion Circuit for Half-Bridge
Internal Block Diagram
Figure 2. Functional Block Diagram
DBOOT
HIN
CBOOT
15V
RBOOT
Q1
R1
R2
VB
HIN
COM
HO
VS
LO
1
2
LIN
VCC
5
6
8
3
4
7
R3
R4
600V
Q2
LIN
Load
FAN7382 Rev.05
C1
FAN7382 Rev.04
UVLO
DRIVER
PULSE
GENERATOR
3
1
4
8
6
VCC
COM
LO
VB
HO
VS
R
R
SQ
DRIVER
HS(ON/OFF)
LS(ON/OFF) DELAY
UVLO
2
HIN
LIN
NOISE
CANCELLER
5
7
500K
500K
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 3
FAN7382 High- and Low-Side Gate Driver
Pin Assignments
Figure 3. Pin Configura t io n (Top Vie w)
Pin Definitions
Name Description
VCC Low-Side Supply Voltage
HIN Logic Input for High-Side Gate Driver Output
LIN Logic Input for Low-Side Gate Driver Output
COM Logic Ground and Low-Side Driver Return
LO Low-Side Driver Output
VSHigh-Voltage Floating Supply Return
HO High-Side Driver Output
VBHigh-Side Floating Supply
VS
VB
VCC
LIN
HIN HO
LO
4
COM
3
2
1
5
6
7
8
FAN7382 Rev.05
VS
VB
VCC
LIN
HIN
HO
4
NC
3
2
1
11
12
13
14
FAN7382 Rev.01
NC
7
COM 6
5
LO 8
9
10
NC
NC
NC
NC
FAN7382N
FAN7382M FAN7382M1
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 4
FAN7382 High- and Low-Side Gate Driver
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function o r be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only.
Notes:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
3. Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
4. Do not exceed PD under any circumstances.
Recommended Operating Ratings
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol Characteristics Min. Max. Unit
VSHigh-side offset voltage VB-25 VB+0.3
V
VBHigh-side floating supply voltage -0.3 625
VHO High-side floating output voltage HO VS-0.3 VB+0.3
VCC Low-side and logic fixed supply voltage -0.3 25
VLO Low-side output voltage LO -0.3 VCC+0.3
VIN Logic input voltage (HIN, LIN) -0.3 VCC+0.3
COM Logic ground VCC-25 VCC+0.3
dVS/dt Allowable offset voltage slew rate 50 V/ns
PD(2)(3)(4) Power dissipation 8-SOP 0.625 W14-SOP 1.0
8-DIP 1.2
θJA Thermal resistance, junction-to-ambient 8-SOP 200
°C/W14-SOP 110
8-DIP 100
TJJunction temperature 150 °C
TSTG Storage temperature 150 °C
Symbol Parameter Min. Max. Unit
VBHigh-side floating supply voltage VS+10 VS+20
V
VSHigh-side floating supply offset voltage 6-VCC 600
VHO High-side (HO) output voltage VSVB
VLO Low-side (LO) output voltage COM VCC
VIN Logic input voltage (HIN, LIN) COM VCC
VCC Low-side supply voltage 10 20
TAAmbient temperature -40 125 °C
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 5
FAN7382 High- and Low-Side Gate Driver
Electrical Characteristics
VBIAS (VCC, VBS)=15.0V, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to COM.
The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO.
Dynamic Electrical Characteristics
VBIAS (VCC, VBS)=15.0V, VS=COM, CL=1000p F and, TA = 25°C, unless otherwise specified.
Note:
5. This parameter guaranteed by design.
Symbol Characteristics Test Condition Min. Typ. Max. Unit
VCCUV+
VBSUV+
VCC and VBS supply under-voltage
positive going threshold 8.2 9.2 10.0
V
VCCUV-
VBSUV-
VCC and VBS supply under-voltage
negative goi ng threshold 7.6 8.7 9.6
VCCUVH
VBSUVH
VCC supply under-voltage lockout
hysteresis 0.6
ILK Offset supply leakage current VB=VS=600V 50 µAIQBS Quiescent VBS supply current VIN=0V or 5V 4 5 120
IQCC Quiescent VCC supply current VIN=0V or 5V 70 180
IPBS Operating VBS supply current fIN=20kHz,rms value 600 µA
IPCC Operating VCC supply current fIN=20kHz,rms value 600
VIH Logic "1" input voltage 2.9
V
VIL Logic "0" input voltage 0.8
VOH High-level output voltage, VBIAS-VOIO=20mA 1.0
VOL Low-level output voltage, VO0.6
IIN+ Logic "1" input bias current VIN=5V 10 20 µA
IIN- Logic "0" input bias current VIN=0V 1.0 2.0
IO+ Output high short-circuit pulsed current VO=0V, VIN=5V with PW<10µs 250 350 mA
IO- Output low short-circuit pulsed current VO=15V, VIN=0V with PW<10µs 500 650
VSAllowable negative VS pin voltage for
HIN signal propagation to HO -9.8 -7.0 V
Symbol Characteristics Test Condition Min. Typ. Max. Unit
ton Turn-on propagation delay VS=0V 100 170 300
ns
toff Turn-off propagation delay VS=0V or 600V(5) 100 200 300
trTurn-on rise time 20 60 140
tfTurn-off fall time 30 80
MT Delay matching, HS & LS turn-on/off 50
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 6
FAN7382 High- and Low-Side Gate Driver
Typical Characteristics
Figure 4. Turn-O n Prop agation Delay vs.
Supply Voltage Figure 5. Turn-On Propagation Delay vs. Temp.
Figure 6. Turn-Off Propagation Delay vs.
Supply Voltage Figure 7. Turn-Off Pr opagation Del ay vs. Temp.
Figure 8. Turn-On Rising Time vs. Supply Voltage Figure 9. Turn-On Rising Time vs. Temp.
10 12 14 16 18 20
100
150
200
250
300
Turn-On Propagation Delay [nsec]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
CL=1nF
Ta=25°C
10 12 14 16 18 20
100
150
200
250
300
Turn-On Propagation Delay [nsec]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
CL=1nF
Ta=25°C
-40 -20 0 20 40 60 80 100 120
50
75
100
125
150
175
200
225
250
275
300
Turn-On Propagation Delay [nsec]
Temperature[°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
CL=1nF
-40 -20 0 20 40 60 80 100 120
50
75
100
125
150
175
200
225
250
275
300
Turn-On Propagation Delay [nsec]
Temperature[°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
CL=1nF
VCC=VBS
COM=0V
CL=1nF
TA=25°C
VCC=VBS=15V
COM=0V
CL=1nF
10 12 14 16 18 20
100
120
140
160
180
200
220
240
260
280
300
Turn-Off Propagation Delay [nsec]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
CL=1nF
Ta=25°C
10 12 14 16 18 20
100
120
140
160
180
200
220
240
260
280
300
Turn-Off Propagation Delay [nsec]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
CL=1nF
Ta=25°C
-40-200 20406080100120
125
150
175
200
225
250
275
300
Low-Side
Turn-Off Propagation Delay [nsec]
Temperature [°C]
High-Side
VCC=VB S=15V
COM=0V
CL=1nF
-40-200 20406080100120
125
150
175
200
225
250
275
300
Low-Side
Turn-Off Propagation Delay [nsec]
Temperature [°C]
High-Side
-40-200 20406080100120
125
150
175
200
225
250
275
300
Low-Side
Turn-Off Propagation Delay [nsec]
Temperature [°C]
High-Side
VCC=VB S=15V
COM=0V
CL=1nF
VCC=VBS
COM=0V
CL=1nF
TA=25°C
VCC=VBS=15V
COM=0V
CL=1nF
10 11 12 13 14 15 16 17 18 19 20
42
44
46
48
50
52
54
56
58
60
62
64
Turn-On Rising Time [nsec]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
CL=1nF
Ta=25°C
10 11 12 13 14 15 16 17 18 19 20
42
44
46
48
50
52
54
56
58
60
62
64
Turn-On Rising Time [nsec]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
CL=1nF
Ta=25°C
-40-200 20406080100120
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
Turn-On Rising Time [nsec]
Temperature [°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
CL=1nF
-40-200 20406080100120
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
Turn-On Rising Time [nsec]
Temperature [°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
CL=1nF
VCC=VBS
COM=0V
CL=1nF
TA=25°C
VCC=VBS=15V
COM=0V
CL=1nF
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 7
FAN7382 High- and Low-Side Gate Driver
Typical Characteristics (Continued)
Figure 10. Turn-Off Falling Time vs. Supply Voltage Figure 11. Turn-Off Falling Time vs. Temp.
Figure 12. Output Sourcing Current vs. Supply
Voltage Figure 13. Output Sourcing Current vs. Temp
Figure 14. Ou tput Si nkin g Curre nt v s. Suppl y Voltage Figure 15. Output Sinkin g Current vs. Temp.
10 11 12 13 14 15 16 17 18 19 20
16
18
20
22
24
26
28
30
32
34
Turn-Off Falling Time [nsec]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
CL=1nF
Ta=25°C
10 11 12 13 14 15 16 17 18 19 20
16
18
20
22
24
26
28
30
32
34
Turn-Off Falling Time [nsec]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
CL=1nF
Ta=25°C
-40-200 20406080100120
10
15
20
25
30
35
40
45
50
Turn-Off Fa llin g Time [ns ec]
Tem perature [°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
CL=1nF
-40-200 20406080100120
10
15
20
25
30
35
40
45
50
Turn-Off Fa llin g Time [ns ec]
Tem perature [°C]
High-Side
Low-Side
-40-200 20406080100120
10
15
20
25
30
35
40
45
50
Turn-Off Fa llin g Time [ns ec]
Tem perature [°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
CL=1nF
VCC=VBS
COM=0V
CL=1nF
TA=25°C
VCC=VBS=15V
COM=0V
CL=1nF
10 12 14 16 18 20
100
150
200
250
300
350
400
450
500
550
600
Output Sourcing Cur ren t [mA]
Supply Voltage [V]
Low-Side
High-Side
VCC=VBS
COM=0V
LO=HO=0V
Ta=25°C
10 12 14 16 18 20
100
150
200
250
300
350
400
450
500
550
600
Output Sourcing Cur ren t [mA]
Supply Voltage [V]
Low-Side
High-Side
VCC=VBS
COM=0V
LO=HO=0V
Ta=25°C
-40 -20 0 20 40 60 80 100 120
280
300
320
340
360
380
400
420
440
Output Sourcing Current [mA]
Tem perature [°C]
High-Side
Low-Side
VCC=VB S=15V
COM=0V
LO=HO=0V
-40 -20 0 20 40 60 80 100 120
280
300
320
340
360
380
400
420
440
Output Sourcing Current [mA]
Tem perature [°C]
High-Side
Low-Side
VCC=VB S=15V
COM=0V
LO=HO=0V
VCC=VBS
COM=0V
LO=HO=0V
TA=25°C
VCC=VBS=15V
COM=0V
LO=HO=0V
10 12 14 16 18 20
300
400
500
600
700
800
900
Output Sinking Current [mA]
Supply Voltage [V]
High-Side
Low-Side
VCC=VB S
COM=0V
LO=VCC , HO=VB
Ta=25°C
10 12 14 16 18 20
300
400
500
600
700
800
900
Output Sinking Current [mA]
Supply Voltage [V]
High-Side
Low-Side
VCC=VB S
COM=0V
LO=VCC , HO=VB
Ta=25°C
-40-200 20406080100120
500
550
600
650
700
750
800
850
Output Sinking Current [mA]
Tem perature [°C]
High-Side
Low-Side
VCC =VBS=15V
COM=0V
LO=VCC, HO=VB
-40-200 20406080100120
500
550
600
650
700
750
800
850
Output Sinking Current [mA]
Tem perature [°C]
High-Side
Low-Side
VCC =VBS=15V
COM=0V
LO=VCC, HO=VB
VCC=VBS
COM=0V
LO=VCC, HO=VB
TA=25°C
VCC=VBS=15V
COM=0V
LO=VCC, HO=VB
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 8
FAN7382 High- and Low-Side Gate Driver
Typical Characteristics (Continued)
Figure 16. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Supply Voltage Figure 17. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Temp.
Figure 18. IQCC vs. Supply Voltage Figure 19. IQCC vs. Temp.
Figure 20. IQBS vs. Supply Voltage Figure 21. IQBS vs. Temp.
10 12 14 16 18 20
-18
-16
-14
-12
-10
-8
-6
-4
Allowable Negative VS Voltage
for Sign al Propagatio to High-Si d e [V]
Supply Voltage [V]
VCC=VBS
COM=0V
Ta=25°C
10 12 14 16 18 20
-18
-16
-14
-12
-10
-8
-6
-4
Allowable Negative VS Voltage
for Sign al Propagatio to High-Si d e [V]
Supply Voltage [V]
VCC=VBS
COM=0V
Ta=25°C
-40 -20 0 20 40 60 80 100 120
-10.4
-10.2
-10.0
-9.8
-9.6
-9.4
-9.2
-9.0
Allowable Neg ative VS Voltage
for Signal Pro pag atio n to High -Si d e [V]
Temperature [°C]
VCC=VB S=15V
COM=0V
-40 -20 0 20 40 60 80 100 120
-10.4
-10.2
-10.0
-9.8
-9.6
-9.4
-9.2
-9.0
Allowable Neg ative VS Voltage
for Signal Pro pag atio n to High -Si d e [V]
Temperature [°C]
-40 -20 0 20 40 60 80 100 120
-10.4
-10.2
-10.0
-9.8
-9.6
-9.4
-9.2
-9.0
Allowable Neg ative VS Voltage
for Signal Pro pag atio n to High -Si d e [V]
Temperature [°C]
VCC=VB S=15V
COM=0V
VCC=VBS
COM=0V
TA=25°C
VCC=VBS=15V
COM=0V
Allowable Negative VS Voltage
for Signal Propagati on to High-Side [V]
Allowable Negative VS Voltage
for Signal Propagation to High-Side [V]
0 5 10 15 20
0
20
40
60
80
100
IQCC [uA]
Sup ply Voltage [V]
VBS=15V
COM=0V
HIN=LIN=0V
Ta=25°C
0 5 10 15 20
0
20
40
60
80
100
IQCC [uA]
Sup ply Voltage [V]
VBS=15V
COM=0V
HIN=LIN=0V
Ta=25°C
-40-200 20406080100120
45
50
55
60
65
70
75
80
85
90
95
IQCC [uA]
Tem perature [°C]
VCC=VBS=15V
COM=0V
HIN=LIN=0V
-40-200 20406080100120
45
50
55
60
65
70
75
80
85
90
95
IQCC [uA]
Tem perature [°C]
VCC=VBS=15V
COM=0V
HIN=LIN=0V
VBS=15V
COM=0V
HIN=LIN=0V
TA=25°C
VCC=VBS=15V
COM=0V
HIN=LIN=0V
IQCC [μA]
IQCC [μA]
0 5 10 15 20
0
10
20
30
40
50
60
70
80
IQBS [uA]
Sup ply Voltage [V ]
VCC=15V
COM=0V
HIN=LIN=0V
Ta=25°C
0 5 10 15 20
0
10
20
30
40
50
60
70
80
IQBS [uA]
Sup ply Voltage [V ]
VCC=15V
COM=0V
HIN=LIN=0V
Ta=25°C
-40 -20 0 20 40 60 80 100 120
36
38
40
42
44
46
48
50
52
IQBS [uA]
Tem p erature [°C]
VCC=15V
COM=0V
HIN=LIN=0V
-40 -20 0 20 40 60 80 100 120
36
38
40
42
44
46
48
50
52
IQBS [uA]
Tem p erature [°C]
VCC=15V
COM=0V
HIN=LIN=0V
VCC=15V
COM=0V
HIN=LIN=0V
TA=25°C
VCC=15V
COM=0V
HIN=LIN=0V
IQBS [μA]
IQBS [μA]
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 9
FAN7382 High- and Low-Side Gate Driver
Typical Characteristics (Continued)
Figure 22. High-Level Output Voltage vs.
Supply Voltage Figure 23. High-Level Output Voltage vs. Temp.
Figure 24. Low-Level Output Voltage vs.
Supply Voltage Figure 25. Low-Level Output Voltage vs. Temp.
Figure 26. Input Bias Current vs. Supply Voltage Figure 27. Input Bias Curr ent vs. Temp.
10 12 14 16 18 20
0.2
0.3
0.4
0.5
0.6
0.7
VOH [V]
Supply Voltage [V]
High-Side
Low-Side
VCC=VB S
COM=0V
HIN=LIN=5V
IL=20mA
Ta=25°C
10 12 14 16 18 20
0.2
0.3
0.4
0.5
0.6
0.7
VOH [V]
Supply Voltage [V]
High-Side
Low-Side
VCC=VB S
COM=0V
HIN=LIN=5V
IL=20mA
Ta=25°C
-40 -20 0 20 40 60 80 100 120
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
VOH [V]
Temp erature [°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
HIN=LIN=5V
IL=20mA
-40 -20 0 20 40 60 80 100 120
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
VOH [V]
Temp erature [°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
HIN=LIN=5V
IL=20mA
VCC=VBS
COM=0V
HIN=LIN=5V
IL=20mA
TA=25°C
VCC=VBS=15V
COM=0V
HIN=LIN=5V
IL=20mA
VOH [V]
VOH [V]
10 12 14 16 18 20
0.12
0.13
0.14
0.15
0.16
0.17
0.18
VOL [V]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
HIN=LIN=0V
IL=20mA
Ta=25°C
10 12 14 16 18 20
0.12
0.13
0.14
0.15
0.16
0.17
0.18
VOL [V]
Supply Voltage [V]
High-Side
Low-Side
VCC=VBS
COM=0V
HIN=LIN=0V
IL=20mA
Ta=25°C
-40 -20 0 20 40 60 80 100 120
0.10
0.12
0.14
0.16
0.18
0.20
0.22
VOL [V]
Temperature [°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
HIN=LIN=0V
IL=20mA
-40 -20 0 20 40 60 80 100 120
0.10
0.12
0.14
0.16
0.18
0.20
0.22
VOL [V]
Temperature [°C]
High-Side
Low-Side
VCC=VBS=15V
COM=0V
HIN=LIN=0V
IL=20mA
VCC=VBS
COM=0V
HIN=LIN=0V
IL=20mA
TA=25°C
VCC=VBS=15V
COM=0V
HIN=LIN=0V
IL=20mA
VOL [V]
VOL [V]
0 5 10 15 20
0
5
10
15
20
25
30
35
40
IN+/IN- [uA]
Supply Voltage [V]
IN+
IN-
VCC=VBS
COM=0V
IN=VCC or IN=0V
Ta=25°C
0 5 10 15 20
0
5
10
15
20
25
30
35
40
IN+/IN- [uA]
Supply Voltage [V]
IN+
IN-
VCC=VBS
COM=0V
IN=VCC or IN=0V
Ta=25°C
-40-200 20406080100120
4
6
8
10
12
14
16
IN+ [uA]
Temperature [°C]
HIN
LIN
HIN=LIN=5V
-40-200 20406080100120
4
6
8
10
12
14
16
IN+ [uA]
Temperature [°C]
HIN
LIN
HIN=LIN=5V
VCC=VBS
COM=0V
IN=VCC or IN=0V
TA=25°C
IN+/IN- [μA]
IN+ [μA]
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 10
FAN7382 High- and Low-Side Gate Driver
Typical Characteristics (Continued)
Figure 28. VCC UVLO Thresh o ld Voltage vs. Temp. Figure 29. V BS UVLO Threshold Voltage vs. Temp.
Figure 30. VB to COM Leakage Current vs. Temp. F igure 31. Input Logic Threshold Voltage vs. Tem p.
-40 -20 0 20 40 60 80 100 120
8.0
8.2
8.4
8.6
8.8
9.0
9.2
9.4
9.6
9.8
10.0
VCCUV+/VCCUV- [V]
Temperature [°C]
VCCUV+
VCCUV-
-40 -20 0 20 40 60 80 100 120
8.0
8.2
8.4
8.6
8.8
9.0
9.2
9.4
9.6
9.8
10.0
VCCUV+/VCCUV- [V]
Temperature [°C]
VCCUV+
VCCUV-
-40 -20 0 20 40 60 80 100 120
8.0
8.2
8.4
8.6
8.8
9.0
9.2
9.4
9.6
9.8
10.0
VBSUV+/VBSUV- [V]
Tem perature [°C]
VBSUV+
VBSUV-
-40 -20 0 20 40 60 80 100 120
8.0
8.2
8.4
8.6
8.8
9.0
9.2
9.4
9.6
9.8
10.0
VBSUV+/VBSUV- [V]
Tem perature [°C]
VBSUV+
VBSUV-
VCCUV+
VCCUV-
VSBUV+
VSBUV-
VCCUV+/VCCUV+ [V]
VSBUV+/VSBUV+ [V]
-40 -20 0 20 40 60 80 100 120
0
1
2
3
4
5
ILK [uA]
Temperature [°C]
VB-to-COM=650V
-40 -20 0 20 40 60 80 100 120
0
1
2
3
4
5
ILK [uA]
Temperature [°C]
VB-to-COM=650V
-40 -20 0 20 40 60 80 100 120
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
VIL(LIN)
VIH(HIN)
Input Logic Threshold Voltage [V]
Temperature [°C]
VIL(HIN)
VIH(LIN)
VCC=VBS=15V
COM=0V
-40 -20 0 20 40 60 80 100 120
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
VIL(LIN)
VIH(HIN)
Input Logic Threshold Voltage [V]
Temperature [°C]
VIL(HIN)
VIH(LIN)
VCC=VBS=15V
COM=0V
VB-to-COM=650V VCC=VBS=15V
COM=0V
ILK [μA]
VIH (LIN)
VIH (HIN)
VIL (HIN)
VIL (LIN)
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 11
FAN7382 High- and Low-Side Gate Driver
Typical Characteristics (Continued)
Figure 32. Switching Time Test Circuit Figure 33. Input / Output Timing Diagram
Figure 34. Switching Time Waveform Definition Figure 35. Delay Matching Waveform Definition
HO
LO
HIN
LIN
FAN7382 Rev.03
1nF
HIN
VB
HIN
COM
HO
VS
LO
1
2
LIN
VCC
5
6
8
3
4
7
100nF
15V
10uF 100nF
15V
10uF
1nF
LIN
FAN7382 Rev.05
HIN
LIN
ton
HO
LO
tr
50% 50%
10%
90% 90%
10%
toff tf
ton : Turn-on Delay Time
toff : Turn-off Delay Time
tr : Turn-on Rise Time
tf : Turn-off Fall Time
FAN7382 Rev.03
HIN
LIN
LO
50% 50%
10%
90%
HO
ton-L ton-H
MT HO
LO
toff-L
toff-H
MT
FAN7382 Rev.03
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 12
FAN7382 High- and Low-Side Gate Driver
Mechanical Dimensions
8-SOP
Dimensions are in millimeters (inches) unless otherwise noted.
Figure 36. 8-Lead Small Outline Package
September 2001, Rev B1
sop8_dim.pdf
4.92
±0.20
0.194
±0.008
0.41
±0.10
0.016
±0.004
1.27
0.050
5.72
0.225
1.55
±0.20
0.061
±0.008
0.1~0.25
0.004~0.001
6.00
±0.30
0.236
±0.012
3.95
±0.20
0.156
±0.008
0.50
±0.20
0.020
±0.008
5.13
0.202 MAX
#1
#4 #5
0~8°
#8
0.56
0.022
()
1.80
0.071
MAX0.10
MAX0.004
MAX
MIN
+
0.10
-0.05
0.15
+
0.004
-0.002
0.006
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 13
FAN7382 High- and Low-Side Gate Driver
Mechanical Dimensions (Continued)
8-DIP
Dimensions are in millimeters (inches) unless otherwise noted.
Figure 37. 8-Lead Dual In-Line Packag e
September 1999, Rev B
6.40 ±0.20
3.30 ±0.30
0.130 ±0.012
3.40 ±0.20
0.134 ±0.008
#1
#4 #5
#8
0.252 ±0.008
9.20 ±0.20
0.79
2.54
0.100
0.031
()
0.46 ±0.10
0.018 ±0.004
0.060 ±0.004
1.524 ±0.10
0.362 ±0.008
9.60
0.378 MAX
5.08
0.200
0.33
0.013
7.62
0~15°
0.300
MAX
MIN
0.25
+0.10
–0.05
0.010
+0.004
–0.002
8dip_dim.pdf
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 14
FAN7382 High- and Low-Side Gate Driver
Mechanical Dimensions (Continued)
14-SOP
Dimensions are in millimeters (inches) unless otherwise noted.
Figure 38. 14 -L ead Small Outline Package
January 2001, Rev. A
14sop225b_dim.pdf
8.56
±0.20
0.337
±0.008
1.27
0.050
5.72
0.225
1.55
±0.10
0.061
±0.004
0.05
0.002
6.00
±0.30
0.236
±0.012
3.95
±0.20
0.156
±0.008
0.60
±0.20
0.024
±0.008
8.70
0.343 MAX
#1
#7 #8
0~8°
#14
0.47
0.019
()
1.80
0.071
MAX0.10
MAX0.004
MAX
MIN
+
0.10
-0.05
0.20
+
0.004
-0.002
0.008
+
0.10
-0.05
0.406
+
0.004
-0.002
0.016
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Datasheet Identification Product Status Definition
Advance Information Formative or In Design This datasheet contains the design specifications for product
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Rev. I23
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7382 Rev. 1.0.8 15
FAN7382 High- and Low-Side Gate Driver
