This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
July 2013 DocID024585 Rev 4 1/24
24
STGIPL30C60-H
SLLIMM™ (small low-loss intelligent molded module)
IPM, 3-phase inverter, 30 A, 600 V short-circuit rugged IGBT
Datasheet
-
preliminary data
Features
•IPM 30 A, 600 V 3-phase IGBT inverter bridge
including control ICs for gate driving and free-
wheeling diodes
•Short-circuit rugged IGBTs
•V
CE(sat)
negative temperature coefficient
•3.3 V, 5 V, 15 V CMOS/TTL inputs
comparators with hysteresis and pull down/pull
up resistors
•Undervoltage lockout
•Internal bootstrap diode
•Interlocking function
•Smart shut down function
•Comparators for fault protection against
overtemperature and overcurrent
•Op amps for advanced current sensing
•DBC substrate leading to low thermal
resistance
•Isolation rating of 2500 V
rms
/min
•5 kΩ NTC for temperature control
•UL Recognized: UL1557 file E81734
Applications
•3-phase inverters for motor drives
•Home appliances, such as washing machines,
refrigerators, air conditioners and sewing
machines
Description
This intelligent power module provides a
compact, high performance AC motor drive in a
simple, rugged design. Combining ST proprietary
control ICs with the most advanced short-circuit-
rugged IGBT system technology, this device is
ideal for 3-phase inverters in applications such as
home appliances and air conditioners. SLLIMM™
is a trademark of STMicroelectronics.
AM01193v1
Table 1. Device summary
Order code Marking Package Packaging
STGIPL30C60-H GIPL30C60-H SDIP-38L Tube
www.st.com
Contents STGIPL30C60-H
2/24 DocID024585 Rev 4
Contents
1 Internal block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . 3
2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1.1 NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Waveforms definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 Smart shutdown function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.1 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DocID024585 Rev 4 3/24
STGIPL30C60-H Internal block diagra m and pin configuration
1 Internal block diagram and pin configuration
Figure 1. Internal block diagram
Internal block diagram and pin configuration STGIPL30C60-H
4/24 DocID024585 Rev 4
Table 2. Pin description
Pin Symbol Description
1OUT
U
High side reference output for U phase
2V
boot U
Bootstrap voltage for U phase
3LIN
U
Low side logic input for U phase
4HIN
U
High side logic input for U phase
5OP-
U
Op amp inverting input for U phase
6OP
OUT
U
Op amp output for U phase
7OP+
U
Op amp non inverting input for U phase
8CIN
U
Comparator input for U phase
9OUT
V
High side reference output for V phase
10 V
boot V
Bootstrap voltage for V phase
11 LIN
V
Low side logic input for V phase
12 HIN
V
High side logic input for V phase
13 OP-
V
Op amp inverting input for V phase
14 OP
OUT
V
Op amp output for V phase
15 OP+
V
Op amp non inverting input for V phase
16 CIN
V
Comparator input for V phase
17 OUT
W
High side reference output for W phase
18 V
boot W
Bootstrap voltage for W phase
19 LIN
W
Low side logic input for W phase
20 HIN
W
High side logic input for W phase
21 OP-
W
Op amp inverting input for W phase
22 OP
OUT W
Op amp output for W phase
23 OP+
W
Op amp non inverting input for W phase
24 CIN
W
Comparator input for W phase
25 V
CC
Low voltage power supply
26 SD / OD Shut down logic input (active low) / open drain (comparator output)
27 GND Ground
28 T
2
NTC thermistor terminal 2
29 T
1
NTC thermistor terminal 1
30 N
W
Negative DC input for W phase
31 W W phase output
32 P Positive DC input
33 N
V
Negative DC input for V phase
34 V V phase output
DocID024585 Rev 4 5/24
STGIPL30C60-H Internal block diagra m and pin configuration
Figure 2. Pin layout (bottom view)
35 P Positive DC input
36 N
U
Negative DC input for U phase
37 U U phase output
38 P Positive DC input
Table 2. Pin description (continued)
Pin Symbol Description
Marking area
Electrical ra tings STGIPL30C60-H
6/24 DocID024585 Rev 4
2 Electrical ratings
2.1 Absolute maximum ratings
Table 3. Inverter part
Symbol Parameter Value Unit
V
PN
Supply voltage applied between P-N
U
, N
V
, N
W
450 V
V
PN(surge)
Supply voltage (surge) applied between P-N
U
,
N
V
, N
W
500 V
V
CES
Each IGBT collector emitter voltage (V
IN(1)
= 0)
1. Applied between HIN
i
, LIN
i
and GND for i = U, V, W
600 V
± I
C
Each IGBT continuous collector current
at T
C
= 25°C 30 A
± I
CP (2)
2. Pulse width limited by max junction temperature
Each IGBT pulsed collector current 60 A
P
TOT
Each IGBT total dissipation at T
C
= 25°C 56 W
t
scw
Short circuit withstand time, V
CE
= 0.5 V
(BR)CES
T
j
= 125 °C, V
CC
= V
boot
= 15 V, V
IN (1)
= 0
÷
5 V 5μs
Table 4. Control part
Symbol Parameter Min. Max. Unit
V
OUT
Output voltage applied between
OUT
U
, OUT
V
, OUT
W
- GND V
boot
- 21 V
boot
+ 0.3 V
V
CC
Low voltage power supply - 0.3 21 V
V
CIN
Comparator input voltage - 0.3 V
CC
+ 0.3 V
V
op+
OPAMP non-inverting input - 0.3 V
CC
+ 0.3 V
V
op-
OPAMP inverting input - 0.3 V
CC
+ 0.3 V
V
boot
Bootstrap voltage - 0.3 620 V
V
IN
Logic input voltage applied between HIN, LIN and
GND - 0.3 15 V
V
SD/OD
Open drain voltage - 0.3 15 V
dV
OUT
/dt Allowed output slew rate 50 V/ns
DocID024585 Rev 4 7/24
STGIPL30C60-H Electrical ratings
2.2 Thermal data
Table 5. Total system
Symbol Parameter Value Unit
V
ISO
Isolation withstand voltage applied between each
pin and heatsink plate (AC voltage, t = 60sec.) 2500 V
T
j
Power chips operating junction temperature -40 to 150 °C
T
C
Module case operation temperature -40 to 125 °C
Table 6. Thermal data
Symbol Parameter Value Unit
R
th(j-c)
Thermal resistance junction-case single IGBT 2.2 °C/W
Thermal resistance junction-case single diode 5 °C/W
Electrical characteristics STGIPL30C60-H
8/24 DocID024585 Rev 4
3 Electrical characteristics
T
j
= 25 °C unless otherwise specified.
Note: t
on
and t
off
include the propagation delay time of the internal drive. t
C(ON)
and t
C(OFF)
are t he
switching time of IGBT itself under the internally given gate driving condition.
Table 7. Inverter part
Symbol Parameter Test condition Value Unit
Min. Typ. Max.
V
CE(sat)
Collector-emitter
saturation voltage
V
CC
= V
Boot
= 15 V, V
IN(1)
= 0 ÷ 5 V,
I
C
= 30 A -1.9
V
V
CC
= V
Boot
= 15 V, V
IN(1)
= 0 ÷ 5 V,
I
C
= 30 A, T
j
= 125 °C -2.2
I
CES
Collector-cut off current
(V
IN(1)
=0 “logic state”)
V
CE
= 550 V
V
CC
= V
boot
= 15 V - 150 μA
V
F
Diode forward voltage V
IN(1)
= 0 “logic state”, I
C
= 30 A - 2.0 2.3 V
Inductive load switching time and energy
t
on
Turn-on time
V
DD
= 300 V,
V
CC
= V
boot
= 15 V,
V
IN(1)
= 0 ÷ 5 V,
I
C
= 30 A
(see Figure 3)
-440
ns
t
c(on)
Crossover time (on) - 190
t
off
Turn-off time - 780
t
c(off)
Crossover time (off) - 135
t
rr
Reverse recovery time - 100
E
on
Turn-on switching losses - 870
μJ
E
off
Turn-off switching losses - 740
1. Applied between HIN
i
LIN
i
and GND for i = U, V, W.
DocID024585 Rev 4 9/24
STGIPL 30C6 0- H Electri cal chara c ter ist ics
Figure 3. Switching time test circuit
Figure 4 "Switching time definition" refers to HIN, LIN inputs (active high).
Figure 4. Switching time definition
AM06019v2
VCE ICIC
VIN
tON
tC(ON)
VIN(ON) 10% IC 90% IC 10% VCE
(a) turn-on (b) turn-off
trr
100% IC 100% IC
VIN
VCE
tOFF tC(OFF)
VIN(OFF) 10% VCE 10% IC
AM09223V1
Electrical characteristics STGIPL30C60-H
10/24 DocID024585 Rev 4
3.1 Control part
Table 8. Low voltage power supply (V
CC
= 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
cc_hys
V
cc
UV hysteresis 1.2 1.5 1.8 V
V
cc_thON
V
cc
UV turn ON threshold 11.5 12 12.5 V
V
cc_thOFF
V
cc
UV turn OFF threshold 10 10.5 11 V
I
qccu
Undervoltage quiescent
supply current
V
CC
= 10 V
SD/OD = 5 V; LIN = 0
HIN = 0, CIN = 0
450 μA
I
qcc
Quiescent current
V
CC
= 15 V
SD/OD = 5 V; LIN = 0
HIN = 0, CIN = 0
3.5 mA
V
ref
Internal comparator (CIN)
reference voltage 0.5 0.54 0.58 V
Table 9. Bootstrapped voltage (V
CC
= 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
BS_hys
V
BS
UV
hysteresis 1.2 1.5 1.8 V
V
BS_thON
V
BS
UV
turn ON threshold 11.1 11.5 12.1 V
V
BS_thOFF
V
BS
UV
turn OFF threshold 9.8 10 10.6 V
I
QBSU
Undervoltage V
BS
quiescent
current
V
BS
< 9 V
SD/OD = 5 V; LIN = 0 and
HIN = 5 V; CIN = 0
70 110 μA
I
QBS
V
BS
quiescent current
V
BS
= 15 V
SD/OD = 5 V; LIN = 0 and
HIN = 5 V; CIN = 0
200 300 μA
R
DS(on)
Bootstrap driver on resistance LVG ON 120 Ω
Table 10. Logic inputs (V
CC
= 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
il
Low logic level voltage 0.8 1.1 V
V
ih
High logic level voltage 1.9 2.25 V
I
HINh
HIN logic “1” input bias current HIN = 15 V 20 40 100 μA
I
HINl
HIN logic “0” input bias current HIN = 0 V 1 μA
I
LINh
LIN logic “1” input bias current LIN = 15 V 20 40 100 μA
I
LINI
LIN logic “0” input bias current LIN = 0 V 1 μA
I
SDh
SD logic “0” input bias current SD = 15 V 30 120 300 μA
I
SDl
SD logic “1” input bias current SD = 0 V 3 μA
Dt Dead time see Figure 7 1.2 μs
DocID024585 Rev 4 11/24
STGIPL 30C6 0- H Electri cal chara c ter ist ics
Table 11. OPAMP characteristics (V
CC
= 15 V unless otherwise specified)
Symbol Parameter Test condition Min. Typ. Max. Unit
V
io
Input offset voltage V
ic
= 0 V, V
o
= 7.5 V 6 mV
I
io
Input offset current V
ic
= 0 V, V
o
= 7.5 V 440nA
I
ib
Input bias current
(1)
100 200 nA
V
icm
Input common mode voltage
range 0V
V
OL
Low level output voltage R
L
= 10 kΩ to V
CC
75 150 mV
V
OH
High level output voltage R
L
= 10 kΩ to GND 14 14.7 V
I
o
Output short circuit current
Source,
V
id
= +1; V
o
= 0 V 16 30 mA
Sink,
V
id
= -1; V
o
= V
CC
50 80 mA
SR Slew rate V
i
= 1
÷
4 V; C
L
= 100 pF;
unity gain 2.5 3.8 V/μs
GBWP Gain bandwidth product V
o
= 7.5 V 8 12 MHz
A
vd
Large signal voltage gain R
L
= 2 kΩ70 85 dB
SVR Supply voltage rejection ratio vs. V
CC
60 75 dB
CMRR Common mode rejection ratio 55 70 dB
1. The direction of input current is out of the IC.
Table 12. Sense comparator characteristics (V
CC
= 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
ib(i)
Input bias current V
CIN(i)
=1 V, i= U, V o W - 3 μA
V
ol
Open-drain low-level output
voltage I
od
= 3 mA - 0.5 V
t
d_comp
Comparator delay SD/OD pulled to 5 V through
100 kΩ resistor - 90 130 ns
SR Slew rate C
L
= 180 pF; R
pu
= 5 kΩ-60 V/μsec
t
sd
Shut down to high / low side
driver propagation delay
VOUT
= 0, Vboot
= VCC
,
VIN
= 0 to 3.3 V 50 125 200
ns
t
isd
Comparator triggering to high /
low side driver turn-off
propagation delay
Measured applying a voltage
step from 0 V to 3.3 V to pin
CIN
i
50 200 250
Electrical characteristics STGIPL30C60-H
12/24 DocID024585 Rev 4
Note: X: don’t care
Table 13. Truth table
Condition Logic input (V
I
) Output
SD LIN HIN LVG HVG
Shutdown enable
half-bridge tri-state LXXLL
Interlocking
half-bridge tri-state HHHL L
0 ‘’logic state”
half-bridge tri-state HLLLL
1 “logic state”
low side direct driving HHLHL
1 “logic state”
high side direct driving HLHLH
DocID024585 Rev 4 13/24
STGIPL 30C6 0- H Electri cal chara c ter ist ics
3.1.1 NTC thermistor
Equation 1: resistance variation vs. temperature
Where T are temperatures in Kelvin.
Table 14. NTC thermistor
Symbol Parameter Test conditions Min. Typ. Max. Unit.
R
25
Resistance T
= 25°C 5 kΩ
R
125
Resistance T
= 125°C 300 Ω
B B-constant T
= 25°C to 85°C 3340 K
T Operating temperature -40 125 °C
RT() R
25
e
B1
T
--- 1
298
----------–
⋅=
Figure 5. NTC resistance vs. temperature Figure 6. NTC resistance vs. temperature zoom
0
20
40
60
80
100
NTC (kΩ)
-40 -20 020 40 60 80 100 T (°C)
AM03795v2
0
0.2
0.4
0.6
0.8
1.0
NTC (kΩ)
50 60 70 80 90 100 110 120 T (°C)
1.2
1.4
1.6
1.8
Max
Min
Typ
AM03795_2v3
Electrical characteristics STGIPL30C60-H
14/24 DocID024585 Rev 4
3.2 Waveforms definitions
Figure 7. Dead time and interlocking waveforms definitions
INTERLOCKING
INTERLOCKING
INTERLOCKING
INTERLOCKING
G
DocID024585 Rev 4 15/24
STGIPL30C60-H Smart shutdown function
4 Smart shutdown function
The STGIPL30C60-H integrates a comparator for fault sensing purposes. The comparator
has an internal voltage reference V
REF
connected to the inverting input, while the non-
inverting input, available on pin (CIN), can be connected to an external shunt resistor in
order to implement a simple over-current protection function. When the comparator triggers,
the device is set in shutdown state and both its outputs are set to low-level leading the
halfbridge in tri-state. In the common overcurrent protection architectures the comparator
output is usually connected to the shutdown input through a RC network, in order to provide
a mono-stable circuit, which implements a protection time that follows the fault condition.
Our smart shutdown architecture allows to immediately turn-off the output gate driver in
case of overcurrent, the fault signal has a preferential path which directly switches off the
outputs. The time delay between the fault and the outputs turn-off is no more dependent on
the RC values of the external network connected to the shutdown pin. At the same time the
DMOS connected to the open-drain output (pin SD/OD) is turned on by the internal logic
which holds it on until the shutdown voltage is lower than the logic input lower threshold (V
il
).
Finally, the smart shutdown function provides the possibility to increase the real disable time
without increasing the constant time of the external RC network.
Smart shutdown function STGIPL30C60-H
16/24 DocID024585 Rev 4
Figure 8. Smart shutdown timing waveforms
Please refer to Table 12 for internal propagation delay time details.
SD/OD
FROM/TO
CONTROLLER
V
BIAS
C
SD
RSD
SMART
SD
LOGIC
RON_OD
SHUT DOWN CIRCUIT
RPD_SD
An approximation of the disable time is given by:
where:
HIN/LIN
HVG/LVG
open drain gate
(internal)
comp Vref
CP+
PROTECTION
Fast shut down:
the driver outputs are set in SD state immediately after the comparator
triggering even if the SD signal has not yet reach the lower input threshold
disable time
SD/OD
AM12947v1
DocID024585 Rev 4 17/24
STGIPL30C60-H Applications information
5 Applications information
Figure 9. Typical application circuit
Applications information STGIPL30C60-H
18/24 DocID024585 Rev 4
5.1 Recommendations
•Input signals HIN, LIN are active high logic. A 375 kΩ (typ.) pull down resistor is built-in
for each input. If an external RC filter is used, for noise immunity, pay attention to the
variation of the input signal level.
•To prevent the input signals oscillation, the wiring of each input should be as short as
possible.
•By integrating an application specific type HVIC inside the module, direct coupling to
MCU terminals without any opto-coupler is possible.
•Each capacitor should be located as nearby the pins of IPM as possible.
•Low inductance shunt resistors should be used for phase leg current sensing.
•Electrolytic bus capacitors should be mounted as close to the module bus terminals as
possible. Additional high frequency ceramic capacitor mounted close to the module
pins will further improve performance.
•The SD/OD signal should be pulled up to 5 V / 3.3 V with an external resistor (see
Section 4: Smart shutdown function for detailed info).
Note: For further details refer to AN3338.
Table 15. Recommended operating conditions
Symbol Parameter Conditions Value Unit
Min. Typ. Max.
V
PN
Supply Voltage Applied between P-Nu, Nv, Nw 300 400 V
V
CC
Control supply voltage Applied between V
CC
-GND 13.5 15 18 V
V
BS
High side bias voltage Applied between V
BOOTi
-OUT
i
for
i = U, V, W 13 18 V
t
dead
Blanking time to
prevent Arm-short For each input signal 1.5 μs
f
PWM
PWM input signal -40°C < T
c
< 100°C
-40°C < T
j
< 125°C 20 kHz
T
C
Case operation
temperature 100 °C
DocID024585 Rev 4 19/24
STGIPL30C60-H Package information
6 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Please refer to dedicated technical note TN0107 for mounting instructions.
Table 16. SDIP-38L mechanical data
Dimensions mm.
Min. Typ. Max.
A 49.10 49.60 50.10
A1 1.10 1.30 1.50
A2 1.40 1.60 1.80
A3 44.10 44.60 45.10
B 24.00 24.50 25.00
B1 11.25 11.85 12.45
B2 27.10 27.60 28.10
B3 28.60 29.10 29.60
C 5.00 5.40 6.00
C1 6.50 7.00 7.50
C2 10.35 10.85 11.35
e 1.10 1.30 1.50
e1 3.20 3.40 3.60
e2 5.80 6.00 6.20
e3 4.60 4.80 5.00
e4 5.60 5.80 6.00
e5 6.30 6.50 6.70
e6 4.50 4.70 4.90
D 38.10
D1 5.75
E11.80
E1 2.15
F 0.85 1.00 1.15
F1 0.35 0.50 0.65
R 1.55 1.75 1.95
T 0.45 0.55 0.65
V0° 6°
Package information STGIPL30C60-H
20/24 DocID024585 Rev 4
Figure 10. SDIP-38L drawing dimensions
8142868_G
DocID024585 Rev 4 21/24
STGIPL30C60-H Package information
Figure 11. SDIP-38L shipping tube type A (dimensions are in mm.)
8147106_E
Package information STGIPL30C60-H
22/24 DocID024585 Rev 4
Figure 12. SDIP-38L shipping tube type B (dimensions are in mm.)
8147106_E
DocID024585 Rev 4 23/24
STGIPL30C60-H Revision history
7 Revision history
Table 17. Document revision history
Date Revision Changes
22-Apr-2013 1Initial release
09-Jul-2013 2
Updated Dt value in Table 10: Logic inputs (VCC = 15 V unless
otherwi se sp eci fie d) , t
dead
in Table 15: R e co mm en ded operating
conditions and V
F
in Table 7: Inverter part.
12-Jul-2013 3 Document status promoted from target to preliminary data.
17-Jul-2013 4 Updated features in cover page.
STGIPL30C60-H
24/24 DocID024585 Rev 4
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