SiHG120N60E
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S18-0932-Rev. A, 17-Sep-2018 1Document Number: 92113
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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E Series Power MOSFET
FEATURES
•4
th generation E series technology
• Low figure-of-merit (FOM) Ron x Qg
• Low effective capacitance (Co(er))
• Reduced switching and conduction losses
• Avalanche energy rated (UIS)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
• Server and telecom power supplies
• Switch mode power supplies (SMPS)
• Power factor correction power supplies (PFC)
• Lighting
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Industrial
- Welding
- Induction heating
- Motor drives
- Battery chargers
- Solar (PV inverters)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 120 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 2.5 A
c. 1.6 mm from case
d. ISD ID, di/dt = 100 A/μs, starting TJ = 25 °C
PRODUCT SUMMARY
VDS (V) at TJ max. 650
RDS(on) typ. () at 25 °C VGS = 10 V 0.104
Qg max. (nC) 45
Qgs (nC) 10
Qgd (nC) 12
Configuration Single
N-Channel MOSFET
G
D
S
TO-247AC
G
D
S
ORDERING INFORMATION
Package TO-247AC
Lead (Pb)-free and halogen-free SiHG120N60E-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 600 V
Gate-source voltage VGS ± 30
Continuous drain current (TJ = 150 °C) VGS at 10 V TC = 25 °C ID
25
ATC = 100 °C 16
Pulsed drain current a IDM 66
Linear derating factor 1.4 W/°C
Single pulse avalanche energy b EAS 88 mJ
Maximum power dissipation PD179 W
Operating junction and storage temperature range TJ, Tstg -55 to +150 °C
Drain-source voltage slope TJ = 125 °C dv/dt 70 V/ns
Reverse diode dv/dt d50
Soldering recommendations (peak temperature) c For 10 s 260 °C
SiHG120N60E
www.vishay.com Vishay Siliconix
S18-0932-Rev. A, 17-Sep-2018 2Document Number: 92113
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA -62
°C/W
Maximum junction-to-case (drain) RthJC -0.7
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 600 - - V
VDS temperature coefficient VDS/TJReference to 25 °C, ID = 1 mA - 0.67 - V/°C
Gate-source threshold voltage (N) VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V
Gate-source leakage IGSS
VGS = ± 20 V - - ± 100 nA
VGS = ± 30 V - - ± 1 μA
Zero gate voltage drain current IDSS
VDS = 600 V, VGS = 0 V - - 1 μA
VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 10
Drain-source on-state resistance RDS(on) VGS = 10 V ID = 12 A - 0.104 0.120
Forward transconductance agfs VDS = 20 V, ID = 12 A - 6 - S
Dynamic
Input capacitance Ciss VGS = 0 V,
VDS = 100 V,
f = 1 MHz
- 1562 -
pF
Output capacitance Coss -72-
Reverse transfer capacitance Crss -6-
Effective output capacitance, energy
related a Co(er)
VDS = 0 V to 480 V, VGS = 0 V
-56-
Effective output capacitance, time
related b Co(tr) - 357 -
Total gate charge Qg
VGS = 10 V ID = 12 A, VDS = 480 V
-3045
nC Gate-source charge Qgs -10-
Gate-drain charge Qgd -12-
Turn-on delay time td(on)
VDD = 480 V, ID = 12 A,
VGS = 10 V, Rg = 9.1
-1938
ns
Rise time tr-65130
Turn-off delay time td(off) -3162
Fall time tf-3366
Gate input resistance Rgf = 1 MHz, open drain 0.3 0.65 1.3
Drain-Source Body Diode Characteristics
Continuous source-drain diode current ISMOSFET symbol
showing the
integral reverse
p - n junction diode
--25
A
Pulsed diode forward current ISM --66
Diode forward voltage VSD TJ = 25 °C, IS = 12 A, VGS = 0 V - - 1.2 V
Reverse recovery time trr TJ = 25 °C, IF = IS = 12 A,
di/dt = 100 A/μs, VR = 400 V
- 322 870 ns
Reverse recovery charge Qrr - 4.9 18.4 μC
Reverse recovery current IRRM -29-A
S
D
G
SiHG120N60E
www.vishay.com Vishay Siliconix
S18-0932-Rev. A, 17-Sep-2018 3Document Number: 92113
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 2 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Coss and Eoss vs. VDS
0
20
40
60
80
0 5 10 15 20
ID, Drain-to-Source Current (A)
VDS, Drain-to-Source Voltage (V)
TJ= 25 °C
TOP 15 V
14 V
13 V
12 V
11 V
10 V
9 V
8 V
7 V
6 V
BOTTOM 5 V
0
12
24
36
48
0 5 10 15 20
ID, Drain-to-Source Current (A)
VDS, Drain-to-Source Voltage (V)
TJ= 150 °C
TOP 15 V
14 V
13 V
12 V
11 V
10 V
9 V
8 V
7 V
6 V
BOTTOM 5 V
0
20
40
60
80
0 5 10 15 20
ID, Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
TJ= 150 °C
TJ= 25 °C
VDS= 27.9 V
0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
RDS(on), Drain-to-Source On-Resistance
(Normalized)
TJ, Junction Temperature (°C)
ID= 12 A
VGS = 10 V
1
10
100
1000
10 000
100 000
0 100200300400500600
C, Capacitance (pF)
VDS, Drain-to-Source Voltage (V)
Ciss
Coss
Crss
VGS = 0 V, f = 1 MHz
Ciss = Cgs+ Cgd, Cdsshorted
Crss = Cgd
Coss = Cds+ Cgd
0
2
4
6
8
10
12
10
100
1000
10 000
0 100 200 300 400 500 600
Coss
Eoss
Eoss, Output Capacitance Stored Energy (μJ)
Coss, Output Capacitance (pF)
VDS, Drain-to-Source Voltage (V)
SiHG120N60E
www.vishay.com Vishay Siliconix
S18-0932-Rev. A, 17-Sep-2018 4Document Number: 92113
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Fig. 9 - Maximum Safe Operating Area
Fig. 10 - Maximum Drain Current vs. Case Temperature
Fig. 11 - Temperature vs. Drain-to-Source Voltage
0
3
6
9
12
0 10203040
VGS, Gate-to-Source Voltage (V)
Qg, Total Gate Charge (nC)
VDS= 480 V
VDS= 300 V
VDS= 120 V
0.1
1
10
100
0.2 0.4 0.6 0.8 1.0 1.2 1.4
ISD, Reverse Drain Current (A)
VSD, Source-Drain Voltage (V)
TJ= 150 °C TJ= 25 °C
VGS = 0 V
0.01
0.1
1
10
100
1000
1101001000
ID, Drain Current (A)
VDS, Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specied
Limited by RDS(on)*
1 ms
I
DM
limited
TC= 25 °C
TJ= 150 °C
single pulse
BVDSS limited
10 ms
100 μs
Operation in this area
limited by RDS(on)
0
4
8
12
16
20
24
28
25 50 75 100 125 150
ID, Drain Current (A)
TC, Case Temperature (°C)
575
600
625
650
675
700
725
750
-60 -40 -20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Breakdown Voltage (V)
TJ, Junction Temperature (°C)
ID= 250 μA
SiHG120N60E
www.vishay.com Vishay Siliconix
S18-0932-Rev. A, 17-Sep-2018 5Document Number: 92113
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 12 - Normalized Transient Thermal Impedance, Junction-to-Case
Fig. 13 - Switching Time Test Circuit
Fig. 14 - Switching Time Waveforms
Fig. 15 - Unclamped Inductive Test Circuit
Fig. 16 - Unclamped Inductive Waveforms
Fig. 17 - Basic Gate Charge Waveform
Fig. 18 - Gate Charge Test Circuit
0.01
0.1
1
0.0001 0.001 0.01 0.1 1
Normalized Effective Transient
Thermal Impedance
Pulse Time (s)
Duty cycle = 0.5
0.2
0.1
0.05
0.02
Single pulse
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
RD
VGS
Rg
D.U.T.
10 V
+
-
VDS
VDD
Rg
IAS
0.01 Ω
tp
D.U.T.
L
VDS
+
-VDD
10 V
Vary tp to obtain
required IAS
IAS
VDS
VDD
VDS
tp
QgsQgd
Qg
VG
Charge
10 V
D.U.T.
3 mA
VGS
VDS
IGID
0.3 μF
0.2 μF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
SiHG120N60E
www.vishay.com Vishay Siliconix
S18-0932-Rev. A, 17-Sep-2018 6Document Number: 92113
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 19 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?92113.
P.W. Period
di/dt
Diode recovery
dv/dt
Ripple ≤ 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
VGS = 10 V a
VDD
ISD
Driver gate drive
D.U.T. ISD waveform
D.U.T. VDSwaveform
Inductor current
D = P.W.
Period
+
-
+
+
+
-
-
-
Note
a. VGS = 5 V for logic level devices
Peak Diode Recovery dv/dt Test Circuit
VDD
• dv/dt controlled by Rg
• Driver same type as D.U.T.
• ISD controlled by duty factor “D”
• D.U.T. - device under test
D.U.T. Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
Rg
2
1
2
1
3
4
4
3
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Revision: 08-Feb-17 1Document Number: 91000
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