TC74VHC4051,4052,4053AF/FT/FK
2014-03-01
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TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC4051AF, TC74VHC4051AFT, TC74VHC4051AFK
TC74VHC4052AF, TC74VHC4052AFT, TC74VHC4052AFK
TC74VHC4053AF, TC74VHC4053AFT, TC74VHC4053AFK
TC74VHC4051AF/AFT/AFK
8-Channel Analog Multiplexer/Demultiplexer
TC74VHC4052AF/AFT/AFK
Dual 4-Channel Analog Multiplexer/Demultiplexer
TC74V4053AF/AFT/AFK
Triple 2-Channel Analog Multiplexer/Demultiplexer
The TC74VHC4051A/4052A/4053A are high-speed, low-voltage
drive analog multiplexer/demultiplexers using silicon gate CMOS
technology. In 3 V and 5 V systems these can achieve high-speed
operation with the low power dissipation that is a feature of
CMOS.
The TC74VHC4051A/4052A/4053A offer analog/digital signal
selection as well as mixed signals. The 4051A has an 8-channel
configuration, the 4052A has an 4-channel × 2 configuration, and
the 4053A has a 2-channel × 3 configuration.
The switches for each channel are turned ON by the control pin
digital signals.
All control inputs are equipped with a newly developed input
protection circuit that avoids the need for a diode on the plus side
(forward side from the input to the VCC). As a result, for example,
5.5 V signals can be permitted on the inputs even when the
power supply voltage to the circuits is off. As a result of this input
power protection, the TC74VHC4051A/4052A/4053A can be used
in a variety of applications, including in the system which has
two power supplies, and in battery backup circuits.
Features
• Low ON-resistance: Ron = 45 Ω (typ.) (VCC = 3 V)
R
on = 24 Ω (typ.) (VCC = 4.5 V)
• Low power dissipation: ICC = 2.0 μA (max) (Ta = 25°C)
• Input level: VIL = 0.8 V (max) (VCC = 3 V)
V
IH = 2.0 V (min) (VCC = 3 V)
• Power down protection is provided on all control inputs
TC74VHC4051AF, TC74VHC4052AF,
TC74VHC4053AF
TC74VHC4051AFT, TC74VHC4052AFT,
TC74VHC4053AFT
TC74VHC4051AFK, TC74VHC4052AFK,
TC74VHC4053AFK
SOP16-P-300-1.27A : 0.18 g ( typ.)
TSSOP16-P-0044-0.65A : 0.06 g ( typ.)
VSSOP16-P-0030-0.50 : 0.02 g ( typ.)
Start of commercial production
2007-01
TC74VHC4051,4052,4053AF/FT/FK
2014-03-01
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Pin Assignment (top view)
Truth Table
Control Inputs “ON” Channel
Inhibit C* B A VHC4051A VHC4052A VHC4053A
L L L L 0 0X, 0Y 0X, 0Y, 0Z
L L L H 1 1X, 1Y 1X, 0Y, 0Z
L L H L 2 2X, 2Y 0X, 1Y, 0Z
L L H H 3 3X, 3Y 1X, 1Y, 0Z
L H L L 4 ⎯ 0X, 0Y, 1Z
L H L H 5 ⎯ 1X, 0Y, 1Z
L H H L 6 ⎯ 0X, 1Y, 1Z
L H H H 7 ⎯ 1X, 1Y, 1Z
H X X X None None None
X: Don't care, *: Except VHC4052A
1 14
0
3
A
B
C
13
12
11
10
9
15
4 1
2
3
4
5
6
7
6
COM
7
5
INH
GND
2
8
16
GND
VCC
TC74VHC4051A
1X 14
X-COM
0X
3X
A
B
13
12
11
10
9
15
0Y 1
2
3
4
5
6
7
2Y
Y-COM
3Y
1Y
INH
GND
8
16
GND
VCC
TC74VHC4052A
X-COM14
1X
0X
A
B
C
13
12
11
10
9
15
1Y 1
2
3
4
5
6
7
0Y
1Z
Z-COM
0Z
INH
GND
Y-COM
8
16
GND
VCC
TC74VHC4053A
2X
TC74VHC4051,4052,4053AF/FT/FK
2014-03-01
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System Diagram
TC74VHC4051A
TC74VHC4052A
TC74VHC4053A
A
B
C
INH
COM
0
1
2
3
4
5
6
7
C
I/O O/I
C
I/O O/I
A
B
INH
X-COM
0X
1X
2X
3X
0Y
1Y
2Y
3Y
C
I/O O/I
Y-COM
C
I/O O/I
A
B
INH
X-COM
0X
1X
0Y
1Y
0Z
1Z
C
I/O O/I
Z-COM
Y-COM
C
C
I/O O/I
TC74VHC4051,4052,4053AF/FT/FK
2014-03-01
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Absolute Maximum Ratings (Note)
Characteristics Symbol Rating Unit
Power supply voltage VCC −0.5 to 7.0 V
Control input voltage VIN −0.5 to 7.0 V
Switch I/O voltage VI/O − 0.5 to VCC + 0.5 V
Input diode current IIK −20 mA
I/O diode current IIOK ±25 mA
Switch through current IT ±25 mA
DC VCC or ground current ICC ±50 mA
Power dissipation PD 180 mW
Storage temperature Tstg −65 to 150 °C
Note : Exceeding any of the absolute maximum ratings, even briefly, may lead to deterioration in IC performance
or even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Operating Ranges (Note)
Characteristics Symbol Rating Unit
Power supply voltage VCC 2 to 5.5 V
Input voltage VIN 0 to 5.5 V
Switch I/O voltage VI/O 0 to VCC V
Operating temperature Topr −40 to 85 °C
0 to 200 (VCC = 2.5 ± 0.2 V)
0 to 100 (VCC = 3.3 ± 0.3 V)
Input rise and fall time dt/dv
0 to 20 (VCC = 5 ± 0.5 V)
ns/V
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused control inputs must be tied to either VCC or GND.
TC74VHC4051,4052,4053AF/FT/FK
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Electrical Characteristics
DC Electrical Characteristics
Ta = 25°C Ta = −40 to 85°C
Characteristics Symbol Test Condition
VCC (V) Min Typ. Max Min Max
Unit
2.0 1.5 ⎯ ⎯ 1.5 ⎯
3.0 2.0 ⎯ ⎯ 2.0 ⎯
4.5 3.15
⎯ ⎯ 3.15 ⎯
High-level VIH ⎯
5.5 3.85 ⎯ ⎯ 3.85 ⎯
2.0 ⎯ ⎯ 0.5 ⎯ 0.5
3.0 ⎯ ⎯ 0.8 ⎯ 0.8
4.5 ⎯ ⎯ 1.35 ⎯ 1.35
Input voltage
Low-level VIL ⎯
5.5 ⎯ ⎯ 1.65 ⎯ 1.65
V
2.3 ⎯ 200 ⎯ ⎯ ⎯
3.0 ⎯ 45 86 ⎯ 108
VIN = VIL or VIH
VI/O = VCC to GND
II/O = 2 mA 4.5 ⎯ 24 37 ⎯ 46
2.3 ⎯ 28 73 ⎯ 84
3.0 ⎯ 22 38 ⎯ 44
ON resistance RON
VIN = VIL or VIH
VI/O = VCC or GND
II/O = 2 mA 4.5 ⎯ 17 27 ⎯ 31
Ω
2.3 ⎯ 10 25 ⎯ 35
3.0 ⎯ 5 15 ⎯ 20
Difference of ON
resistance between
switches
ΔRON
VIN = VIL or VIH
VI/O = VCC to GND
II/O = 2 mA 4.5 ⎯ 5 13 ⎯ 18
Ω
Input/Output leakage
current
(switch OFF)
IOFF
VOS = VCC or GND
VIS = GND to VCC
VIN = VIL or VIH
5.5 ⎯ ⎯ ±0.1 ⎯ ±1.0 μA
Input/Output leakage
current
(switch ON, output open)
II/O VOS = VCC or GND
VIN = VIL or VIH 5.5 ⎯ ⎯ ±0.1 ⎯ ±1.0 μA
Control input current IIN V
IN = VCC or GND 5.5 ⎯ ⎯ ±0.1 ⎯ ±1.0 μA
Quiescent supply current ICC V
IN = VCC or GND 5.5 ⎯ ⎯ 2.0 ⎯ 20.0 μA
TC74VHC4051,4052,4053AF/FT/FK
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AC Electrical Characteristics (Input: tr = tf = 3 ns)
Ta = 25°C Ta = −40 to 85°C
Characteristics Symbol Test Condition
VCC (V) Min Typ. Max Min Max
Unit
2.5±0.2 ⎯ 1.2 10 ⎯ 16
3.3±0.3 ⎯ 0.8 6 ⎯ 10
CL = 15 pF
RL = 1 kΩ
5.0±0.5 ⎯ 0.3 4 ⎯ 7
2.5±0.2 ⎯ 2.6 12 ⎯ 18
3.3±0.3 ⎯ 1.5 9 ⎯ 12
Phase difference
between input and output φI/O
CL = 50 pF
RL = 1 kΩ
5.0±0.5 ⎯ 0.6 6 ⎯ 8
ns
2.5±0.2 ⎯ 3.3 15 ⎯ 20
3.3±0.3 ⎯ 2.3 11 ⎯ 15
CL = 15 pF
RL = 1 kΩ Figure 1
5.0±0.5 ⎯ 1.6 7 ⎯ 10
2.5±0.2 ⎯ 4.2 25 ⎯ 32
3.3±0.3 ⎯ 3.0 18 ⎯ 22
Output enable time tpZL
tpZH
CL = 50 pF
RL = 1 kΩ Figure 1
5.0±0.5 ⎯ 2.1 12 ⎯ 16
ns
2.5±0.2 ⎯ 6 15 ⎯ 23
3.3±0.3 ⎯ 4.5 11 ⎯ 15
CL = 15 pF
RL = 1 kΩ Figure 1
5.0±0.5 ⎯ 3.2 7 ⎯ 10
2.5±0.2 ⎯ 9.6 25 ⎯ 32
3.3±0.3 ⎯ 7.2 18 ⎯ 22
Output disable time tpLZ
tpHZ
CL = 50 pF
RL = 1 kΩ Figure 1
5.0±0.5 ⎯ 5.1 12 ⎯ 16
ns
Control input capacitance CIN All types ⎯ ⎯ 2 ⎯ ⎯ 10 pF
4051A 23.4
4052A 13.1
COMMON terminal
capacitance CIS
4053A
Figure 2 ⎯ ⎯
8.2
⎯ ⎯ ⎯ pF
4051A 5.7
4052A 5.6
SWITCH terminal
capacitance COS
4053A
Figure 2 ⎯ ⎯
5.6
⎯ ⎯ ⎯ pF
4051A 0.5
4052A 0.5
Feedthrough capacitance CIOS
4053A
Figure 2 ⎯ ⎯
0.5
⎯ ⎯ ⎯ pF
4051A 15
4052A 24
Power dissipation
capacitance CPD
4053A
Figure 2 (Note) ⎯ ⎯
12
⎯ ⎯ ⎯ pF
Note: CPD is defined as the value of the internal equivalent capacitance of IC which is calculated from the
operating current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr) = CPD･VCC･fIN + ICC
TC74VHC4051,4052,4053AF/FT/FK
2014-03-01
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Analog Switch Characteristics (Ta = 25°C) (Note)
Characteristics Test Condition
VCC (V)
Typ. Unit
VIN = 2.0 Vp-p 3.0 0.1
Sine Wave Distortion (T.H.D) RL = 10 kΩ, CL = 50 pF, fIN = 1 kHz
VIN = 4.0 Vp-p 4.5 0.03
%
4051A 150
4052A 200
4053A
3.0
240
4051A 180
4052A 230
Frequency response
(switch ON)
VIN is centered at (VCC/2).
Adjust input for 0dBm.
Increase fIN frequency until dB meter
reads −3dB.
RL = 50 Ω, CL = 10 pF,sine wave
Figure 3 4053A
4.5
280
MHz
3.0 -45
VIN is centered at (VCC/2).
Adjust input for 0dBm.
RL = 600 Ω, CL = 50 pF, fIN = 1 MHz, sine wave
Figure 4 4.5 -45
3.0 -65
Feed through attenuation
(switch OFF)
RL = 50 Ω, CL = 10 pF, fIN = 1 MHz, sine wave
4.5 -65
dB
3.0 60
Crosstalk
(control input to signal output)
RL = 600 Ω, CL = 50 pF, fIN = 1 MHz, square wave
(tr = tf = 6 ns)
Figure 5 4.5 100
mV
3.0 -45
Crosstalk
(between any switches)
VIN is centered at (VCC/2). Adjust input for 0dBm.
RL = 600 Ω, CL = 50 pF, fIN = 1 MHz, sine wave
Figure 6 4.5 -45
dB
Note: These characteristics are determined by design of devices.
Switch pin
Common pin
TC74VHC4051,4052,4053AF/FT/FK
2014-03-01
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AC Test Circuit
CIOS
CVCC
I/O O/I
GND
(Common pin)
VCC
(Switch pin)
CIS
COS
Figure 2 CIOS, CIS, COS
Figure 1 tpLZ, tpHZ, tpZL, tpZH
3 ns
90%
10%
50%
3 ns
VCC
GND
VC
50%
VOH
VOL
50%
tpZH
90%
10%
tpHZ
tpLZ
tpZL
VOH
VOL
VO/I
(S1 = VCC, S2 = GND)
VO/I
(S1 = GND, S2 = VCC)
VCC
C
VCC
I/O O/I S2
S1
GND
from
P.G
50 pF
1 kΩ
Figure 3 Frequency Response
(switch on)
VIN
CVCC
I/O O/I
GND
10 pF
50 Ω
VCC
1/2VCC
Figure 4 Feedthrough
VIN
CVCC
I/O O/I
GND
CL
RL
VCC
RL
1/2VCC
TC74VHC4051,4052,4053AF/FT/FK
2014-03-01
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Figure 5 Cross Talk
(control input to output signal)
CVCC
I/O O/I
GND
50 pF
600 Ω
VCC
from P.G
600 Ω
VCC
GND
1/2VCC 1/2VCC
Figure 6 Cross Talk
(between any two switches)
C
VCC
I/O O/I
GND
50 pF
600 Ω
VIN C
I/O O/I
50 pF
600 Ω
600 Ω
VCC
VCC
600 Ω
1/2VCC
1/2VCC
1/2VCC
TC74VHC4051,4052,4053AF/FT/FK
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Package Dimensions
Weight: 0.18 g (typ.)
TC74VHC4051,4052,4053AF/FT/FK
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Package Dimensions
Weight: 0.06 g (typ.)
TC74VHC4051,4052,4053AF/FT/FK
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Package Dimensions
Weight: 0.02 g (typ.)
TC74VHC4051,4052,4053AF/FT/FK
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
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TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR
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MAY CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
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