IDT54/74FCT16827AT/BT/CT/ET FAST CMOS 20-BIT BUFFER MILITARY AND COMMERCIAL TEMPERATURE RANGES FAST CMOS 20-BIT BUFFER DESCRIPTION: FEATURES: - - - - - - - - - - - IDT54/74FCT16827AT/BT/CT/ET 0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1 A (max.) ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch CERPACK packages Extended commercial range of -40C to +85C VCC = 5V 10% High drive outputs (-32mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25C The FCT16827AT/BT/CT/ET 20-bit buffers are built using advanced dual metal CMOS technology. These 20-bit bus drivers provide highperformance bus interface buffering for wide data/address paths or buses carrying parity. Two pair of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16827AT/BT/CT/ET are ideally suited for driving high capacitance loads and low impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. FUNCTIONAL BLOCK DIAGRAM 1 28 1O E 1 2O E 1 56 1O E 2 29 2O E 2 2 55 1A 1 42 1Y 1 15 2A 1 TO NINE O TH ER C H AN N ELS 2Y 1 TO NINE O TH ER C H AN N ELS MILITARY AND COMMERCIAL TEMPERATURE RANGES AUGUST 1999 1 c 1999 Integrated Device Technology, Inc. DSC-5439/- IDT54/74FCT16827AT/BT/CT/ET FAST CMOS 20-BIT BUFFER MILITARY AND COMMERCIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION 1 56 1 OE 2 1Y 1 2 55 1A 1 1Y 2 3 54 1A 2 GND 4 53 GND 1Y 3 5 52 1A 3 1Y 4 6 51 1A 4 V CC 7 50 V CC 1Y 5 8 49 1A 5 1Y 6 9 48 1A 6 1Y 7 10 47 1A 7 GND 11 46 GND 1Y 8 12 45 1A 8 1Y 9 13 44 1A 9 1 Y 10 14 43 1 A 10 2Y 1 15 42 2A 1 2Y 2 16 1 OE 1 SO56-1 SO56-2 SO56-3 E56-1 41 Symbol VTERM(2) Description Terminal Voltage with Respect to GND Max -0.5 to +7 VTERM(3) Terminal Voltage with Respect to GND -0.5 to VCC+0.5 V TSTG Storage Temperature -65 to +150 C IOUT DC Output Current -60 to +120 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXXT Output and I/O terminals. 3. Output and I/O terminals for FCT162XXXT. CAPACITANCE (TA = +25OC, f = 1.0MHz) Symbol CIN Parameter(1) Input Capacitance Conditions VIN = 0V Typ. 3.5 Max. 6 COUT Output Capacitance VOUT = 0V 3.5 8 NOTE: 1. This parameter is measured at characterization but not tested. 2A 2 18 39 GND 19 38 2A 4 2Y 5 20 37 2A 5 2Y 6 21 36 2A 6 xAx Data Inputs V CC 22 35 V CC xYx 3-State Outputs 2Y 7 23 34 2A 7 2Y 8 24 33 2A 8 GND 25 32 GND 2Y 4 2A 3 2Y 9 26 31 2A 9 2 Y 10 27 30 2 A 10 2 OE 1 28 29 2 OE 2 Unit pF pF 5v16-link 40 GND mA 5v16-link 17 2Y 3 Unit V PIN DESCRIPTION Pin Names xOEx Description Output Enable Inputs (Active LOW) FUNCTION TABLE(1) SSOP/ TSSOP/ TVSOP/ CERPACK TOP VIEW xOE1 Inputs xOE2 xAx Outputs xYx L L L L L L H H H X X Z X H X Z NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance 2 IDT54/74FCT16827AT/BT/CT/ET FAST CMOS 20-BIT BUFFER MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = -40C to +85C, VCC = 5.0V 10%; Military: TA = -55C to +125C, VCC = 5.0V 10% Symbol VIH Parameter Input HIGH Level Test Conditions(1) Guaranteed Logic HIGH Level VIL Input LOW Level Guaranteed Logic LOW Level IIH Input HIGH Current (Input pins)(5) VCC = Max. VI = VCC Input HIGH Current (I/O pins)(5) IIL Input LOW Current (Input pins)(5) VI = GND Input LOW Current (I/O pins)(5) VCC = Max. VO = 2.7V Min. 2 Typ.(2) -- Max. -- Unit V -- -- 0.8 V -- -- 1 A -- -- 1 -- -- 1 -- -- 1 -- -- 1 IOZH High Impedance Output Current IOZL (3-State Output pins)(5) -- -- 1 VIK Clamp Diode Voltage VCC = Min., IIN = -18mA -- -0.7 -1.2 V IOS Short Circuit Current VCC = Max., VO = GND(3) -80 -140 -250 mA VH Input Hysteresis -- 100 -- mV ICCL ICCH ICCZ Quiescent Power Supply Current -- 5 500 A VO = 0.5V -- VCC = Max. VIN = GND or VCC A 5v16-link OUTPUT DRIVE CHARACTERISTICS Symbol IO Parameter Output Drive Current VOH Output HIGH Voltage Test Conditions(1) VCC = Max., VO = 2.5V(3) Min. -50 Typ.(2) -- Max. -180 Unit mA V CC = Min. IOH = -3mA 2.5 3.5 -- V VIN = VIH or VIL IOH = -12mA MIL. 2.4 3.5 -- V 2 3 -- V -- 0.2 0.55 V -- -- 1 A IOH = -15mA COM'L. IOH = -24mA MIL. IOH = -32mA COM'L.(4) VOL Output LOW Voltage IOFF Input/Output Power Off Leakage(5) V CC = Min. IOH = 48mA MIL. VIN = VIH or VIL IOH = 64mA COM'L V CC = 0V, VIN or VO 4.5V NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. The test limit for this parameter is 5A at TA = -55C. 3 IDT54/74FCT16827AT/BT/CT/ET FAST CMOS 20-BIT BUFFER MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) IC Total Power Supply Current(6) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open xOE1 = xOE2 = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fi = 10MHz 50% Duty Cycle xOE1 = xOE2 = GND One Bit Toggling VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle xOE1 = xOE2 = GND Twenty Bits Toggling Min. -- Typ.(2) 0.5 Max. 1.5 Unit mA VIN = VCC VIN = GND -- 60 100 A/ MHz VIN = VCC VIN = GND -- 0.6 1.5 mA VIN = 3.4V VIN = GND -- 0.9 2.3 VIN = VCC VIN = GND -- 3 5.5(5) VIN = 3.4V VIN = GND -- 8 20.5(5) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 4 IDT54/74FCT16827AT/BT/CT/ET FAST CMOS 20-BIT BUFFER MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE FCT16827AT Com'l. Symbol Parameter tPLH Propagation Delay xAx to xYx tPHL tPZH tPZL tPHZ tPLZ tSK(o) Output Enable Time xOEx to xYx Output Disable Time xOEx to xYx Condition(1) CL = 50pF RL = 500 CL = 300pF(4) RL = 500 CL = 50pF RL = 500 CL = 300pF(4) RL = 500 CL = 5pF(4) RL = 500 CL = 50pF RL = 500 Output Skew(3) FCT16827BT Mil. Com'l. Max. 8 Min.(2) 1.5 Max. 9 Min.(2) 1.5 Max. 5 Min.(2) 1.5 Max. 6.5 1.5 15 1.5 17 1.5 13 1.5 14 1.5 12 1.5 13 1.5 8 1.5 9 1.5 23 1.5 25 1.5 15 1.5 16 1.5 9 1.5 9 1.5 6 1.5 7 1.5 10 1.5 10 1.5 7 1.5 8 -- 0.5 -- 0.5 -- 0.5 -- 0.5 ns Max. -- Unit ns FCT16827CT Com'l. Symbol Parameter tPLH Propagation Delay xAx to xYx tPHL tPZH tPZL tPHZ tPLZ tSK(o) Output Enable Time xOEx to xYx Output Disable Time xOEx to xYx Output Skew(3) Condition(1) CL = 50pF RL = 500 CL = 300pF(4) RL = 500 CL = 50pF RL = 500 CL = 300pF(4) RL = 500 CL = 5pF(4) RL = 500 CL = 50pF RL = 500 Mil. Min.(2) 1.5 (2) Com'l. (2) ns Mil. (2) Min. 1.5 Max. 4.4 Min. 1.5 Max. 5 Min. 1.5 Max. 3.2 1.5 10 1.5 11 1.5 7 -- -- 1.5 7 1.5 8 1.5 4.8 -- -- 1.5 14 1.5 15 1.5 9 -- -- 1.5 5.7 1.5 6.7 1.5 4 -- -- 1.5 6 1.5 7 1.5 4 -- -- -- 0.5 -- 0.5 -- 0.5 -- -- Min. -- NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 4. This condition is guaranteed but not tested. 5 ns FCT16827ET Mil. (2) Unit ns ns ns ns IDT54/74FCT16827AT/BT/CT/ET FAST CMOS 20-BIT BUFFER MILITARY AND COMMERCIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS Test V CC 7.0V Open Drain Disable Low 500 All Other Tests D.U.T. T C DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 500 L SET-UP, HOLD, AND RELEASE TIMES DATA INPUT tH tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONT ROL PRESET CLEAR CLOCK ENABLE ETC. tRE M tSU Open 5v16-link 50pF R Closed Enable Low V OU T V IN Pulse Generator Switch PULSE WIDTH 3V 1.5V 0V 3V 1.5V 0V LOW -HIGH-LOW PULSE 1.5V tW 3V 1.5V 0V HIGH-LOW -HIGH PULSE 1.5V 3V 1.5V 0V tH ENABLE AND DISABLE TIMES PROPAGATION DELAY ENABLE SAM E PHASE INPUT TRANSITION t PLH tPH L OUTPUT t PLH OPPOSITE PHASE INPUT TRANSITION tPH L 3V 1.5V 0V DISABLE 3V CONTROL INPUT 1.5V tPZL V OH 1.5V V OL OUTPUT NORMALLY LOW 3V 1.5V 0V SW ITCH CLOSED SW ITCH OPEN 3.5V 3.5V 1.5V 0.3V t PZH OUTPUT NORMALLY HIGH 0V t PLZ V OL t PH Z 0.3V V OH 1.5V 0V 0V NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 6 IDT54/74FCT16827AT/BT/CT/ET FAST CMOS 20-BIT BUFFER MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION IDT XX Temp. Range FCT XX XXXX X X Family Device Type Package Process Blank B C om m ercial M IL-STD-883, Class B PV PA PF E Shrink Sm all Outline Package (SO56-1) Thin Shrink Sm all O utline Package (SO56-2) Thin Very Sm all O utline Package (SO56-3) CERPACK (E56-1) 827AT 827BT 827CT 827ET 20-Bit Buffer 16 54 74 CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 Double-Density 5 Volt High Drive - 55C to +125C - 40C to +85C for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com* *To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. The IDT logo is a registered trademark of Integrated Device Technology, Inc. 7