Semiconductor Components Industries, LLC, 2004
March, 2004 − Rev. 3 1Publication Order Number:
SRDA05−4R2/D
SRDA05−4R2
Low Capacitance Surface
Mount TVS for High−Speed
Data Interfaces
The SRDA05−4 transient voltage suppressor is designed to protect
equipment attached to high speed communication lines from ESD,
EFT, and lightning.
Features:
•SO−8 Package
•Peak Power − 500 Watts 8 x 20 S
•ESD Rating:
IEC 61000−4−2 (ESD) 15 kV (air) 8 kV (contact)
IEC 61000−4−4 (EFT) 40 A (5/50 ns)
IEC 61000−4−5 (lightning) 23 (8/20 s)
•UL Flammability Rating of 94V−0
Typical Applications:
•High Speed Communication Line Protection
MAXIMUM RATINGS
Rating Symbol Value Unit
Peak Power Dissipation
8 x 20 S @ TA = 25°C (Note 1) Ppk 500 W
Junction and Storage
Temperature Range TJ, Tstg −55 to
+150 °C
Lead Solder Temperature −
Maximum 10 Seconds Duration TL260 °C
1. Non−repetitive current pulse 8 x 20 S exponential decay waveform
SO−8 LOW CAPACITANCE
VOLTAGE SUPPRESSOR
500 WATTS PEAK POWER
6 VOLTS
SRDA5= Device Code
L = Location Code
Y = Year
WW = Work Week
MARKING DIAGRAM
Device Package Shipping†
ORDERING INFORMATION
SRDA05−4R2 SO−8 2500/Tape & Reel
SRDA5
LYWW
SO−8
CASE 751
PLASTIC
PIN CONFIGURATION
AND SCHEMATIC
I/O 1 1
REF 1 2
REF 1 3
I/O 2 4
8 REF 2
7 I/O 4
6 I/O 3
5 REF 2
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1
8
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
SRDA05−4R2
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2
ELECTRICAL CHARACTERISTICS
Characteristic Symbol Min Typ Max Unit
Reverse Breakdown Voltage @ It = 1.0 mA VBR 6.0 − − V
Reverse Leakage Current @ VRWN = 5.0 Volts IRN/A − 10 A
Maximum Clamping Voltage @ IPP = 1.0 A, 8 x 20 S VCN/A − 9.8 V
Maximum Clamping Voltage @ IPP = 10 A, 8 x 20 S VCN/A − 12 V
Between I/O Pins and Ground @ VR = 0 Volts, 1.0 MHz Capacitance − 10 15 pF
Between I/O Pins @ VR = 0 Volts, 1.0 MHz Capacitance − 5 8 pF
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
UNIDIRECTIONAL (Circuit tied to Pins 1 and 3 or 2 and 3)
Symbol Parameter
IPP Maximum Reverse Peak Pulse Current
VCClamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IRMaximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
ITTest Current
VBR Maximum Temperature Coefficient of VBR
IFForward Current
VFForward Voltage @ IF
ZZT Maximum Zener Impedance @ IZT
IZK Reverse Current
ZZK Maximum Zener Impedance @ IZK
Uni−Directional TVS
IPP
IF
V
I
IR
IT
VRWM
VCVBR VF
SRDA05−4R2
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3
TYPICAL CHARACTERISTICS
−100 0
9
Figure 1. Reverse Breakdown versus
Temperature
−50 T, TEMPERATURE (°C)
100 200
4
1
0
Figure 2. Reverse Leakage versus
Temperature
VZ, REVERSE BREAKDOWN (V)
8
7
6
5
4
3
2
1
0−100 −50 50 100
T, TEMPERATURE (°C)
200
50 150
2
3
8
5
6
7
0 150
IR, REVERSE LEAKAGE (A)
Figure 3. 8 × 20 s Pulse Waveform
100
90
80
70
60
50
40
30
20
10
00204060
t, TIME (s)
% OF PEAK PULSE CURRENT
tP
tr
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 s
PEAK VALUE IRSM @ 8 s
HALF VALUE IRSM/2 @ 20 s
80
Figure 4. Clamping Voltage versus Peak Pulse
Current
35
30
25
20
15
10
5
00204060
IPP, PEAK PULSE CURRENT (A)
80
VC, CLAMPING VOLTAGE (V)
10 30 50 70 90
SRDA05−4R2
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4
PACKAGE DIMENSIONS
SO−8
CASE 751−07
ISSUE AB
SEATING
PLANE
1
4
58
N
J
X 45
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDAARD IS 751−07
A
BS
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
−X−
−Y−
G
M
Y
M
0.25 (0.010)
−Z−
Y
M
0.25 (0.010) Z SXS
M
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
0.6
0.024 1.270
0.050
4.0
0.155
mm
inches
SCALE 6:1
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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SRDA05−4R2/D
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