PE4250MLI - Peregrine Semiconductor Corp.

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The PE4250 is a HaRP™-enhanced Reflective SPDT (single

pole double throw) RF Switch for use in general switching

applications and mobile infrastructure. This device offers a

flexible supply voltage of 3.3/5V, single-pin or complementary

pin control inputs, and 4000 V ESD tolerance. It presents a

simple alternative solution to pin diode and mechanical relay

switches.

Peregrine’s HaRP™ technology enhancements deliver high

linearity and exceptional performance. It is an innovative

feature of the UltraCMOS™ process, providing performance

superior to GaAs with the economy and integration of

conventional CMOS.

Product Specification

SPDT UltraCMOS™ RF Switch

10 – 3000 MHz, Reflective

Product Description

Figure 1. Functional Diagram

PE4250

Features

• HaRP-Technology Enhanced

• Low Insertion Loss: 0.65 dB @ 1000 MHz

• High Isolation: 51 dB @ 1000 MHz

• P1dB typical: +30.5 dBm

• IIP3 typical: +59 dBm

• Fast switching time: 150 ns

• Flexible supply voltage: 3.3 V ±10% or 5.0

V ±10% supply (see table 3)

• Excellent ESD protection: 4000 V HBM

• No blocking capacitors required

• Single pin or complementary control inputs

Figure 2. Package Type

8-lead MSOP

Table 1. Target Electrical Specifications Temp = 25°C, VDD = 3.3 or 5.0 V

Parameter Conditions Min Typical Max Units

Operation Frequency1 10 3000 MHz

Insertion Loss (RF1/RF2)

10 MHz 0.6 0.65 dB

1000 MHz 0.65 0.70 dB

2000 MHz 0.75 0.80 dB

3000 MHz 0.75 0.90 dB

Isolation (RFC to RF1/RF2) 1000 MHz 50 51 dB

2000 MHz 46 48 dB

3000 MHz 35 40 dB

Return Loss 1000 MHz 25 dB

2000 MHz 23 dB

3000 MHz 20 dB

Input 1 dB Compression2 50 - 3000 MHz 30.5 dBm

Input IP3 50 - 3000 MHz, +18 dBm per tone , 5 MHz spacing 59 dBm

Switching Time 50% CTRL to 10/90% RF 150 300 ns

RF1 RF2

V1

RFC

CMOS

Control

Driver

ESD ESD

ESD

V2

Notes: 1. Device linearity will begin to degrade below 10 MHz.

2. Note Absolute Maximum rating of PIN = 27 dBm.

Product Specification

PE4250

Page 2 of 9

Table 2. Pin Descriptions

Table 4. Absolute Maximum Ratings

Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS™ device, observe

the same precautions that you would use with

other ESD-sensitive devices. Although this device

contains circuitry to protect it from damage due to

ESD, precautions should be taken to avoid

exceeding the specified rating.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS™

devices are immune to latch-up.

Table 3. Operating Ranges

Note 3. All RF pins must be DC blocked with an external

series capacitor or held at 0 VDC.

Figure 3. Pin Configuration (Top View)

No. Pin Name Description

1 V2

This pin supports two interface options:

Single-pin control mode. A nominal 3-volt

or 5-volt supply connection is required.

Complementary-pin control mode. A

complementary CMOS control signal

to V1 is supplied to this pin.

2 V1 Switch control input, CMOS logic level.

3 RFC RF Common port.3

4 N/C or GND No Connect or Ground

5 RF13 RF1 port.3

6 GND

Ground Connection. Traces should be

physically short and connected to ground

plane for best performance.

7 GND

Ground Connection. Traces should be

physically short and connected to ground

plane for best performance.

8 RF23 RF2 port.3

Exceeding absolute maximum ratings may cause

permanent damage. Operation should be

restricted to the limits in the Operating Ranges

table. Operation between operating range

maximum and absolute maximum for extended

periods may reduce reliability.

Parameter Min Typ Max Units

VDD Power Supply Voltage4 3.0

4.5 3.3

5.0 3.6

5.5 V

V

IDD Power Supply Current

VDD = VCNTL= 3.3V

VDD = VCNTL= 5.0V

55

75

60

80

µA

Control Voltage High 0.8 x VDD V

Control Voltage Low 0.2 x VDD V

PIN RF Input Power (50Ω) 27 dBm

TOP Operating temperature

range -40 25 85 °C

TST Storage temperature range -65 25 150 °C

Note 4. Customer must choose either 3.3 V or 5.0 V power

supply range

Symbol Parameter/Conditions Min Max Units

VDD Power supply voltage 3 5.5 V

VI Voltage on any control input -0.3 5.5 V

TST Storage temperature range -65 150 °C

PIN RF Input power (50Ω) 27 dBm

VESD ESD voltage (HBM)5

ESD voltage (Machine Model) 4000

250 V

4250

1

2

3

4

8

7

6

5

V2

V1

RFC

N/C or

GND

RF2

GND

RF1

Switching Frequency

The PE4250 has a maximum 25 kHz switching rate.

Moisture Sensitivity Level

The Moisture Sensitivity Level rating for the PE4250

in the 8-lead MSOP package is MSL1.

Note: 5. Human Body Model (HBM, MIL_STD 883 Method 3015.7)

Product Specification

PE4250

Page 3 of 9

Control Logic Input

The PE4250 is a versatile RF CMOS switch that

supports two operating control modes; single-pin

control mode and complementary-pin control

mode.

Single-pin control mode enables the switch to

operate with a single control pin (pin 2) supporting

a +3.3 or 5.0-volt CMOS logic input, and requires

a dedicated +3.3 or 5.0-volt power supply

connection (pin 1). This mode of operation

reduces the number of control lines required and

simplifies the switch control interface typically

derived from a CMOS µProcessor I/O port.

Complementary-pin control mode allows the

switch to operate using complementary control

pins V1 and V2 (pins 2 & 1), that can be directly

driven by +3.3 or 5.0-volt CMOS logic or a suitable

µProcessor I/O port. This enables the PE4250 to

operate in positive control voltage mode within the

PE4250 operating limits.

Control Voltages Signal Path

Pin 1 (V2) = VDD

Pin 2 (V1) = High RFC to RF1

Pin 1 (V2) = VDD

Pin 2 (V1) = Low RFC to RF2

Table 5. Single-pin Control Logic Truth Table

Table 6. Complementary-pin Control Logic

Truth Table

Control Voltages Signal Path

Pin 1 (V2 ) = Low

Pin 2 (V1) = High RFC to RF1

Pin 1 (V2) = High

Pin 2 (V1) = Low RFC to RF2

Product Specification

PE4250

Page 4 of 9

Evaluation Kit

The SPDT Switch Evaluation Kit board was

designed to ease customer evaluation of the

PE4250 SPDT switch. The RF common port is

connected through a 50 Ω transmission line to the

bottom SMA connector, J3. Port 1 and Port 2 are

connected through 50 Ω transmission lines to two

SMA connectors on either side of the board, J4 and

J2. A through transmission line connects SMA

connectors J5 and J6. This transmission line can be

used to estimate the loss of the PCB over the

environmental conditions being evaluated.

The board is constructed of a two metal layer FR4

material with a total thickness of 0.0322”. The

bottom layer provides ground for the RF

transmission lines. The transmission lines were

designed using a coplanar waveguide with ground

plane model using a trace width of 0.033”, trace

gaps of 0.010”, dielectric thickness of 0.028”, copper

thickness of 0.0021” and εr of 4.3.

J1 provides a means for controlling the DC inputs to

the device. The second-to-bottom lower right pin

(J1-3) is connected to the device V1 input. The

second-to-top upper right pin (J1-7) is connected to

the device V2 input. Footprints for decoupling

capacitors are provided on both V1 and V2 traces. It

is the responsibility of the customer to determine

proper supply decoupling for their design application.

Removing these components from the evaluation

board has not been shown to degrade RF

performance.

Figure 4. Evaluation Board Layouts

Figure 5. Evaluation Board Schematic

Peregrine specification 102/0408

Peregrine specification 101/0337

NOTES:

4.3 Er AND 2.1MIL Cu

THICKNESS.

3. ALL TRANSMISION LINES ARE:

33MIL WIDTH, 10MIL GAPS, 28MIL CORE DIELECTRIC

TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD)

2. CAUTION:

1. USE 101-0337-02 PCB.

CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE

or GND

R1

DNI

C2

100pF

1

2

J3

SMASM

1

2

J4

SMASM

1

2

J5

SMASM

1

2

J2

SMASM

C1

100pF

1

2

J6

SMASM

2V1

1V2

3RFC 6

GNDS1

7

GNDS2

8

RF2

4N/C 5

RF1

U1

MSOP

1

13

35

57

7

22

44

66

88

10 10 9

9

J1

HEADER 2 X 5 PIN

R2

0 OHM

R3

0 OHM

Product Specification

PE4250

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Figure 9. Isolation: RFC-RF @ 3.3 V Figure 8. Isolation: RFC-RF @ 25 °C

Figure 6. Insertion Loss: RFC-RF @ 25 °C Figure 7. Insertion Loss: RFC-RF @ 3.3 V

Product Specification

PE4250

Page 6 of 9

Figure 10. Return Loss at active port @ 25 °C Figure 11. Return Loss at active port @ 3.3 V

Product Specification

PE4250

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8-lead MSOP: 19-0118-01

Figure 12. Package Drawing

Figure 13. Top Marking Specification

4250

LLLL

YWW

AAAA: Product Number, last 4 digits, Exp.

LLLL: Last four digits of the Assembly lot number

YWW: Date Code, last digit of the year and work week

Product Specification

PE4250

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8-lead MSOP

Table 7. Ordering Information

Figure 14. Tape and Reel Specifications

Order Code Part Marking Description Package Shipping Method

EK4250-01 PE4250-EK PE4250-08MSOP-EK Evaluation Kit 1 / Box

PE4250MLI 4250 PE4250G-08MSOP-cut tape or loose Green 8-lead MSOP Cut tape or loose

PE4250MLI-Z 4250 PE4250G-08MSOP-2000C Green 8-lead MSOP 2000 units / T&R

Dimension MSOP-8

Ao 5.30 ± 0.1

Bo 3.40 ± 0.1

Ko 1.40 ± 0.1

F 5.50 ± 0.05

W 12 ± 0.3

P1 8 ± 0.1

Table 7. Dimensions

Device Orientation in Tape

Top of

Device

Pin 1

Tape Feed Direction

Product Specification

PE4250

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Sales Offices

The Americas

Peregrine Semiconductor Corporation

9380 Carroll Park Drive

San Diego, CA 92121

Tel: 858-731-9400

Fax: 858-731-9499

Europe

Peregrine Semiconductor Europe

Bâtiment Maine

13-15 rue des Quatre Vents

F-92380 Garches, France

Tel: +33-1-4741-9173

Fax : +33-1-4741-9173

For a list of representatives in your area, please refer to our Web site at: www.psemi.com

Data Sheet Identification

Advance Information

The product is in a formative or design stage. The data

sheet contains design target specifications for product

development. Specifications and features may change in

any manner without notice.

Preliminary Specification

The data sheet contains preli m inary data. Additional data

may be added at a later date. Peregrine reserves the right

to change specifications at any time without notice in order

to supply the best possible product.

Product Specification

The data sheet contains final data. In the event Peregrine

decides to change the specifications, Peregrine will notify

customers of the intended changes by issuing a CNF

(Customer Notification Form).

The information in this data sheet is beli eved to be reliable.

However, Peregrine assumes no li ability for the use of this

information. Use shall be entirely at the user ’s own risk.

No patent rights or licenses to any circuits describe d in this

data sheet are implied or gran ted to any third party.

Peregrine’s products are not designed or intended for use in

devices or systems intended for surgical implant, or in other

applications intended to supp ort or sustain life, or in any

application in which the failure of the Peregrine product could

create a situation in which personal injury or death might occur.

Peregrine assumes no li ability for damages, including

consequential or incidental da mages, arising out of the use of

its products in such applications.

The Peregrine name, logo, and UTSi are registered trademarks

and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks

of Peregrine Semiconductor Corp.

High-Reliability and Defense Products

Americas

San Diego, CA, USA

Phone: 858-731-9475

Fax: 848-731-9499

Europe/Asia-Pacific

Aix-En-Provence Cedex 3, France

Phone: +33-4-4239-3361

Fax: +33-4-4239-7227

Peregrine Semiconductor, Asia Pacific (APAC)

Shanghai, 200040, P.R. China

Tel: +86-21-5836-8276

Fax: +86-21-5836-7652

Peregrine Semiconductor, Korea

#B-2607, Kolon Tripolis, 210

Geumgok-dong, Bundang- gu, Seongnam-si

Gyeonggi-do, 463-943 South Korea

Tel: +82-31-728-3939

Fax: +82-31-728-3940

Peregrine Semiconductor K.K., Japan

Teikoku Hotel Tower 10B-6

1-1-1 Uchisaiwai-cho, Chiyoda-ku

Tokyo 100-0011 Japan

Tel: +81-3-3502-5211

Fax: +81-3-3502-5213