REVISIONS
LTR DESCRIPTION DATE (YR-MO-DA) APPROVED
B
Remove one vendor – FSCM - 04713. Editorial changes throughout. 84-03-22
Monica L. Poelking
C
Table I: Remove minimum ac limits and chan
g
e tPHL and tPLH limits. 84-05-14 Monica L. Poelking
D
Add vendor CAGE 34371. Remove vendor CAGE 07263. Technical changes
in 1.3, 1.4, and table I. Change to military drawing format. Change drawing
CAGE code to 67268. Add device t
y
pe 02. Editorial chan
g
es throu
g
hout
90-03-26 Monica L. Poelking
E
Changes in accordance with NOR 5962-R107-92. 92-01-10 Monica L. Poelking
F
Redrawn with changes. Add device type 03. Technical changes to table I.
Update boilerplate. Editorial chan
g
es throu
g
hout. 94-01-13 Monica L. Poelking
G
Changes in accordance with NOR 5962-R151-94.
–
LTG 94-04-20 Monica L. Poelking
H
Incorporate revision G. Update boilerplate to MIL-PRF-38535 requirements.
Editorial chan
g
es throu
g
hout.
–
LTG 03-08-19 Thomas M. Hess
J
Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535
requirements.
–
LTG 05-01-14 Thomas M. Hess
K
Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. -
LTG 11-06-22 David J. Corbett
CURRENT CAGE CODE 67268
REV
SHEET
REV
SHEET
REV STATUS REV K K K K K K K K K K K K K
OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13
PMIC N/A PREPARED BY
Marcia B. Kelleher DLA LAND AND MARITIME
COLUMBUS, OHIO 4321 8-3990
http://www.dscc.dla.mil
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
CHECKED BY
Thomas J. Ricciuti
APPROVED BY
Monica L. Poelking MICROCIRCUIT, DIGITAL, CMOS, DIFFERENTIAL
4-CHANNEL ANALOG MULTIPLEXER/
DEMULTIPLEXER, MONOLITHIC SILICON
DRAWING APPROVAL DATE
79-05-15
REVISION LEVEL
K
SIZE
A CAGE CODE
14933
79015
SHEET 1 OF 13
DSCC FORM 2233
APR 97 5962-E375-11
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 2
DSCC FORM 2234
APR 97
1. SCOPE
1.1 Scope. This drawing describes device requireme nts for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
79015 01 E A
Drawing number Device type
(see 1.2.1) Case outline
(see 1.2.2) Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function
01 4052B Differential 4-channel ana log multiplexer/demultipl exer
02 4052B Differential 4-channel ana log multiplexer/demultipl exer
03 14052B Differential 4-channel analog multiplexer/demultipl exer
1.2.2 Case outline(s). The case outline(s) are as desi gn ated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style
E GDIP1-T16 or CDIP2-T16 16 Dual-in-line
F GDFP2-F16 or CDFP3-F16 16 Flat pack
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings. 1/
Supply voltage range (VDD):
Device types 01 and 03 .................................................... -0.5 V dc to +18 V dc 2/
Device type 02 .................................................................. -0.5 V dc to +20 V dc 2/
Input voltage range .............................................................. -0.5 V dc to VDD + 0.5 V dc
DC input current ................................................................... 10 mA
Storage temperature range .................................................. -65C to +150C
Maximum power dissipation (PD) ......................................... 500 mW 3/
Lead temperature (soldering, 10 seconds) ........................... +300C
Thermal resistance, junction-to-case (JC) ........................... See MIL-STD-1835
Junction temperature (TJ) ..................................................... +175C
1.4 Recommended operating conditions.
Supply voltage range (VDD):
Device types 01 and 03 .................................................... +3.0 V dc to +15 V dc
Device type 02 .................................................................. +3.0 V dc to +18 V dc
Case operating temperature rang e (TC) ............................... -55C to +125C
1/ Stresses above the absolute maximum rating may cause permanent dam age to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ Voltages referenced to the VSS terminal.
3/ For TC = +100C to +125C, derate linearly at 12 mW/C to 200 mW.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 3
DSCC FORM 2234
APR 97
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and han dbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-385 35 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents ar e available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue , Building 4D, Philadelphia, P A 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item r equirements shall be in accordance with MIL-PRF-38535, appendix A for non-
JAN class level B devices and as specified h erein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified man ufacturer or a manufacturer who has been gr anted transitional certification to
MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and
qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management
(QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the
device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with
MIL-PRF-38535 is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.
3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 4
DSCC FORM 2234
APR 97
3.3 Electrical performance characteristics . Unless otherwise specified her ein, the electri c al performance characteristics are
as specified in table I and shall apply over the full case operating temper ature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in tabl e I.
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendi x A. The part shall be marked with the PIN
listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-BUL-103 (see 6.6 herein).
3.5.1 Certification/compliance mark. A compliance indicat or “C” shall be marked on all non-JAN devices built in compliance
to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and
Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the
requirements of MIL-PRF-38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as require d in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits deliver ed to this drawing.
3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that
affects this drawing.
3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the optio n of the reviewer.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 5
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristi c s.
Test Symbol Test conditions
-55C TC +125C
unless otherwise specified
Group A
subgroups Device
type Limits Unit
Min Max
Quiescent supply current IDD V
DD = 5 V 1/
VIN = 0.0 V or VDD 1, 3 All 5.0 A
2 150
VDD = 10 V 1/
VIN = 0.0 V or VDD 1, 3 All 10.0
2 300
VDD = 15 V 1/
VIN = 0.0 V or VDD 1, 3 All 20.0
2 600
VDD = 20 V 2/
VIN = 0.0 V or VDD 1, 3 02 100
2 3000
Low level input voltage VIL V
DD = 5 V, VEE = VSS
RL = 1 k to VSS
IIS < 2 A on all off channels
1, 2, 3 All 1.5 V
VDD = 10 V
RL = 1 k to VSS 3/
IIS < 2 A on all off channels
1, 2, 3 All 3.0
VDD = 15 V
RL = 1 k to VSS
IIS < 2 A on all off channels
1, 2, 3 All 4.0
High level input voltage VIH V
DD = 5 V
RL = 1 k to VSS
IIS < 2 A on all off channels
1, 2, 3 All 3.5 V
VDD = 10 V
RL = 1 k to VSS 3/
IIS < 2 A on all off channels
1, 2, 3 All 7.0
VDD = 15 V
RL = 1 k to VSS
IIS < 2 A on all off channels
1, 2, 3 All 11.0
Input current IIN VDD = 15 V
VIN = 0.0 V or VDD 1, 3 01, 03 0.1 A
2
1.0
VDD = 20 V
VIN = 0.0 V or VDD 2/ 1, 3 02 0.1
2
1.0
Input capacitance CIN V
IN = 0.0 V
TC = +25C
See 4.3.1c
4 All 7.5 pF
Functional test See 4.3.1d 7 All
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 6
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristi c s - Continued.
Test Symbol Test conditions
-55C TC +125C
unless otherwise specified
Group A
subgroups Device
type Limits Unit
Min Max
On-state resistance RON V
DD = 5.0 V 1 01 2500
2 3500
3 2000
1 02, 03 1050
2 1300
3 800
VDD = 10 V 1 01 500
2 660
3 340
1 02 400
2 550
3 310
1 03 500
2 550
3 400
VDD = 15 V 1 01 280
2 400
3 220
1 02 240
2 320
3 200
1 03 280
2 320
3 220
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 7
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristi c s - Continued.
Test Symbol Test conditions
-55C TC +125C
unless otherwise specified
Group A
subgroups Device
type Limits Unit
Min Max
Propagation delay
time, signal input to
output
tPHL1,
tPLH1 RL = 200 k
CL = 50 pF
tr = tf = 20 ns
See figure 4
5/
VDD = 5 V 9 01 60 ns
10, 11 90
9 02 4/ 1.5 60
10, 11 1.5 90
9 03 75
10, 11 3/ 112.5
VDD = 10 V 9 01 35
10, 11 3/ 50
9 02 4/ 1.5 30
10, 11 1.5 45
9 03 3/ 35
10, 11 50
VDD = 15 V 9 01 3/ 25
10, 11 35
9 02 4/ 1.5 20
10, 11 1.5 30
9 03
3/ 25
10, 11 37.5
Propagation delay
time, address to
signal output
tPHL2,
tPLH2 RL = 10 k
CL = 50 pF
tr = tf = 20 ns
See figure 4
VDD = 5 V 9 01 1000 ns
10, 11 1400
9 02 1.5 720
10, 11 1.5 1080
9 03 650
10, 11 3/ 975
VDD = 10 V 9 01 360
10, 11 505
9 02 3/ 1.5 320
10, 11 1.5 480
9 03 3/ 260
10, 11 390
VDD = 15 V 9 01 3/ 240
10, 11 335
9 02 3/ 1.5 240
10, 11 1.5 360
9 03 3/ 180
10, 11 270
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 8
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristi c s - Continued.
Test Symbol Test conditions
-55C TC +125C
unless otherwise specified
Group A
subgroups Device
type Limits Unit
Min Max
Propagation delay
time, inhibit to
signal out (channel
turning ON)
tPZH,
tPZL RL = 10 k
CL = 50 pF
tr = tf = 20 ns
See figure 4
VDD = 5 V 9 01 1200 ns
10, 11 1800
9 02 1.5 720
10, 11 1.5 1080
9 03 600
10, 11 3/ 900
VDD = 10 V 9 01 450
10, 11 630
9 02 3/ 1.5 320
10, 11 1.5 480
9 03 3/ 310
10, 11 465
VDD = 15 V 9 01 3/ 320
10, 11 450
9 02 3/ 1.5 240
10, 11 1.5 360
9 03 3/ 250
10, 11 375
Propagation delay time,
inhibit to signal out
(channel turning OFF)
tPHZ,
tPLZ RL = 1 k
CL = 50 pF
tr = tf = 20 ns
See figure 4
5/
VDD = 5 V 9 01 420 ns
10, 11 630
9 02 1.5 450
10, 11 1.5 675
9 03 600
10, 11 3/ 900
VDD = 10 V 9 01 200
10, 11 280
9 02 3/ 1.5 210
10, 11 1.5 315
9 03 3/ 310
10, 11 465
VDD = 15 V 9 01 3/ 150
10, 11 210
9 02 3/ 1.5 160
10, 11 1.5 240
9 03 3/ 250
10, 11 375
See footnotes on next page.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 9
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristi c s - Continued.
1/ Guaranteed, if not tested, to the specified limits, for device type 02.
2/ This test is performed at VDD = 18 V at -55C.
3/ Guaranteed, if not tested, to the specified limits.
4/ Guaranteed by RON test as specified in table I.
5/ For device type 03, RL = 10 k.
Device types 01, 02, and 03
Case outlines E and F
Terminal number Terminal symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Y0
Y2
Y
Y3
Y1
INHIBIT
VEE
VSS
B
A
X3
X0
X
X1
X2
VDD
FIGURE 1. Terminal connections.
Inhibit Select On switches
B A
L
L
L
L
H
L
L
H
H
X
L
H
L
H
X
Y0
Y1
Y2
Y3
None
X0
X1
X2
X3
None
H = High voltage level
L = Low voltage level
X = Irrelevant
FIGURE 2. Truth table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 10
DSCC FORM 2234
APR 97
FIGURE 3. Logic diagram.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 11
DSCC FORM 2234
APR 97
FIGURE 4. Switching waveforms and test circuits.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 12
DSCC FORM 2234
APR 97
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection pr ocedures shall be in accorda nce with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall b e in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a. Burn-in test, method 1 01 5 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1015 of MIL-STD-883.
(2) TA = +125C, minimum.
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
TABLE II. Electrical test requirements.
MIL-STD-883 test requirements Subgroups
(in accordance with
MIL-STD-883, method 5005,
table I)
Interim electrical parameters
(method 5004) ----
Final electrical test parameters
(method 5004) 1*, 2, 3, 7, 9
Group A test requirements
(method 5005) 1, 2, 3, 4, 7, 9, 10**, 11**
Groups C and D end-point
electrical parameters
(method 5005)
1, 2, 3
* PDA applies to subgroup 1.
** Subgroups 10 and 11, if not tested, shall be guaranteed to the
specified limits in table I.
4.3 Quality conformance ins pection. Quality conformance inspection shall be in accordance with method 5005 of
MIL-STD-883 including groups A, B, C, and D inspections. The following additional criter ia shall apply.
4.3.1 Group A inspection.
a. T ests shall be as specified in table II herein.
b. Subgroups 5, 6, and 8 in table I, method 5005 of MIL-STD-883 shall be omitted.
c. Subgroup 4 (C IN measurement) shall be measured only for the initial test a nd after process or design changes which
may affect input capacitance. Test all applicable p ins o n five devices with zero failures.
d. Subgroup 7 tests shall include verification of the truth table as specified in figure 2 herein.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
79015
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
K SHEET 13
DSCC FORM 2234
APR 97
4.3.2 Groups C and D inspections.
a. End-point electrical parameters shall be as specified in table II herein.
b. Steady-state life test conditions, method 1005 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be ma de available to the preparing or acquiring activity upon request. T he test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordanc e with the intent specified in
method 1005 of MIL-STD-883.
(2) TA = +125C, minimum.
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
5. PACKAGING
5.1 Packaging requirements. The requir ements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
6. NOTES
6.1 Intended use. Microcircuits conforming t o this drawing are intended for use for Government microcircuit applications
(original equipment), desig n applications, and logistics purposes.
6.2 Replaceability. Microcirc uits covered by this drawing will replace the same generic device covered by a contractor-
prepared specification or drawing.
6.3 Configuration control of SMD's. All proposed chan ges to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.4 Record of users. Military and industrial users shall inform DLA Land and Maritime when a system application requires
configuration control and the applicable SMD to that system. DLA Land and Maritime will maintain a record of users and this
list will be used for coordination and distribution of cha nges to the drawings. Users of drawings covering microelectronics
devices (FSC 5962) should c ontact DLA Land and Maritime -VA, telephone (61 4) 69 2-0544.
6.5 Comments. Comments on this drawing should be directed to DLA Land and Maritime -VA, Columbus, Ohio 43218-
3990, or telephone (614) 692-0540.
6.6 Approved sources of supply. Approved sources of suppl y are listed in MIL-HDBK-10 3. The vendors listed in MIL-
HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and acc epted by
DLA Land and Maritime -VA.
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 11-06-22
Approved sources of suppl y for SMD 79015 are listed below for immediate acquisition information o nly and shall be
added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to
include the addition or deletion of sources. The ven dors listed below have agreed to this drawing and a certificate of
compliance has been submitted to an d accepted by DLA Land and Maritime -VA. This information bulletin is
superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an
online database of all current sources of suppl y at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
7901501EA 0C7V7 CD4052BMJ/883
7901501FA 0C7V7 CD4052BMW/883
7901502EA 01295 CD4052BF3A
7901503EA 3/ 14052B/BEAJC
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number m ay not
satisfy the performance requirements of this drawing.
3/ Not available from an approved source of supply.
Vendor CAGE Vendor name
number and address
01295 Texas Instruments Inc.
Semiconductor Group
8505 Forest Ln.
P.O. Box 660199
Dallas, TX 75243
Point of contact: U.S. Highway 75 South
P.O. Box 84, M/S 853
Sherman, TX 75090-9493
0C7V7 QP Semiconductor
2945 Oakmead Village Court
Santa Clara, CA 95051
The information contained herein is disseminated for conveni ence only and the
Government assumes no liability whatsoeve r for any inaccuracies in the
information bulletin.
