REV. 1.2, JUL. 01, 2004
1
P/N: PM0825
MX23L1651
16M-BIT [16M x 1] CMOS SERIAL MASK-ROM
GENERAL
• 16,777,216 x 1 bit structure
• Single Power Supply Operation
- 3.0 to 3.6 volt for read operations
• Latch-up protected to 100mA from -1V to Vcc +1V
PERFORMANCE
• High Performance
- Fast access time: 20MHz serial clock (50pF + 1TTL
Load)
• Low Power Consumption
- Low active read current: 10mA (typical) at 20MHz
- Low standby current: 30uA (CMOS)
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code, 3-byte address, 1-byte byte
address
HARDWARE FEATURES
• SCLK Input
- Serial clock input
• SI Input
- Serial Data Input
• SO Output
- Serial Data Output
• PACKAGE
- 28-pin SOP (330mil)
FEATURES
GENERAL DESCRIPTION
The MX23L1651 is a CMOS 16,777,216 bit serial Mask
ROM, which is configured as 2,097,152 x 8 internally. The
MX23L1651 features a serial peripheral interface and
software protocol allowing operation on a simple 3- wire
bus. The three bus signals are a clock input (SCLK), a
serial data input (SI), and a serial data output (SO). Serial
peripheral interface access to the device is enabled by CS
input.
The MX23L1651 provide sequential read operation on the
whole chip.
When the device is not in operation and CS is high, it is put
in standby mode and draws less than 30uA DC current.
PIN CONFIGURATIONS
SYMBOL DESCRIPTION
CS Chip Select
SI Serial Data Input
SO Serial Data Output
SCLK Clock Input
V C C + 3.3V Power Supply
GND Ground
NC No Internal Connection
PIN DESCRIPTION
28-PIN SOP (330 mil)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
GND
VCC
NC
NC
NC
SI
SO
CS
SCLK
NC
NC
NC
NC
MX23L1651
* 6MHz for Die Form only
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
BLOCK DIAGRAM
Address
Generator Memory Array
(4096 x 4096)
Page Buffer
Y-Decoder
X-Decoder
Data
Register
SI
CS
SCLK Clock Generator
Mode
Logic
Sense
Amplifier Output
Buffer
SO
Part No. Access Time Package Remark
MX23L1651MC-50G 50ns 28 pin SOP Pb-free
MX23L1651HC-15 150ns Die
ORDER INFORMATION
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
COMMAND DEFINITION
Command Read Array (byte)
1st 52H
2nd AD1
3rd AD2
4th AD3
5th BA
6th X
7th X
8th X
9th X
Action n bytes read out until CS goes high
1-byte command code
Bit7(MSB) Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
3-byte address(0 to 0FFFH)
AD1: X X X X A20 A19 A18 A17
AD2: A16 A15 A14 A13 A12 A11 A10 A9
AD3: X X X X X X A8 A7
1-byte byte address(0 to 7FH)
BA: XA6A5A4 A3A2 A1 A0
Note:
1.X is dummy cycle and is necessary
2.AD1 to AD3 are address input data
3.BA is byte address
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
DEVICE OPERATION
1.When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until
next CS falling edge. In standby mode, SO pin of this LSI should be High-Z.
2.When correct command is inputted to this LSI, this LSI becomes active mode and keeps the active mode until next CSB
rising edge.
COMMAND DESCRIPTION
(1) Read Array
This command is sent with the 4-byte address (command included), and the byte address, followed by four dummy bytes
sent to give the device time to stabilize. The device will then send out data starting at the byte address until CS goes
high. The clock to clock out the data is supplied by the master serial interface. The read operation is executed on a segment
(512 bytes) basis. If the end of the segment is reached then the device will wrap around to the beginning of the segment.
(2) Standby Mode
When CS is high and there is no operation in progress, the device is put in standby mode. Typical standby current is less
than 30uA.
ADDRESS SEQUENCE
The address assignment is described as follows :
BA: Byte address Bit sequence: X A6 A5 A4 A3 A2 A1 A0
AD1:First Address Bit sequence: X X X X A 20 A 19 A 18 A 17
AD2:Second Address Bit sequence: A1 6 A1 5 A1 4 A1 3 A12 A11 A10 A9
AD3:Thrid Address Bit sequence: X X X X X X A8 A7
DATA SEQUENCE
Output data is serially sent out through SO pin, synchronized with the rising edge of SCLK, whereas input data is serially
read in through SI pin, synchronized with the rising edge of SCLK. The bit sequence for both input and output data is bit
7 (MSB) first, then bit 6, bit 5, ...., and bit 0.(LSB)
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
NOTICE:
1.Stresses greater than those listed under ABSOLUTE
MAXIMUM RATINGS may cause permanent damage to the
device. This is stress rating only and functional operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended period may
affect reliability.
2.Specifications contained within the following tables are
subject to change.
3.During voltage transitions, all pins may overshoot to 4.6V or
-0.5V for period up to 20ns.
4.All input and output pins may overshoot to VCC+0.5V while
VCC+0.5V is smaller than or equal to 4.6V.
RATING VALUE
Ambient Operating Temperature 0°C to 70°C
Storage Temperature -55°C to 125°C
Applied Input Voltage -0.5V to 4.6V
Applied Output Voltage -0.5V to 4.6V
VCC to Ground Potential -0.5V to 4.6V
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL SPECIFICATIONS
CAPACITANCE TA = 25°C, f = 1.0 MHz
SYMBOL PARAMETER MIN. TYP MAX. UNIT CONDITIONS
CIN Input Capacitance 10 pF VIN = 0V
COUT Output Capacitance 10 pF VOUT = 0V
Maximum Negative Overshoot Waveform
0V
-0.5V
20ns
Maximum Positive Overshoot Waveform
4.6V
3.6V
20ns
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
INPUT TEST WAVEFORMS AND MEASURESMENT LEVEL
OUTPUT LOADING
DEVICE UNDER
TEST
DIODES=IN3064
OR EQUIVALENT
CL
+3.3V
CL=50pF Including jig capacitance
1.5V
0V
Note:Input pulse rise and fall time are < 10ns
AC
Measurement
Level
3.0V
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
SYMBOL PARAMETER NOTES MIN. TYP MAX. UNITS TEST CONDITIONS
IIL Input Load 1 ±1 0 uA VCC = VCC Max
Current VIN = VCC or GND
ILO Output Leakage 1 ±1 0 uA VCC = VCC Max
Current VIN = VCC or GND
ISB1 VCC Standby 1 30 uA VCC = VCC Max
Current (CMOS) CS = VCC ± 0.2V
ISB2 VCC Standby 1 3 mA VCC = VCC Max
Current (TTL) CS = VIH
ICC1 VCC Read 1 10 30 mA f=20MHz
VIL Input Low Voltage -0.5 0.8 V
VIH Input High Voltage 2.0 VCC+0.5 V
VOL Output Low Voltage 0.4 V IOL = 500uA
VOH Output High Voltage 2.4 V IOH = -100uA
DC CHARACTERISTICS (Temperature = 0°C to 70°C, VCC = 3.0V ~ 3.6V)
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at VCC = 3.3V, T = 25°C. These currents are valid
for all product versions (package and speeds).
2. Typical value is calculated by simulation.
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
SYMBOL PARAMETER Min. Typ. Max. Units Conditions
fSCLK Clock Frequency 20 MHz
tCYC Clock Cycle Time 50 ns
tSKH Clock High Time 2 5 ns
tSKL Clock Low Time 2 5 ns
t R Clock Rise Time 6 ns
tF Clock Fall Time 6 ns
tCSA CS Lead Clock Time 5 0 ns
tCSB CS Lag Clock Time 5 0 ns
tCSH CS High Time 1 00 ns
tDS SI Setup Time 5 ns
t D H SI Hold Time 25 ns
tA A Access Time 30 ns
tDOH SO Hold Time 5 ns
tDOZ SO Floating Time 0 2 0 ns
AC CHARACTERISTICS (Temperature = 0°C to 70°C, VCC = 3.0V ~ 3.6V)
SERIAL DATA INPUT/OUTPUT TIMING
SI
CS
SCLK
SO
tCSB tCSH
tDOZ
tR tF
tSKH
tDH
tAA tDOH
tDS
tSKL
tCYC
tCSA
BIT 7
BIT 7
BIT 6 BIT 0
BIT 0
NOTES:
1. Typical value is calculated by simulation.
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
STANDBY TIMING WAVEFORM
When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until next
CS falling edge. In standby mode, SO pin of this LSI should be High-Z. While CS=VIH, current=standby current, while
CS=VIL and commands are issuing, or commands are invalid, current=5mA(typ.) to 15mA(max.).
SCLK
SI
SO
1st byte
Bit7
Hi-Z
Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
CS
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
READ ARRAY TIMING WAVEFORM
NOTES:
1. 1st Byte='52h'
2. 2nd Byte=Address 1(AD1), A17=BIT 0, A18=BIT1, A19=BIT2, A20=BIT3.
3. 3rd Byte=Address 2(AD2), A9=BIT0, A10=BIT1,......A16=BIT7
4. 4th Byte=Address 3(AD3), A7=BIT0, A8=BIT1
5. 5th Byte=Byte Address(BA), A0=BIT0, A1=BIT1,......A6=BIT6
6. 6th-9th Bytes for SI ==> Dummy Bytes (Don't care)
7. From Byte 10, SO Would Output Array Data
CS
SCLK
SI
SO
1st data output byte 2nd data output byte9th byte (Dummy)
CS
SCLK
SI
SO
511 data output byte 512 data output byte
CS
SCLK
SI
SO
1st byte (52h) 2nd byte (AD1)
Bit7
Hi-Z
Hi-Z
Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Bit7 Bit6 Bit5 Bit4
Bit1 Bit0
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Bit7 Bit6 Bit5
Bit2 Bit1 Bit0Bit3 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Hi-Z
Hi-Z
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
PACKAGE IMFORMATION
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P/N: PM0825 REV. 1.2, JUL. 01, 2004
MX23L1651
REVISION HISTORY
Revision No. Description Page Date
1. 0 1. Low standby current: 8uA(typical) --> 30uA P1,4,7 AUG/26/2002
2. From Advance Information to Formal Version
1. 1 1. Modify Package Information P11 JUN/23/2003
1. 2 1. Add "6MHz for Die Form only" P1 JUL/01/2004
2. Add "Order Information" P2
MX23L1651
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