POWER MANAGEMENT
1www.semtech.com
SC1185 & SC1185A
Programmable Synchronous DC/DC
Converter, Dual LDO Controller
Features
Applications
Revision 1, December 2000
Description
The SC1185 combines a synchronous voltage mode con-
troller with two low-dropout linear regulators providing
most of the circuitry necessary to implement three DC/
DC converters for powering advanced microprocessors
such as Pentium® II .
The SC1185 switching section features an integrated 5
bit D/A converter, pulse by pulse current limiting, inte-
grated power good signaling, and logic compatible shut-
down. The SC1185 switching section operates at a fixed
frequency of 140kHz, providing an optimum compromise
between size, efficiency and cost in the intended appli-
cation areas. The integrated D/A converter provides pro-
grammability of output voltage from 2.0V to 3.5V in
100mV increments and 1.30V to 2.05V in 50mV incre-
ments with no external components.
The SC1185 linear sections are low dropout regulators
supplying 1.5V for GTL bus and 2.5V for non-GTL I/O.
The Reference voltage is made available for external lin-
ear regulators.
uSynchronous design, enables no heatsink solution
u95% efficiency (switching section)
u5 bit DAC for output programmability
uOn chip power good function
uDesigned for Intel Pentium® ll requirements
u1.5V, 2.5V @ 1.25% for linear section
u1.265V ± 1.5% Reference available
u Pentium® ll microprocessor supplies
u Flexible motherboards
u 1.3V to 3.5V microprocessor supplies
u Programmable triple power supplies
Typical Application Circuit
1.00k
PWRGOOD
2.5V
+
1500uF
2R2
IRLR3103N
+
330uF
1k
VLIN3
x4
0.1uF
1.9uH
+
330uF
VID3
3.3V
SC1185CS
1
5
6
7 8
9
10
11
15
16
17
18
19
20
21
22
13
12
14
24 2
23
34
AGND
VCC
REF
PWRGOOD CS-
CS+
PGNDH
DH
BSTH
EN
VOSENSE
VID4
VID3
VID2
VID1
VID0
DL
PGNDL
BSTL
GATE2 GATE1
LDOV
LDOS1LDOS2
+
330uF
VID1
VID0
VID2
+
330uF
2.32k
0.1uF
IRLR024N
+
1500uF
5V
+
4.7uF
1.5V
VID4
x6
5mOhm
IRLR024N
EN
0.1uF
VCC_CORE
2R2
12V
IRLR024N
3.3V
0.1uF
12V
IRLR3103N
10
+
-
LM358
3
21
8
4
22000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Electrical Characteristics
Absolute Maximum Ratings
retemaraPlobmySmumixaMstinU
DNGotCCVV
NI
7+ot3.0-V
DNGotDNGP +1 V
DNGotTSB 51+ot3.0-V
egnaRerutarepmeTgnitarepOT
A
07+ot0C°
egnaRerutarepmeTnoitcnuJT
J
521+ot0C°
egnaRerutarepmeTegarotST
GTS
051+ot56-C°
.ceS01)gniredloS(erutarepmeTdaeLT
L
003C°
tneibmAotnoitcnuJecnadepmIlamrehT θ
AJ
08W/C°
esaCotnoitcnuJecnadepmIlamrehT θ
CJ
52W/C°
retemaraPsnoitidnoCniMpyTxaMstinU
noitceSgnihctiwS
egatloVtuptuOI
O
tiucriCnoitacilppAniA2=elbaTegatloVtuptuOeeS
egatloVylppuSCCV5.47V
tnerruCylppuSV0.5=CCV851Am
noitalugeRdaoLI
O
A51otA8.0=1%
noitalugeReniL +51.0%
egatloVtimiLtnerruC 060758Vm
ycneuqerFrotallicsO 521041061zHk
elcyCytuDxaMrotallicsO 0959%
tnerruCecruoS/kniSHDkaeP,V5.4=HD-HTSBV1.3=HDNGP-HD v5.1=HDNGP-HD 1001 A
Am
tnerruCecruoS/kniSLDkaeP,V5.4=LD-LTSBV1.3=LDNGP-LD V5.1=LDNGP-LD 1001 A
Am
A(niaG
LO
)V
ESNESO
Vot
O
53Bd
tnerruCecruoSDIVxDIV<V4.2101Aµ
egakaeLDIVxDIV<V4.201Aµ
egatlovdlohserhtdoogrewoP 88001211%
emitdaeD 04001sn
Unless specified: VCC = 4.75V to 5.25V; GND = PGND = 0V; V OSENSE = VO; 0mV < (CS+-CS-) < 60mV; LDOV = 11.4V to 12.6V; TA = 0 to 70°C
3
2000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Electrical Characteristics (Cont.)
retemaraPsnoitidnoCniMpyTxaMstinU
snoitceSraeniL
tnerructnecseiuQV21=VODL5Am
1ODLegatloVtuptuO 964.2005.2135.2V
2ODLegatloVtuptuO 184.1005.1915.1V
egatloVecnerefeRferI< Aµ001642.1562.1482.1V
A(niaG
LO
))2,1(ETAGot)2,1(SODL09Bd
noitalugeRdaoLI
O
A8ot0=3.0%
noitalugeReniL 3.0%
ecnadepmItuptuOV5.6=ETAGV15.1
ecnadepmInwodlluPetaGVO=VODL=CCV;DNGA-)2,1(ETAG08003057k
ecnadepmIESNESOV 01k
NOTE:
(1) This device is ESD sensitive. Use of standard ESD handling precautions is required.
42000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Note:
(1) All logic level inputs and outputs are open collector TTL compatible.
Pin Configuration Ordering Information
Pin Descriptions
rebmuNtraP
)1(
egakcaPraeniL egatloV pmeT T(egnaR
J
)
RT.WSC5811CS42-OSV5.2V5.1C°521ot°0
RT.WSCA5811CS42-OSV5.2V5.1C°521ot°0
Note:
(1) Only available in tape and reel packaging. A reel
contains 1000 devices.
(2) SC1185A provides improved output tolerance. See
Output V oltage T able.
#niPemaNniPnoitcnuFniP
1DNGAdnuorGlatigiDdnagolanAlangiSllamS
21ETAG1ODLtuptuOevirDetaG
31SODL1ODLroftupnIesneS
42SOSL2ODLroftupnIesneS
5CCVegatloVtupnI
6FERtuptuoegtloVecnerefeRdereffuB
7DOOGRWP
)1(
Vfihgih,tuptuocigolrotcellocnepO
O
tnioptesfo%01nihtiw
8-SC)evitagen(tupnIesneStnerruC
9+SC)evitisop(tupnIesneStnerruC
01HDNGPhctiwSediShgiHrofdnuorGrewoP
11HDtuptuOrevirDediShgiH
21LDNGPhctwSediSwoLrofdnuorGrewoP
31LDtuptuOrevirDediswoL
41LTSBrevirDediSwoLrofylppuS
51HTSBrevirDediShgiHrofylppuS
61NE
)1(
.noitarepolamronrofneporohgiH.retrevnocehtnwodstuhswolcigoL
71ESNESOVniahckcabdeeflanretnifodnepoT
814DIV
)1(
)BSM(tupnIgnimmargorP
913DIV
)1(
tupnIgnimmargorP
022DIV
)1(
tupnIgnimmargorP
121DIV
)1(
tupnIgnimmargorP
220DIV
)1(
)BSL(tupnIgnimmargorP
32VODLnoitcesODLrofV21+
422ETAG2ODLtuptuOevirDetaG
1
2
3
4
5
6
7
8
GATE2AGND
TOP VIEW
(24 Pin SOIC)
13
14
15
16
LDOVGATE1
VID0LDOS1
VID1LDOS2
VID2VCC
VID3REF
VID4PWRGOOD
VOSENSECS-
9
10
22
ENCS+
BSTHPGNDH
21
18
17
19
20
11
12
24
BSTLDH
DLPGNDL
23
5
2000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Block Diagram
CS+
+
-
D/A
OSCILLATOR
REF
VID3
VOSENSE
EN
LDOV
CONTROL
1.265V
REF
OPEN
COLLECTORS BSTL
GATE2
ERROR
AMP
AGND PGNDL
BSTH
VID2
VID4
VID1
+
-
DH
CS-
AGND
VCC
+
-
REF
R
S
Q
LEVEL SHIFT
AND HIGH SIDE
+
-
DL
AGND
SYNCHRONOUS
2.5V FET
CONTROLLER
PWRGOOD
LDOS1
LDOS2
1.5V FET
CONTROLLER
SHOOT-THRU
+
-
CURRENT LIMIT
PGNDH
70mV
GATE1
VID0
MOSFET DRIVE
MOSFET DRIVE
62000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
retemaraPdradnatSnoisreV"A"
diV 01234 niMpyTxaMniMpyTxaMstinU
egatloVtuptuO11110772.1003.1323.1782.1003.1313.1V
01110623.1053.1473.1733.1053.1463.1
10110573.1004.1524.1683.1004.1414.1
00110424.1054.1674.1634.1054.1564.1
11010874.1005.1325.1584.1005.1515.1
01010725.1055.1375.1535.1055.1665.1
10010675.1006.1426.1485.1006.1616.1
00010526.1056.1576.1436.1056.1766.1
11100576.1007.1627.1386.1007.1717.1
01100427.1057.1818.1337.1057.1867.1
10100287.1008.1968.1287.1008.1818.1
00100238.1058.1919.1238.1058.1968.1
11000188.1009.1079.1188.1009.1919.1
01000139.1059.1020.2139.1059.1079.1
10000089.1000.2020.2089.1000.2020.2
00000030.2050.2170.2030.2050.2170.2
11111079.1000.2030.2079.1000.2030.2
01111960.2001.2231.2960.2001.2231.2
10111761.2002.2332.2761.2002.2332.2
00111662.2003.2533.2662.2003.2533.2
11011463.2004.2634.2463.2004.2634.2
01011364.2005.2835.2364.2005.2835.2
10011165.2006.2936.2165.2006.2936.2
00011066.2007.2147.2066.2007.2147.2
11101857.2008.2248.2857.2008.2248.2
01101248.2009.285248.2009.2859.2
10101049.2000.3060.3049.2000.3060.3
00101830.3001.3261.3830.3001.3261.3
11001631.3002.3462.3631.3002.3462.3
01001432.3003.3663.3432.3003.3663.3
10001233.3004.3864.3233.3004.3864.3
00001034.3005.3075.3034.3005.3075.3
Output Voltage Table
Unless specified: 4.75V < VCC < 5.25V; GND = PGND = 0V; VOSENSE = VO; 0mV < (CS+-CS-) < 60mV; = 0°C < Tj < 85°C
7
2000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Layout Guidelines
Careful attention to layout requirements are necessary for
successful implementation of the SC1185 PWM control-
ler. High currents switching at 140kHz are present in the
application and their effect on ground plane voltage differ-
entials must be understood and minimized.
1). The high power parts of the circuit should be laid out
first. A ground plane should be used, the number and
position of ground plane interruptions should be such as
to not unnecessarily compromise ground plane integrity.
Isolated or semi-isolated areas of the ground plane may
be deliberately introduced to constrain ground currents to
particular areas, for example the input capacitor and bot-
tom FET ground.
2). The loop formed by the Input Capacitor(s) (Cin), the Top
FET (Q1) and the Bottom FET (Q2) must be kept as small
as possible. This loop contains all the high current, fast
transition switching. Connections should be as wide and
as short as possible to minimize loop inductance. Mini-
mizing this loop area will a) reduce EMI, b) lower ground
injection currents, resulting in electrically cleaner grounds
for the rest of the system and c) minimize source ringing,
resulting in more reliable gate switching signals.
3). The connection between the junction of Q1, Q2 and
the output inductor should be a wide trace or copper re-
gion. It should be as short as practical. Since this connec-
tion has fast voltage transitions, keeping this connection
short will minimize EMI. The connection between the out-
put inductor and the sense resistor should be a wide trace
or copper area, there are no fast voltage or current transi-
tions in this connection and length is not so important,
however adding unnecessary impedance will reduce effi-
ciency.
Vout
12V IN
3.3V Vo Lin1
Vo Lin2
5V
L
5mOhm
+
Cout
+
Cin
10
Q2
0.1uF
Q3
+
Cout Lin1
2.32k
Q4
+
Cout Lin2
1.00k
+
Cin Lin
SC1185
AGND
1
VCC
5
REF
6
PWRGOOD
7
CS-
8
CS+
9
PGNDH
10
DH
11
BSTH
15
EN
16
VOSENSE
17
VID4
18
VID3
19
VID2
20
VID1
21
VID0
22
DL
13
PGNDL
12
BSTL
14
GATE2
24
GATE1
2
LDOV
23
LDOS1
3
LDOS2
4Q1
0.1uF
Heavy lines indicate
hi
g
h current paths.
Layout Dia
g
ram
SC1185(A)
82000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Layout Guidelines
4) The Output Capacitor(s) (Cout) should be located as
close to the load as possible, fast transient load cur-
rents are supplied by Cout only, and connections between
Cout and the load must be short, wide copper areas to
minimize inductance and resistance.
5) The SC1185 is best placed over a quiet ground plane
area, avoid pulse currents in the Cin, Q1, Q2 loop flowing
in this area. PGNDH and PGNDL should be returned to
the ground plane close to the package. The AGND pin
should be connected to the ground side of (one of) the
output capacitor(s). If this is not possible, the AGND pin
may be connected to the ground path between the Output
Capacitor(s) and the Cin, Q1, Q2 loop. Under no circum-
stances should AGND be returned to a ground inside the
Cin, Q1, Q2 loop.
6) Vcc for the SC1185 should be supplied from the 5V
Currents in various parts of the power section
supply through a 10 resistor, the Vcc pin should be
decoupled directly to AGND by a 0.1µF ceramic capacitor,
trace lengths should be as short as possible.
7) The Current Sense resistor and the divider across it
should form as small a loop as possible, the traces run-
ning back to CS+ and CS- on the SC1185 should run
parallel and close to each other. The 0.1µF capacitor should
be mounted as close to the CS+ and CS- pins as possible.
8) Ideally, the grounds for the two LDO sections should be
returned to the ground side of (one of) the output
capacitor(s).
Vout
5V
+
+
9
2000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Layout Guidelines
COMPONENT SELECTION
SWITCHING SECTION
OUTPUT CAPACITORS - Selection begins with the most
critical component. Because of fast transient load current
requirements in modern microprocessor core supplies, the
output capacitors must supply all transient load current
requirements until the current in the output inductor ramps
up to the new level. Output capacitor ESR is therefore one
of the most important criteria. The maximum ESR can be
simply calculated from:
step current Transient I excursion voltage transient MaximumV
Where I
V
R
t
t
t
t
ESR
==
For example, to meet a 100mV transient limit with a 10A
load step, the output capacitor ESR must be less than
10m. To meet this kind of ESR level, there are three
available capacitor technologies.
ygolonhceT .paChcaE .ytQ .dqR
latoT
C
(µ)F RSE
m( )C
(µ)F RSE
m( )
mulatnaTRSEwoL033066000201
NOC-SO0335230993.8
munimulARSEwoL005144500573.8
The choice of which to use is simply a cost/performance
issue, with Low ESR Aluminum being the cheapest, but
taking up the most space.
INDUCTOR - Having decided on a suitable type and value
of output capacitor, the maximum allowable value of in-
ductor can be calculated. Too large an inductor will pro-
duce a slow current ramp rate and will cause the output
capacitor to supply more of the transient load current for
longer - leading to an output voltage sag below the ESR
excursion calculated above.
The maximum inductor value may be calculated from:
()
OINOA
A
t
ESR
VV or V of lesser the is V where
V
ICR
L
The calculated maximum inductor value assumes 100%
and 0% duty cycle, so some allowance must be made.
Choosing an inductor value of 50 to 75% of the calculated
maximum will guarantee that the inductor current will ramp
fast enough to reduce the voltage dropped across the ESR
at a faster rate than the capacitor sags, hence ensuring a
good recovery from transient with no additional excursions.
We must also be concerned with ripple current in the out-
put inductor and a general rule of thumb has been to
allow 10% of maximum output current as ripple current.
Note that most of the output voltage ripple is produced by
the inductor ripple current flowing in the output capacitor
ESR. Ripple current can be calculated from:
OSC
IN
LfL4 V
IRIPPLE
=
Ripple current allowance will define the minimum permit-
ted inductor value.
POWER FETS - The FETs are chosen based on several
criteria with probably the most important being power dis-
sipation and power handling capability.
TOP FET - The power dissipation in the top FET is a combi-
nation of conduction losses, switching losses and bottom
FET body diode recovery losses.
a) Conduction losses are simply calculated as:
IN
O
)on(DS
2
OCOND
V
V
c
y
cle dut
y
=
where RIP
δ
δ=
b) Switching losses can be estimated by assuming a switch-
ing time, if we assume 100ns then:
2
INOSW 10VIP
=
or more generally,
4f)tt(VI
POSCfrINO
SW +
=
c) Body diode recovery losses are more difficult to esti-
mate, but to a first approximation, it is reasonable to as-
sume that the stored charge on the bottom FET body di-
ode will be moved through the top FET as it starts to turn
on. The resulting power dissipation in the top FET will be:
OSCINRRRR fVQP =
To a first order approximation, it is convenient to only con-
102000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Layout Guidelines
sider conduction losses to determine FET suitability.
For a 5V in; 2.8V out at 14.2A requirement, typical FET
losses would be: Using 1.5X Room temp RDS(ON) to allow for
temperature rise.
epytTEFR
)no(SD
m( )P
D
)W(egakcaP
52043LRI5196.1D
2
kaP
3022LRI5.0191.1D
2
kaP
0144iS0262.28-0S
BOTTOM FET - Bottom FET losses are almost entirely due
to conduction. The body diode is forced into conduction at
the beginning and end of the bottom switch conduction
period, so when the FET turns on and off, there is very
little voltage across it, resulting in low switching losses.
Conduction losses for the FET can be determined by:
)1(RIP )on(DS
2
OCOND δ=
For the example above:
epytTEFR
)no(SD
m( )P
D
)W(egakcaP
52043LRI5133.1D
2
kaP
3022LRI5.0139.0D
2
kaP
0144iS0277.18-0S
Each of the package types has a characteristic thermal
impedance, for the TO-220 package, thermal impedance
is mostly determined by the heatsink used. For the sur-
face mount packages on double sided FR4, 2 oz printed
circuit board material, thermal impedances of 40oC/W for
the D2PAK and 80oC/W for the SO-8 are readily achiev-
able. The corresponding temperature rise is detailed be-
low:
(esirerutarepmeT
o
)C
epytTEFTEFpoTTEFmottoB
52043LRI6.762.35
3022LRI6.742.73
0144iS8.0816.141
It is apparent that single SO-8 Si4410 are not adequate
for this application, but by using parallel pairs in each
position, power dissipation will be approximately halved
and temperature rise reduced by a factor of 4.
INPUT CAPACITORS - since the RMS ripple current in the
input capacitors may be as high as 50% of the output
current, suitable capacitors must be chosen accordingly.
Also, during fast load transients, there may be restrictions
on input di/dt. These restrictions require useable energy
storage within the converter circuitry, either as extra out-
put capacitance or, more usually, additional input capaci-
tors. Choosing low ESR input capacitors will help maximize
ripple rating for a given size.
11
2000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Typical Characteristics
Typical Efficiency at Vo=2.8V
70%
75%
80%
85%
90%
95%
0246810121416
Io (Amps)
Efficiency
2.8V Std
2.8V Sync
2.8V Sync Lo Rds
Typical Efficiency at Vo=2.0V
70%
75%
80%
85%
90%
95%
0246810121416
Io (Amp s)
Efficiency
2.0V Std
2.0V Sync
2.0V Sync Lo Rds
Typical Efficiency at Vo=2.5V
70%
75%
80%
85%
90%
95%
0 2 4 6 8 10 12 14 16
Io (Amps )
Efficiency
2.5V Std
2.5V Sync
2.5V Sync Lo Rds
Typical Efficiency at Vo=3.5V
70%
75%
80%
85%
90%
95%
0 2 4 6 8 10 12 14 16
Io (Amps)
Efficiency
3.5V Std
3.5V Sync
3.5V Sync Lo Rds
Transient Response Vo=2.8V, Io=300mA to 10A
Typical Ripple, Vo=2.8V, Io=10A
122000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Typical Application Circuit
OFFSET
mV/V
0
2
2
2
5
5
5
10
10
10
J12
S1
123456
J17
CON4
1
2
3
4
+
C16
330uF
J23
+
C21
1500uF
R1
10
R17
See Table
R10 2R2
+
C11
330uF
VID0
+
C24
330uF
J14
+
C26
4.7uF
VID3
R18
100
100
100
DROOP
mV/A
0
1
2
5
1
2
5
1
2
5
12V
C10
0.1uF
+
C7
1500uF
L1 1.9uH
R4 1.00k
VID
43210
11111
11110
11101
11100
11011
11010
11001
11000
10111
10110
10101
10100
10011
10010
10001
10000
J19
R5 2.32k
+
C18
1500uF
Q6
IRLR024N
R11
See Table 2
R6 2R2
+
C8
1500uF
Q1
IRLR3103
J21
3.3V
+
C9
1500uF
+
C25
330uF
J15
J1
+
C3
1500uF
VID2
J22
U3
SC1185CS
1
5
6
7 8
9
10
11
15
16
17
18
19
20
21
22
13
12
14
24 2
23
34
AGND
VCC
REF
PWRGOOD CS-
CS+
PGNDH
DH
BSTH
EN
VOSENSE
VID4
VID3
VID2
VID1
VID0
DL
PGNDL
BSTL
GATE2 GATE1
LDOV
LDOS1LDOS2
TABLE VALID FOR 1x5mOhm SENSE
RESISTOR
+
C17
330uF J20
C4
0.1uF
R18
See Table
+
C20
1500uF
+
C15
330uF
VID
43210
01111
01110
01101
01100
01011
01010
01001
01000
00111
00110
00101
00100
00011
00010
00001
00000
3.3V
VCC_CORE
Q7
IRLR024N
C13
0.1uF
+
C23
1500uF
R11
(Ohm)
0
2.5
3.3
EMPTY
6.3
8.3
EMPTY
12.5
16.7
EMPTY
VID1
C1
0.1uF
VLIN3
R16
0
Q5
IRLR024N
+
C12
330uF
1.5V
R7 2R2
Q4
IRLR3103N
5V
R9 2R2
J25
R15
See Table 2
12V
VOUT
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
2.05
R12
1k
VLIN3
1.5V
1.8V
2.5V
+
C14
330uF
2.5V
Q2
IRLR3103N
R15
(Ohm)
EMPTY
10
5
2
25
12.5
5
50
25
10
C5
0.1uF
VOUT
NO CPU
2.10
2.20
2.30
2.40
2.50
2.60
2.70
2.80
2.90
3.00
3.10
3.20
3.30
3.40
3.50
VID4
+
C2
1500uF
J16
CON4
1
2
3
4
+
C6
1500uF
J18
SCOPE TP
J24
R8 5mOhm
+
C22
1500uF
+
-
U2A
LM358
3
21
8
4
Q3
IRLR3103N
+
C19
1500uF
J13
R17
18.7
42.2
97.6
EN
R3
EMPTY
13
2000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Materials List
metI.ytQecnerefeReulaVsetoN
15 31C,01C,5C,4C,1CcimareCFu1.0
221,02C,91C,81C,9C,8C,7C,6C,3C,2C 32C,22C,12C Fu0051RSEwoL.viuqeroXG-VMoynaS
38 52C,42C,71C,61C,51C,41C,21C,11CFu033
41 62CFu7.4
51 1LHu9.1 SLATEMORCIMnoGWA61snruT6 erocD25-05T
64 4Q,3Q,2Q,1QN3013RLRI
73 7Q,6Q,5QN420RLRI
81 1R01
91 3RYTPME
011 4Rk00.1
111 5Rk23.2
214 01R,9R,7R,6R2R2
311 8RmhOm5seireS1-RAOCRI
412 11R,51RelbaTeeS
511 21Rk1
611 61R0
712 81R,71RelbaTeeS
811 2U853ML
911 3USC5811CSHCETMES
142000 Semtech Corp. www.semtech.com
POWER MANAGEMENT
SC1185 & SC1185A
Semtech Corporation
Power Management Products Division
652 Mitchell Rd., Newbury Park, CA 91320
Phone: (805)498-2111 FAX (805)498-3804
Outline Drawing
Contact Information