LT3086 40V, 2.1A Low Dropout Adjustable Linear Regulator with Monitoring and Cable Drop Compensation Description Features n n n n n n n n n n n n n n n n n Wide Input Voltage Range: 1.4V to 40V 1 Resistor Sets Output Voltage: 0.4V to 32V Output Current: 2.1A 2% Tolerance Over Line, Load and Temperature Output Current Monitor: IMON = IOUT/1000 Temperature Monitor with Programmable Thermal Limit Programmable Cable Drop Compensation Parallel Multiple Devices for Higher Current Dropout Voltage: 330mV 1 Capacitor Soft-Starts Output and Decreases Noise Low Output Noise: 40VRMS (10Hz to 100kHz) Precision, Programmable External Current Limit Power Good Flag with Programmable Threshold Ceramic Output Capacitors: 10F Minimum Quiescent Current in Shutdown: <1A Reverse-Battery, -Current and -Output Protection Available in 5mm x 4mm 16-Lead DFN, 16-Lead TSSOP, 7-Lead DD-Pak and 7-Lead TO-220. Applications n n n n Programmable Linear Regulator Post Regulator for Switching Supplies USB Power Supplies High Reliability Power Supplies The LT(R)3086 is a multi-feature, low dropout, low noise 2.1A linear regulator that operates over a 1.4V to 40V input supply range. Dropout voltage at 2.1A is typically 330mV. One resistor sets output voltage from 0.4V to 32V. Output voltage tolerance is guaranteed to 2% over line, load and temperature. The LT3086 is stable with ceramic output capacitors, requiring a minimum of 10F. The LT3086's programmable cable drop compensation cancels output voltage errors caused by resistive connections to the load. A master/slave configuration allows paralleling of multiple devices for higher load current and heat spreading without external ballast resistor requirements. Output current and temperature monitoring along with a power good flag provide system diagnostic and debug capability. Internal fault circuitry includes thermal shutdown and current limit with foldback. Thermal limit and current limit are also externally programmable. Packages include the thermally enhanced 16-lead (5mm x 4mm) DFN, 16-lead TSSOP, 7-lead DD-Pak and 7-lead TO-220. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Transient Response with Cable Drop Compensation (CDC) 5V, 2.1A USB Supply with Cable Drop Compensation RCDC = RMON 357 1% SET TEMP TRACK IMON ILIM RMON *RSET 3000 *R WIRE R WIRE = RLINE1 +RLINE2 * CDC RPWRGD PWRGD GND RCDC 1% OUTPUT VOLTAGE (V) SHDN RSET 90.9k + 1.1k 1% 5.6 82.5k 10F 1% 100k RCDC 1% VLOAD 5V AT 2.1A VPWRGD RLINE2 *SEE APPLICATIONS INFORMATION FOR INDUCTANCE EFFECTS ASSOCIATED WITH RWIRE 3086 TA01 LOAD CURRENT (A) TO ADC 0.8V AT 2.24A FULL-SCALE LT3086 10F VTEMP 10mV/C 25C = 250mV OUT 5.8 CABLE RLINE1 LOAD VIN 6V TO 15V IN VOUT 5.4 VOUT WITH CDC 5.2 5.0 VIN = 6V RMON = 357 RWIRE = 0.24 RCDC = 46.4k VLOAD WITH CDC 4.8 4.6 VLOAD WITHOUT CDC 4.4 4.2 ILOAD = 0.5A TO 1.5A 2 1 0 0 80 160 240 320 400 480 560 640 720 800 TIME (s) 3060 TA04b 3086fb For more information www.linear.com/LT3086 1 LT3086 Absolute Maximum Ratings (Note 1) IN Pin Voltage..........................................................45V OUT Pin Voltage.......................................................36V Input-to-Output Differential Voltage (Note 2)...........45V SET Pin Voltage................................................-0.3, 36V SHDN Pin Voltage....................................................45V CDC Pin (Internally Clamped, Current into Pin)........<8mA IMON Pin Voltage.................................................-0.3, 7V ILIM Pin Voltage...................................................-0.3, 2V TRACK Pin Voltage..... -0.3, Internally Clamped at 1.25V TEMP Pin Voltage..................................................0V, 5V PWRGD Pin Voltage..........................................-0.3, 36V RPWRGD Pin Voltage..........................................-0.3, 36V Output Short-Circuit Duration........................... Indefinite Operating Junction Temperature (Notes 3, 5, 12) E-Grade, I-Grade................................. -40C to 125C MP-Grade........................................... -55C to 125C H-Grade.............................................. -40C to 150C Storage Temperature Range.......................-65 to 150C Lead Temperature (Soldering, 10 sec) (TSSOP, DD-Pak, TO-220 Only) ............................ 300C Pin Configuration TOP VIEW TOP VIEW GND 1 16 GND GND 1 16 GND IMON/ILIM 2 15 PWRGD CDC 3 14 TRACK ILIM 2 15 PWRGD IMON 3 14 TRACK CDC 4 13 TEMP RPWRGD 4 RPWRGD 5 12 SHDN SET 5 17 GND 17 GND 13 TEMP 12 SHDN SET 6 11 IN OUT 6 11 IN OUT 7 10 IN OUT 7 10 IN OUT 8 9 GND 8 9 NC GND DHD PACKAGE 16-LEAD (5mm x 4mm) PLASTIC DFN TJMAX = 125C, JA = 25C/W TO 33C/W*, JC = 4.3C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB FE PACKAGE 16-LEAD PLASTIC TSSOP TJMAX = 150C, JA = 25C/W TO 33C/W*, JC = 10C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB FRONT VIEW FRONT VIEW TAB IS GND 7 6 5 4 3 2 1 TEMP SHDN IN GND OUT SET IMON/ILIM TAB IS GND R PACKAGE 7-LEAD PLASTIC DD TJMAX = 125C, JA = 15C/W TO 19C/W*, JC = 3C/W 7 6 5 4 3 2 1 TEMP SHDN IN GND OUT SET IMON/ILIM T7 PACKAGE 7-LEAD PLASTIC TO-220 TJMAX = 125C, JA = 34C/W, JC = 3C/W *See Applications Information section. 3086fb 2 For more information www.linear.com/LT3086 LT3086 Order Information http://www.linear.com/product/LT3086#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3086EDHD#PBF LT3086EDHD#TRPBF 3086 16-Lead (5mm x 4mm) Plastic DFN -40C to 125C LT3086IDHD#PBF LT3086IDHD#TRPBF 3086 16-Lead (5mm x 4mm) Plastic DFN -40C to 125C LT3086EFE#PBF LT3086EFE#TRPBF 3086FE 16-Lead Plastic TSSOP -40C to 125C LT3086IFE#PBF LT3086IFE#TRPBF 3086FE 16-Lead Plastic TSSOP -40C to 125C LT3086MPFE#PBF LT3086MPFE#TRPBF 3086FE 16-Lead Plastic TSSOP -55C to 125C LT3086HFE#PBF LT3086HFE#TRPBF 3086FE 16-Lead Plastic TSSOP -40C to 150C LT3086ER#PBF LT3086ER#TRPBF LT3086R 7-Lead Plastic DD-Pak -40C to 125C LT3086IR#PBF LT3086IR#TRPBF LT3086R 7-Lead Plastic DD-Pak -40C to 125C LT3086MPR#PBF LT3086MPR#TRPBF LT3086R 7-Lead Plastic DD-Pak -55C to 125C LT3086ET7#PBF N/A LT3086T7 7-Lead Plastic TO-220 -40C to 125C LT3086IT7#PBF N/A LT3086T7 7-Lead Plastic TO-220 -40C to 125C LT3086MPT7#PBF N/A LT3086T7 7-Lead Plastic TO-220 -55C to 125C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. PARAMETER CONDITIONS MIN Minimum Input Voltage (Note 4) ILOAD = 2.1A, VOUT = -1% VSET VIN = 1.55V, ILOAD = 1mA 1.55V < VIN < 40V, 1mA < ILOAD < 2.1A 1.55V < VIN < 40V, 1mA < ILOAD < 2.1A Reference Current ISET VIN = 1.55V, ILOAD = 1mA 1.55V < VIN < 40V, 1mA < ILOAD < 2.1A VSET VSET ISET VIN = 1.55V to 40V, ILOAD = 1mA VIN = 1.55V to 40V, ILOAD = 1mA VIN = 1.55V to 40V, ILOAD = 1mA (TJ < 125C) (H-Grade, TJ > 125C) l VSET VSET ISET ISET ILOAD = 1mA to 2.1A, VIN = VOUT + 0.55V ILOAD = 1mA to 2.1A, VIN = VOUT + 0.55V ILOAD = 1mA to 2.1A, VIN = VOUT + 0.55V ILOAD = 1mA to 2.1A, VIN = VOUT + 0.55V (TJ < 125C) (H-Grade, TJ > 125C) (TJ < 125C) (H-Grade, TJ > 125C) l Load Regulation (Notes 6, 7) (TJ < 125C) (H-Grade, TJ > 125C) l l Minimum Load Current (Note 16) Dropout Voltage VIN = VOUT(NOMINAL), (Notes 7, 8) MAX UNITS 1.4 1.55 V 396 392 388 400 400 400 404 408 408 mV mV mV 49.5 49 50 50 50.5 51 A A 0.1 0.8 1 mV mV A 1 1 0.08 0.08 mV mV A A l Reference Voltage (Notes 3, 5) Line Regulation TYP l -0.12 -8 l -0.16 -0.03 0.25 0.02 1 mA 10 65 100 mV mV 100 135 160 mV mV 150 195 235 mV mV 260 335 425 mV mV 330 415 540 mV mV l ILOAD = 1mA l ILOAD = 100mA ILOAD = 500mA ILOAD = 1.5A l l l ILOAD = 2.1A l 3086fb For more information www.linear.com/LT3086 3 LT3086 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. PARAMETER CONDITIONS MIN TYP MAX GND Pin Current VIN = VOUT(NOMINAL) + 0.55V, (Notes 7, 9) ILOAD = 0A ILOAD = 1mA ILOAD = 100mA ILOAD = 500mA ILOAD = 1.5A ILOAD = 2.1A 1.2 1.3 1.8 4.5 23 44 2.4 2.6 3.6 9 46 88 Quiescent Current in Shutdown Output Voltage Noise VIN = 40V, VSHDN = 0V 0.1 1 CSET = 0.01F , COUT = 10F, ILOAD = 2.1A VOUT = 5V, BW = 10Hz to 100kHz 40 Shutdown Threshold VOUT = Off to On VOUT = On to Off l l SHDN Pin Current (Note 10) 1.55V < VIN < 40V VSHDN = 0V VSHDN = 40V l l TEMP Voltage (Note 13) TJ = 25C TJ = 125C TEMP Error (Note 13) 0C < TJ < 125C, ITEMP = 0 0C < TJ < 125C, ITEMP = 0A to 80A ITEMP Thermal Limit Current Threshold 25C < TJ < 125C IMON Output Current VIN = VOUT(NOMINAL) + 0.55V (Note 15) ILOAD = 20mA, RMON = 1k ILOAD = 500mA, RMON = 330 ILOAD = 1A, RMON = 330 ILOAD = 1.5A, RMON = 330 ILOAD = 2.1A, RMON = 330 Output Current Sharing Error (Note 14) RMON = 330, IOUT(MASTER) = 2.1A TRACK Pin Pull-Up Current VTRACK = 750mV l l l l l l l 1.12 0.85 1.22 1.03 15 l l l l l RPWRGD Reference Voltage 1.55V < VIN < 40V l RPWRGD Reference Current 1.55V < VIN < 40V l mA mA mA mA mA mA A VRMS 1.32 V V 1 35 A A 0.25 1.25 -0.09 -0.1 UNITS V V 0.09 V V 95 100 105 A 5 440 0.95 1.43 2.02 20 500 1.00 1.50 2.10 75 560 1.05 1.57 2.18 A A mA mA mA -10 0 10 % 7 15 25 A 390 400 410 mV 48.75 50 51.25 A RPWRGD Reference Voltage Hysteresis 1.55V < VIN < 40V 2.4 mV RPWRGD Reference Current Hysteresis 1.55V < VIN < 40V 300 nA PWRGD VOL IPWRGD = 200A (Fault Condition) l 200 mV 17 25 s 1 A PWRGD Internal Time Delay VOL TO VOH (Rising Edge) l PWRGD Pin Leakage Current VPWGRD = 32V, VRPWGRD = 500mV l CDC Reference Voltage 1.55V < VIN < 40V, IMON = 0V l 390 400 410 mV CDC/VIMON Voltage Gain 1.55V < VIN < 40V, 0 < ICDC < 20A, VIMON = 800mV to 0 l 0.320 0.333 0.343 V/V Ripple Rejection VIN = 1.9V (AVG), VRIPPLE = 0.5VP-P, VOUT = 1V fRIPPLE = 120Hz, ILOAD = 2.1A 65 80 Internal Current Limit VIN = 1.55V VIN = VOUT(NOMINAL) + 0.55V (Notes 7, 12), VOUT = -5% l l 2.2 2.2 2.4 2.9 A A ILIM Threshold Voltage 1.55V < VIN < 40V l 775 800 825 mV Input Reverse-Leakage Current VIN = -40V, VOUT = 0 l 2 mA Reverse-Output Current (Note 11) VOUT = 32V, VIN = 0, VSHDN = 0 1 10 A Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Absolute maximum input-to-output differential voltage is not achievable with all combinations of rated IN pin and OUT pin voltages. With the IN pin at 45V, the OUT pin may not be pulled below 0V. The total IN to OUT differential voltage must not exceed 45V. 4 8 55 dB Note 3: The LT3086 is tested and specified under pulse load conditions such that TJ TA. The LT3086E is 100% production tested at TA = 25C and performance is guaranteed from 0C to 125C. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3086I is guaranteed over the full -40C to 125C operating junction temperature range. The LT3086MP is 100% tested over the -55C to 125C operating junction temperature range. The LT3086H is 100% tested For more information www.linear.com/LT3086 3086fb LT3086 Electrical Characteristics at the 150C operating junction temperature. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125C. Note 4: The LT3086 is tested and specified for these conditions with the SET pin connected to the OUT pin, VOUT = 0.4V. Note 5: Maximum junction temperature limits operating conditions. The regulated output voltage specification does not apply for all possible combinations of input voltage and output current. Limit the output current range if operating at large input-to-output voltage differentials. Limit the input-to-output voltage differential if operating at maximum output current. Current limit foldback limits the maximum output current as a function of input-to-output voltage. See Current Limit vs VIN - VOUT in the Typical Performance Characteristics section. Note 6: Load regulation is Kelvin-sensed at the package. Note 7: To satisfy minimum input voltage requirements, the LT3086 is tested and specified for these conditions with a 32k resistor between OUT and SET for a 2V output voltage. Note 8: Dropout voltage is the minimum input-to-output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage equals: (VIN - VDROPOUT). For low output voltages and certain load conditions, minimum input voltage requirements limit dropout voltage. See the Minimum Input Voltage curve in the Typical Performance Characteristics section. Note 9: GND pin current is tested with VIN = VOUT(NOMINAL) + 0.55V and PWRGD pin floating. GND pin current increases in dropout. See GND pin current curves in the Typical Performance Characteristics section. Note 10: SHDN pin current flows into the SHDN pin. Note 11: Reverse-output current is tested with the IN pin grounded and the OUT pin forced to a voltage. The current flows into the OUT pin and out of the GND pin. Note 12: The IC includes overtemperature protection circuitry that protects the device during momentary overload conditions. Junction temperature exceeds 125C (LT3086E, LT3086I, LT3086MP) or 150C (LT3086H) when the overtemperature circuitry is active unless thermal limit is externally set by loading the TEMP pin. Continuous operation above the specified maximum junction temperature may impair device reliability. Note 13: The TEMP output voltage represents the average die temperature next to the power transistor while the center of the transistor can be significantly hotter during high power conditions. Due to power dissipation and temperature gradients across the die, the TEMP output voltage measurement does not guarantee that absolute maximum junction temperature is not exceeded. Note 14: Output current sharing error is the difference in output currents of a slave relative to its master when two LT3086 regulators are paralleled. The device is tested as a slave with VTRACK = 0.693V, RMON = 330 and VSET = 0.4V, conditions when an ideal master is outputting 2.1A. The specification limits account for the slave output tracking error from 2.1A and the worst-case error that can be contributed by a master: the maximum deviation of VSET from 0.4V and IMON from 2.1mA. Note 15: The LT3086 is tested and specified for these conditions with the IMON and ILIM pins tied together. Note 16: The LT3086 requires a minimum load current to ensure proper regulation and stability. Typical Performance Characteristics Typical Dropout Voltage Guaranteed Dropout Voltage 550 500 500 DROPOUT VOLTAGE (mV) 450 400 350 TJ = 125C 250 TJ = 25C 200 150 100 50 0 0 0.3 0.6 0.9 1.2 1.5 OUTPUT CURRENT (A) 1.8 2.1 3086 G01 Dropout Voltage 550 = TEST POINTS 500 450 450 400 DROPOUT VOLTAGE (mV) GUARANTEED DROPOUT VOLTAGE (mV) 550 300 TA = 25C, unless otherwise noted. TJ 125C 350 300 TJ 25C 250 200 150 400 350 300 200 150 100 50 50 0 0.3 0.6 0.9 1.2 1.5 OUTPUT CURRENT (A) 1.8 2.1 3086 G02 IL = 1.5A IL = 1A 250 100 0 IL = 2.1A IL = 500mA IL = 100mA IL = 1mA 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G03 3086fb For more information www.linear.com/LT3086 5 LT3086 Typical Performance Characteristics SET Pin Reference Voltage SET Pin Reference Current 51.0 404 402 400 398 396 394 392 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) Quiescent Current 2.0 IL = 1mA 50.8 50.6 QUIESCENT CURRENT (mA) IL = 1mA 406 SET PIN REFERENCE CURRENT (A) 50.4 50.2 50.0 49.8 49.6 49.4 49.2 3086 G04 2.0 VSHDN = VIN 1.2 1.0 0.8 0.6 0.4 0.2 0 5 10 1.4 1.2 VSHDN = VIN 1.0 0.8 0.6 35 0 40 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 GND PIN CURRENT (mA) GND PIN CURRENT (mA) 50 RL = 0.19, IL = 2.1A RL = 0.267, IL = 1.5A 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 6 4 3 9 10 3086 G10 RL = 4 IL = 100mA RL = 400, IL = 1mA 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 5 0 RL = 50 IL = 100mA 3086 G09 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 TJ = 25C 80 VSHDN = VIN RSET = 92k 70 60 RL = 2.381 IL = 2.1A 50 40 RL = 3.333 IL = 1.5A 30 20 10 RL = 5k, IL = 1mA 0 10 90 4 3 9 GND Pin Current, VOUT = 5V (Heavy Load) RL = 10 IL = 500mA 1 8 RL = 0.8 IL = 500mA 5 0 10 7 2 RL = 0.4, IL = 1A 0 9 TJ = 25C 9 VSHDN = VIN RSET = 92k 8 60 0 6 1 VSHDN = 0 10 TJ = 25C 80 VSHDN = VIN RSET = 0 70 10 7 GND Pin Current, VOUT = 5V (Light Load) 90 20 TJ = 25C 9 VSHDN = VIN RSET = 0 8 3086 G08 GND Pin Current, VOUT = 0.4V (Heavy Load) 30 0.4 2 3086 G07 40 0.6 10 0.4 0.2 15 20 25 30 INPUT VOLTAGE (V) 0.8 GND Pin Current, VOUT = 0.4V (Light Load) TJ = 25C RSET = 92k IL = 0 1.6 VSHDN = 0 0 1.0 3086 G06 Quiescent Current, VOUT = 5V 1.8 1.4 1.2 VSHDN = 0 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) GND PIN CURRENT (mA) Quiescent Current, VOUT = 0.4V TJ = 25C 1.8 RSET = 0 IL = 0 1.6 VSHDN = VIN 1.4 3086 G05 QUIESCENT CURRENT (mA) QUIESCENT CURRENT (mA) 2.0 VIN = 6V 1.8 VOUT = 5V IL = 0 1.6 0.2 49.0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) GND PIN CURRENT (mA) SET PIN REFERENCE VOLTAGE (mV) 408 TA = 25C, unless otherwise noted. 10 3086 G11 0 RL = 5, IL = 1A 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 10 3086 G12 3086fb 6 For more information www.linear.com/LT3086 LT3086 Typical Performance Characteristics GND Pin Current vs ILOAD 70 GND Pin Current vs Temperature 70 VIN = VOUT(NOMINAL) + 0.55V VIN = VOUT(NOMINAL) + 0.55V 1.35 -40C 30 25C 125C 20 IL = 2.1A 40 30 IL = 1.5A 20 IL = 1A 10 0 0.3 0.6 0.9 1.2 1.5 OUTPUT CURRENT (A) 1.8 3086 G13 SHDN PIN INPUT CURRENT (A) 14 12 10 8 6 4 VSHDN = 40V 16 14 12 10 8 VSHDN = 6V 6 4 2 2 0 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 10 15 20 25 30 SHDN PIN VOLTAGE (V) 35 40 408 RPWRGD Pin Threshold IL = 0 404 OUTPUT RISING 400 398 1.10 ON TO OFF 1.05 1.00 SHDN TIED TO VIN VSHDN VIN - 0.3V, VIN > VIN(MIN) 0.90 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G14 300 275 250 225 ON TO OFF 200 175 150 OFF TO ON 125 100 75 50 25 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G17 RPWRGD Pin Input Current 51.0 406 402 1.15 3086 G16 3086 G15 RPWRGD PIN INPUT CURRENT (A) 5 RPWRGD PIN THRESHOLD (mV) 0 1.20 OUT Over IN Shutdown Threshold 18 16 OFF TO ON 1.25 SHDN Pin Input Current 20 VIN = VSHDN 18 1.30 0.95 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G13a 2.1 SHDN Pin Input Current 20 IL = 500mA OUT OVER IN SHUTDOWN THRESHOLD (mV) 40 50 SHDN PIN THRESHOLD (V) 50 10 SHDN PIN INPUT CURRENT (A) SHDN Pin Threshold 1.40 60 GND PIN CURRENT (mA) GND PIN CURRENT (mA) 60 0 TA = 25C, unless otherwise noted. OUTPUT FALLING 396 394 392 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G18 50.8 IL = 0 50.6 50.4 50.2 OUTPUT RISING 50.0 49.8 49.6 OUTPUT FALLING 49.4 49.2 49.0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G19 3086fb For more information www.linear.com/LT3086 7 LT3086 Typical Performance Characteristics PWRGD Output Low Voltage 160 140 120 100 80 60 40 20 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) IPWRGD = 200A 21 V TO V OL OH 20 1050 1040 19 IOUT/IMON RATIO (A/A) IPWRGD = 200A 18 17 16 15 14 13 20 15 IL = 0 10 940 10 820 8 815 6 810 805 800 795 790 785 8 0.24 6 0.23 -6 2 0 -2 -4 -10 TRACK = 400mV -8 0.18 3086 G26 100 200 300 400 500 600 700 800 ILIM PIN VOLTAGE (mV) 3086 G25 TRACK Pin Pull-Up Current TRACK = 750mV TRACK = 0mV TRACK = 400mV 0.17 0.16 -10 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 0 30 0.21 0.19 2.1 -8 0.22 0.20 1.8 4 TRACK Amplifier Gain 0.25 TRACK AMPLIFIER GAIN (V/V) TRACK AMPLIFIER INPUT OFFSET (mV) TRACK Amplifier Input Offset TRACK = 0mV 0.6 0.9 1.2 1.5 OUTPUT CURRENT (A) ILIM Pin Input Current 3086 G24 10 -2 0.3 -6 3086 G23 TRACK = 750mV 0 3086 G22 825 775 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) -4 970 950 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 4 TJ = 25C 980 10 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 780 0 990 960 5 2 1000 ILIM PIN CURRENT (A) ILIM PIN THRESHOLD (mV) CURRENT MONITOR (VIMON/RMON) (A) IL = 20mA TJ = -40C 1010 ILIM Pin Threshold Voltage 30 IMON = VIMON/RMON IMON TIED TO ILIM RMON = 330 VIN = VOUT + 0.55V 3086 G21 IMON TIED TO ILIM RMON = 1k VIN = VOUT + 0.55V 35 1020 11 Current Monitor at Light Load 40 TJ = 125C 1030 12 3086 G20 25 IOUT/IMON Ratio 1060 0.15 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G27 TRACK PIN PULL-UP CURRENT (A) 180 PWRGD Internal Time Delay 22 PWRGD INTERNAL TIME DELAY (s) PWRGD OUTPUT LOW VOLTAGE (mV) 200 TA = 25C, unless otherwise noted. 25 20 15 10 5 0 0 0.2 0.4 0.6 0.8 1.0 TRACK PIN VOLTAGE (V) 1.2 1.4 3086 G28 3086fb 8 For more information www.linear.com/LT3086 LT3086 Typical Performance Characteristics TRACK Pin Pull-Up Current CDC Pin Reference Voltage TRACK = 0 20 15 TRACK = 750mV 10 5 VIMON = 800mV TO 0mV 0.341 RCDC = RCDC = 406 RMON = 0 IL = 0 CDC/VIMON VOLTAGE GAIN (V/V) 25 404 402 400 398 396 394 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 0.337 0.335 TJ = 25C 0.331 TJ = 125C 0.329 0.327 0.329 0.327 0.323 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G31 TJ = -40C 2.0 TJ = 25C TJ = -40C 3 2 0 1.0 0.5 3.0 TEMP = VTEMP/(10mV/C) -1.0 -2.0 0 1 2 3 4 5 6 7 CDC PIN VOLTAGE (V) 8 9 10 -2.5 1.8 1.5 1.2 0.9 0.6 96 0.3 95 0 25 50 75 100 125 TEMPERATURE (C) CURRENT LIMIT (A) 2.1 CURRENT LIMIT (A) 2.4 2.1 FALLING 150 3086 G35 TJ = -40C TJ = 25C 0 150 VIN = 1.55V 2.7 VOUT = 0V 2.4 97 75 100 125 TEMPERATURE (C) 3.0 VOUT = -5% 102 98 50 Internal Current Limit vs Temperature 103 99 25 3086 G34 Internal Current Limit vs VIN - VOUT 2.7 RISING ITEMP = 80A -0.5 3086 G33 ITEMP Thermal Limit Threshold 100 ITEMP = 0 0 -1.5 TJ = 125C 3086 G32 101 TEMP = VTEMP/(10mV/C) 1.5 4 0.323 10 20 30 40 50 60 70 80 90 100 RCDC (k) TEMP Pin Error VOUT > VOUT(NOMINAL) 5 1 THERMAL LIMIT THRESHOLD (A) 0.331 2.5 6 0.325 0 0.333 TEMP PIN ERROR (C) 0.339 CDC PIN CURRENT (mA) CDC/VIMON VOLTAGE GAIN (V/V) 8 7 0.333 0.335 CDC Pin Internal Clamp Fault Current VIMON = 800mV TO 0mV 0.341 0.337 3086 G30 CDC Amplifier Gain 0.343 0.339 0.325 392 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G29 104 CDC Amplifier Gain 0.343 408 CDC PIN REFERENCE VOLTAGE (mV) TRACK PIN PULL-UP CURRENT (A) 30 105 TA = 25C, unless otherwise noted. TJ = 125C 5 10 15 20 25 30 35 INPUT/OUTPUT DIFFERENTIAL (V) 40 3086 G36 1.8 1.5 1.2 0.9 0.6 0.3 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G37 3086fb For more information www.linear.com/LT3086 9 LT3086 Typical Performance Characteristics Reverse-Output Current Reverse-Output Current 0.3 SET 0.1 OUT, RPWRGD 0 4 8 12 16 20 24 OUTPUT VOLTAGE (V) 28 VIN = 0V VSHDN = 0V 60 V OUT = 5V RSET = 92k 50 RPWRGD = 82k 40 OUT 30 SET 20 10 RPWRGD Input Ripple Rejection VOUT = 5V 40 30 RIPPLE REJECTION (dB) RIPPLE REJECTION (dB) COUT = 22F 10 70 60 50 100 100 50 VOUT = 5V 40 30 RIPPLE REJECTION (dB) RIPPLE REJECTION (dB) 80 60 CSET = 0 30 100 VOUT = 0.4V VOUT = 1V COUT = 22F 40 Ripple Rejection vs Temperature 70 8 12 16 20 24 28 OUTPUT VOLTAGE (V) 1M 30 COUT = 22F 60 CSET = 0 50 40 30 COUT = 10F 10 VTEMP = 0.25V VIN = 5.5V + 50mVRMS RIPPLE 0 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) 3086 G42a 10M 3086 G42 5V, 2.1A Ripple Rejection vs VIN - VOUT 5V, 1A Ripple Rejection vs VIN - VOUT 60 40 36 20 COUT = 10F 50mVRMS RIPPLE ON VIN 90 IL = 2.1A COUT = 10F 80 C SET = 10nF RIPPLE AT f = 10kHz 70 VTEMP = 0.25V 50 32 CSET = 10nF 70 RIPPLE AT f = 100kHz RIPPLE AT f = 1MHz 100 50mVRMS RIPPLE ON VIN 90 COUT = 10F CSET = 10nF 80 V TEMP = 0.25V 70 RIPPLE AT f = 10kHz 60 50 40 30 20 20 20 10 10 10 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G43 IL = 2.1A, CSET = 0, VTEMP = 0.25V, VIN = 1.9V + 0.5VP-P RIPPLE (FOR VOUT = 0.4V, 1V) VIN = 5.9V + 0.5VP-P RIPPLE (FOR VOUT = 5V) RIPPLE AT f = 120Hz 4 80 10 VTEMP = 0.25V VIN = 5.7V + 50mVRMS RIPPLE 0 10 100 1k 10k 100k FREQUENCY (Hz) 1k 10k 100k 1M 10M FREQUENCY (Hz) 3086 G41 IL = 2.1A, CSET = 0, VTEMP = 0.25V, VIN = 1.6V + 50mVRMS RIPPLE (FOR VOUT = 0.4V) VIN = 5.7V + 50mVRMS RIPPLE (FOR VOUT = 5V) 90 90 CSET = 10nF 20 COUT = 10F 10 0 5V, 1A Input Ripple Rejection RIPPLE REJECTION (dB) 90 80 20 5 100 RIPPLE REJECTION (dB) VOUT = 0.4V 50 10 5V, 2.1A Input Ripple Rejection 80 60 15 3086 G40 100 70 20 3086 G39 100 90 VIN > VOUT VSET = 500mV 25 CURRENT FLOWS THROUGH OUT PIN TO GND 0 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 32 3086 G38 0 OUTPUT OVERSHOOT PULL-DOWN (mA) REVERSE OUTPUT CURRENT (A) REVERSE OUTPUT CURRENT (mA) TJ = 25C VIN = 0V 0.5 VOUT = VSET = VRPWRGD CURRENT FLOWS THROUGH PINS TO GROUND 0.4 0 Overshoot Pull-Down Current 30 70 0.6 0.2 TA = 25C, unless otherwise noted. 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 AVERAGE INPUT-TO-OUTPUT DIFFERENTIAL (V) 3086 G44 RIPPLE AT f = 1MHz RIPPLE AT f = 100kHz 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 AVERAGE INPUT/OUTPUT DIFFERENTIAL (V) 3086 G44a 3086fb 10 For more information www.linear.com/LT3086 LT3086 Typical Performance Characteristics 0.6 IL = 1mA TO 2.1A 0.4 0.2 IL = 1mA TO 1.5A 0 -0.2 -0.4 -0.6 -0.8 -1.0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 80 VIN = VOUT(NOMINAL) + 0.55V 70 60 50 40 IL = 1mA TO 2.1A 30 20 10 IL = 1mA TO 1.5A 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G46 3086 G45 0 1.8 -10 1.6 MINIMUM INPUT VOLTAGE (V) DD-PAK/TO-220 -20 DFN/TSSOP -40 -50 -60 -70 VIN = 1.55V TO 40V IL = 1mA 0.1 CSET = 100nF CSET = 10nF 0.01 10 100 IL = 100mA 1.2 1.0 0.8 0.6 0.4 VIN = 1.55V TO 40V 0.9 IL = 1mA 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G046a CSET = 1nF 1k 10k FREQUENCY (Hz) 100k 3086 G49 10 Output Noise Spectral Density, CSET = 0 IL = 2.1A COUT = 10F VTEMP = 0.25V VOUT = 3.3V VOUT = 5V 1 VOUT = 2.5V VOUT = 1.2V 0.1 VOUT = 0.4V 0.01 10 100 1k 10k FREQUENCY (Hz) 100k 3086 G47 350 CSET = 100pF 1 1.4 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) Output Noise Spectral Density vs CSET VOUT = 5V IL = 2.1A COUT = 10F VTEMP = 0.25V IL = 2.1A 0.2 -80 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 G046b 10 1.0 Minimum Input Voltage OUTPUT NOISE VOLTAGE (VRMS) OUTPUT NOISE SPECTRAL DENSITY (V/Hz) CHANGE IN SET PIN REFERENCE CURRENT (nA) Reference Current Line Regulation -30 CHANGE IN SET PIN REFERENCE VOLTAGE (mV) VIN = VOUT(NOMINAL) + 0.55V OUTPUT NOISE SPECTRAL DENSITY (V/Hz) 0.8 Reference Voltage Line Regulation 3086 G48 RMS Output Noise vs Load Current, CSET = 0 COUT = 10F COUT = 22F 300 f = 10Hz TO 100kHz VTEMP = 0.25V 250 70 VOUT = 5V 200 VOUT = 3.3V 150 VOUT = 2.5V 100 VOUT = 1.2V 50 0 100 VOUT = 0.4V 1m 10m 100m LOAD CURRENT (A) 1 10 3086 G50 OUTPUT NOISE VOLTAGE (VRMS) 1.0 Reference Current Load Regulation CHANGE IN SET PIN REFERENCE CURRENT (nA) CHANGE IN SET PIN REFERENCE VOLTAGE (mV) Reference Voltage Load Regulation RMS Output Noise vs Load Current, CSET = 10nF COUT = 10F COUT = 22F 60 f = 10Hz TO 100kHz VTEMP = 0.25V 50 VOUT = 5V 40 30 VOUT = 0.4V 20 10 0 100 1m 10m 100m LOAD CURRENT (A) 1 10 3086 G51 3086fb For more information www.linear.com/LT3086 11 LT3086 Typical Performance Characteristics RMS Output Noise vs Load Current f = 10Hz TO 100kHz VOUT = 0.4V 50 VTEMP = 0.25V 250 COUT = 22F 40 30 20 COUT = 100F COUT = 47F 10 RMS Output Noise vs Feedforward Capacitor (CSET) f = 10Hz TO 100kHz IL = 2.1A COUT = 10F VTEMP = 0.25V 225 COUT = 10F OUTPUT NOISE VOLTAGE (VRMS) OUTPUT NOISE VOLTAGE (VRMS) 60 TA = 25C, unless otherwise noted. 200 175 VOUT = 5V 150 VOUT = 3.3V 125 100 75 VOUT = 2.5V 50 VOUT = 1.2V 25 0 100 1m 10m 100m LOAD CURRENT (A) 1 VOUT = 0.4V 0 10p 10 100p 1n 10n FEEDFORWARD CAPACITOR CSET (F) 3086 G52 Output Voltage Noise 3086 G53 Load Transient Response Load Transient Response CSET = 0 50 0 -50 CSET = 10nF -100 -150 3086 G54 LOAD CURRENT (A) VOUT = 5V RSET = 92k CSET = 10nF COUT = 10F IL = 2.1A f = 10Hz TO 100kHz VIN = 5.5V 150 VOUT = 5V 100 COUT = 10F LOAD CURRENT (A) TIME 1ms/DIV 300 OUTPUT VOLTAGE DEVIATION (mV) OUTPUT VOLTAGE DEVIATION (mV) 200 VOUT 100V/DIV 3 IL = 500mA TO 1.5A 2 1 0 0 100n 20 40 60 80 100 120 140 160 TIME (s) VIN = 5.5V 200 VOUT = 5V CSET = 10nF 100 COUT = 10F CERAMIC 0 -100 COUT = 10F CERAMIC + 100F TANTALUM -200 3 IL = 210mA TO 2.1A 2 1 0 0 40 80 120 160 200 240 280 320 TIME (s) 3086 G55 Line Transient Response Start-Up Response 0 -5 VIN = 5.55V TO 12V 12 8 6 0 RL = 5k (IL = 1mA) 3 2 1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 TIME (ms) 3086 G57 1.5 1.0 Start-Up Time vs CSET IL = 1mA SETTLING TO 1% VOUT = 5V RL = 2.38 (IL = 2.1A) 0 10 4 COUT = 10F 5 RSET = 92k CSET = 0 4 100 START-UP TIME (ms) IL = 2.1A 10 VOUT = 5V COUT = 10F 5 SHDN PIN VOLTAGE (V) INPUT VOLTAGE (V) 6 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE DEVIATION (mV) 15 -10 3086 G56 10 VOUT = 3.3V 1 VOUT = 1.2V 0.1 VOUT = 2.5V 0.5 0 0 20 40 60 80 90 TIME (s) 100 120 140 3086 G58 0.01 10p 100p 1n 10n 100n FEEDFORWARD CAPACITOR, CSET (F) 3086 G59 3086fb 12 For more information www.linear.com/LT3086 LT3086 Pin Functions (DFN/TSSOP/DD-Pak/TO-220) GND (Pins 1, 16, Exposed Pad Pin 17/Pins 1, 8, 9, 16, Exposed Pad Pin 17/Pin 4/Pin 4): Ground. The exposed pad of the DFN and TSSOP packages as well as the Tab of the DD-Pak and TO-220 packages is an electrical connection to GND. To ensure proper electrical and thermal performance, tie the exposed pad or tab directly to the remaining GND pins of the relevant package and the PCB ground. GND pin current is typically 1.2mA at zero load and increases to about 44mA at full load. ILIM (Pin 2/Pin 2/Pin 1/Pin 1): External Current Limit Programming. This pin externally programs current limit if connected to IMON and a resistor to GND. Current limit activates if the voltage at ILIM equals 0.8V. Current limit equals: 1000 * (0.8V/RMON). An internal clamp typically limits the ILIM voltage to 1V. If external current limit is set to less than 1A, connect a series 1k-10nF network in parallel with the RMON resistor for stability. Internal current limit foldback overrides externally programmed current limit if VIN - VOUT differential voltage is excessive. If external current limit programming is not used, then ground this pin. IMON (Pin 3/Pin 2/Pin 1/Pin 1): Output Current Monitor. This pin sources a current equal to 1/1000 of output load current. Connecting a resistor from IMON to GND programs a load current dependent voltage for monitoring by an ADC. If IMON connects to ILIM, current limit is externally programmable. CDC (Pin 4/Pin 3/NA/NA): Cable Drop Compensation. Connecting a single resistor (RCDC) between the CDC and SET pins provides programmable cable drop compensation that cancels output voltage errors caused by resistive connections to the load. A resistor (RMON) from IMON to GND is also required to enable Cable Drop Compensation. Choose RMON first based on required current limit. RMON = 0.8V * 1000/ILIM Calculate the value of RCDC with this formula: RCDC = (RMON * RSET)/(3000 * RWIRE) where RWIRE is the total cable or wire resistance to and from the load. From a practical application standpoint, LTC recommends limiting cable drop compensation to 20% of VOUT for applications needing good regulation. The limiting factor is variations in wire temperature as copper wire resistance changes about 19% for a 50C temperature change. If output regulation requirements are loose (e.g., when using a secondary regulator), cable drop compensation of up to 50% may be used. RPWRGD (Pin 5/Pin 4/NA/NA): Power Good Threshold Voltage Programming. This pin is the input to the power good comparator. Connecting a resistor between OUT and RPWRGD programs an adjustable power good threshold voltage. The threshold voltage is 0.4V on the RPWRGD pin, and a 50A current source is connected from RPWRGD to GND. If the voltage at RPWRGD is less than 0.4V, the PWRGD flag asserts and pulls low. If the voltage at RPWRGD is greater than 0.4V, the PWRGD flag de-asserts and becomes high impedance. For most applications, PWRGD is pulled high with a pull-up resistor. Calculate the value of RPWRGD with this formula: RPWRGD = (X * VOUT(NOMINAL) - 0.4V)/50A where X is normally in the 85% to 95% range. A 17s deglitching filter suppresses false tripping of the PWRGD flag at the rising edge of PWRGD with instant reset. Hysteresis at the RPWRGD pin is typically 0.6% on the 0.4V threshold and the 50A current source. SET (Pin 6/Pin 5/Pin 2/Pin 2): Output Voltage Programming. This pin is the error amplifier's inverting terminal. It regulates to 0.4V and a 50A current source is connected from SET to GND. Connecting a single resistor from OUT to SET programs output voltage. Calculate the value of the required resistor from the formula: RSET = (VOUT - 0.4V)/50A Connecting a capacitor in parallel with RSET provides output voltage soft-start capability, improves transient response and decreases output voltage noise. The LT3086 error amplifier design is configured so that the regulator always operates in unity-gain. OUT (Pins 7, 8/Pins 6, 7/Pin 3/Pin 3): Output. These pin(s) supply power to the load. Connect all OUT pins together on the DHD and FE packages for proper operation. Stability requirements demand a minimum 10F ceramic output capacitor with an ESR less than 100m to prevent oscillations. Large load transients require larger output capacitance to limit peak voltage transients. Permissible 3086fb For more information www.linear.com/LT3086 13 LT3086 Pin Functions (DFN/TSSOP/DD-Pak/TO-220) output voltage range is 0.4V to 32V. The LT3086 requires a 1mA minimum load current to ensure proper regulation and stability. IN (Pins 10, 11/Pins 10, 11/Pin 5/Pin 5): Input. These pin(s) supply power to the device. Connect all IN pins together on the DHD and FE packages for proper operation. The LT3086 requires a local IN bypass capacitor if it is located more than a few inches from the main input filter capacitor. In general, battery output impedance rises with frequency, so adding a bypass capacitor in battery powered circuits is advisable. A 10F minimum input capacitor generally suffices. The IN pin(s) withstand a reverse voltage of 45V. The device limits current flow and no negative voltage appears at OUT. The device protects itself and the load against batteries that are plugged in backwards. pin also incorporates the ability to program a thermal limit temperature lower than the internal typical thermal shutdown temperature of 165C. Tying a resistor from TEMP to GND programs the thermal limit temperature with a 100A trip point. Calculate the value of the resistor from the formula: 10mV TSHDN * C R TEMP = 100A where TSHDN is the desired die thermal limit temperature. There are several degrees of hysteresis in the thermal shutdown that cycles the regulator output on and off. Limit the capacitance on the TEMP pin to less than 100pF. To prevent saturation in the TEMP output device, ensure that VIN is higher than VTEMP by 250mV. SHDN (Pin 12/Pin 12/Pin 6/Pin 6): Shutdown/UVLO. Pulling the SHDN pin typically below 1V puts the LT3086 into a low power state and turns the output off. Quiescent current in shutdown is typically less than 1A. The SHDN pin turn-on threshold is typically 1.22V. This pin may either be used as a shutdown function or as an undervoltage lockout function. If using this pin as an undervoltage lockout function, use a resistor divider between IN and GND with the tap point tied to SHDN. If using the pin as a shutdown function, drive the pin with either logic or an open-collector/drain with a pull-up resistor. The resistor supplies the pull-up current to the open-collector/drain logic, normally several microamperes, and the SHDN pin current, typically less than 10A at 6V. If unused, connect the SHDN pin to IN. TRACK (Pin 14/Pin 14/NA/NA): Track pin for paralleling. The TRACK pin allows multiple LT3086s to be paralleled in a master/slave(s) configuration for higher output current applications. This also allows heat to be spread out on the PCB. This circuit technique does not require ballast resistors and does not degrade load regulation. Tying the TRACK pin of the slave device(s) to the IMON/ILIM pins of the master device enables this function. If the TRACK function is unused, TRACK is in a default clamped high state. A TRACK pin voltage below 1.2V on slave device (s) shuts off the internal 50A reference current at SET such that only the 50A reference current of the master device is active. All SET pins must be tied together in a master/ slave configuration. TEMP (Pin 13/Pin 13/Pin 7/Pin 7): Die Junction Temperature. This pin outputs a voltage indicating the LT3086 average die junction temperature. At 25C, this pin typically outputs 250mV. The TEMP pin slope equals 10mV/C so that at 125C, this pin typically outputs 1.25V. This pin does not read temperatures less than 0C. The TEMP pin is not meant to be an accurate temperature sensor, but is useful for debug, monitoring and calculating thermal resistance of the package mounted to the PCB. The TEMP PWRGD (Pin 15/Pin 15/NA/NA): Power Good Flag. The PWRGD pin is an open-collector logic pin connected to the output of the power good comparator. PWRGD asserts low if the RPWRGD pin is less than 400mV. The maximum low output level of 200mV over temperature is defined for 200A of sink current. If RPWRGD is greater than 400mV, the PWRGD pin de-asserts and becomes high impedance. The PWRGD pin may be pulled to 36V without damaging any internal circuitry regardless of the input voltage. 3086fb 14 For more information www.linear.com/LT3086 LT3086 Block Diagram 0.05 IN QPOWER 50 OUT 120mV + 300mV - + + - CABLE DROP COMP INTERNAL ILIMIT CURRENT MONITOR IOUT IMON = 1000 CDC - 40k 120k IMON SET - 300mV + EXTERNAL ILIMIT 125k ILIM ERROR AMP - + 75k 900mV 1.3V 900mV 100k 100k - 13A TRACK gm = 8 TRACK + EN 25k - EN TRACK ENABLE 1.2V 50A + PWRGD VREF 400mV + 17s DELAY RPWRGD RISING EDGE RPWRGD - IN 50A 1.22V + + TEMP 100A SHUTDOWN CONTROL - - TEMP VTEMP 10mV/C 25C = 250mV SHDN GND 3086 BD 3086fb For more information www.linear.com/LT3086 15 LT3086 Applications Information The LT3086 is a multifunction, low dropout, low noise, linear regulator with shutdown, and adjustable power good. The device supplies 2.1A with a typical dropout voltage of 330mV and operates over a wide 1.4V to 40V input supply range. The operating quiescent current is 1.2mA and drops to less than 1A in shutdown. The LT3086 regulator optimizes stability and transient response with a minimum low ESR 10F ceramic output capacitor. A single resistor sets the output voltage from 0.4V to 32V. Similarly, a single resistor sets the power good threshold. The regulator typically provides 0.1% line regulation and 0.1% load regulation. The LT3086 has convenient programmable diagnostic features. An output current monitor, that is typically 1/1000 of the output current, can set the current limit lower than the typical 2.4A internal limit. A temperature monitor, that is typically 10mV/C where 250mV = 25C, can set the thermal limit lower than the typical 165C internal thermal limit. For applications where the voltage error at the load is caused by the resistance in the connections between the LT3086 and the load, programmable cable drop compensation cancels the error with a single resistor. Multiple LT3086 regulators can be paralleled for higher load currents and heat spreading without the need for external ballast resistors. During load transients where the output overshoots (regulated output voltages of 0.8V or higher), an internal pull-down current activates pulling about 15mA from the OUT pin to ground. The pull-down current is disabled when the output is at or below regulation. The regulator and the output overshoot pull-down turn off when the output voltage is pulled higher than the input by typically 225mV. Curves of OUT Over IN Shutdown Threshold appear in the Typical Performance Characteristics section. Internal protection circuitry includes reverse-battery protection, reverse-output protection, reverse-current protection, current limit with foldback and thermal shutdown. IN OUT VOUT LT3086 VIN SHDN RSET SET VOUT =ISET *RSET + 0.4V IMON ILIM VIMON RMON ISET = 50A VOUT - 0.4V 50A OUTPUT RANGE = 0.4V TO 32V RSET = GND 3086 F01 Figure 1. Programming Output Voltage Table 1. Output Voltage RSET Values VOUT (V) IDEAL RSET () SINGLE 1% DUAL 1% VOUT ERROR FOR SINGLE 1% 1 12k 12.1k 11.8k + 200 0.5% 1.2 16k 16.2k 15.8k + 200 0.8% 1.5 22k 22.1k 21.5k + 511 0.3% 1.8 28k 28k N/A 0% 2 32k 32.4 31.6k + 383 1.0% 2.5 42k 42.2k 41.2k + 825 0.4% 3.3 58k 57.6k 57.6k + 383 -0.6% 5 92k 90.9k 90.9k + 1.1k -1.1% 12 232k 232k N/A 0% Table 1 shows the nearest 1% resistor values for some common output voltages, along with the output error caused by not using the ideal resistance value. These errors can be as high as 1% because of the 2% spacing between standard 1% resistors. If tighter output tolerance is required, consider using more accurate resistors. Alternatively, the resistance of RSET can be fine-tuned by adding a low value 1% resistor in series, see Table 1 dual 1% column. Programming Power Good Programming Output Voltage The LT3086 has an output voltage range of 0.4 to 32V. The output voltage is programmed with a single resistor, RSET, connected from OUT to the SET pin, as shown in Figure 1. The SET pin has an internal 50A current source 16 to ground that generates a voltage drop across RSET. The device servos the output to maintain the SET pin voltage at 0.4V referenced to ground. Calculate the output voltage using the formula in Figure 1. Curves of SET Pin Reference Voltage and Current vs Temperature appear in the Typical Performance Characteristics section. The adjustable power good threshold is programmed with a single resistor, RPGSET, similar to how the output voltage is programmed by RSET. Similar to the SET pin, RPWRGD determines the power good threshold with the For more information www.linear.com/LT3086 3086fb LT3086 Applications Information combination of a 0.4V reference voltage and a precision 50A pull-down current. The power good signal pulls high if the voltage on RPWRGD increases above 0.4V. Built-in hysteresis of typically 0.6% exist for both the 0.4V voltage threshold and the 50A current source. Connecting a resistor between the RPWRGD and PWRGD pins can increase the power good hysteresis. See the Application circuits for an example. IN VIN OUT LT3086 SHDN VOUT RSET SET VLOGIC OR VOUT RPGSET VIMON RMON IMON RPWRGD ILIM PWRGD GND 3086 F02 RPGSET = x * VOUT(NOMINAL) - 0.4V 50A WHERE 85% x 95% TYPICALLY RPGD VPWRGD CPGSET (OPTIONAL) Figure 2. Programming Power Good The PWRGD pin is the power good open-collector logic output. An internal delay of typically 17s exists only for the rising edge (when the regulator output voltage rises above the power good threshold) to reject noise or chatter during startup. If the power good function is not needed, leave the RPWRGD and PWRGD pins floating. The power good threshold is typically programmed to 85% to 95% of the regulated output voltage. Due to variations in regulator parameters and resistor variations, it is not practical to set the power good threshold greater than 95% of the output voltage. Account for load transients where the output voltage droops momentarily before recovering. If increasing output capacitance to reduce output voltage undershoot or if setting the power good threshold lower is not possible, a capacitor, CPGSET, from RPWRGD to ground can filter and delay the output signal. This allows for a configurable deglitching period before the power good threshold trips. For example, consider an application with a nominal 1V output using 10F of output capacitance and the power good threshold set for 90% of VOUT(NOMINAL). A 1.5A output load current step momentarily undershoots VOUT below the 90% threshold for more than 4s, thus triggering the PWRGD pin to pull low. Using a CPGSET of greater than 270pF deglitches the power good comparator and prevents the PWRGD pin from pulling low for undershoot events less than 4s in duration. For applications using cable drop compensation and requiring a power good signal, calculate the value of RPGSET based on the voltage at the load rather than the LT3086's output voltage. In order for the power good threshold to be independent of the cable drop compensation's modulation of the LT3086's output voltage as a function of load current, connect a resistor between CDC and RPWRGD with the same value as RCDC, the resistor between CDC and SET. This technique avoids connecting the RPGSET resistor to the load voltage through a long trace/wire and eliminates potential stray signal coupling into the RPWRGD pin. See the front page Typical Application circuit as an example. Output Voltage Noise and Transient Response The LT3086 regulator provides low output voltage noise over a 10Hz to 100kHz bandwidth while operating at full load. Output voltage noise is approximately 65nV/Hz over this frequency bandwidth at the unity gain output voltage of 0.4V at 2.1A. To lower output voltage noise for higher output voltages, include a feedforward capacitor, CSET, from OUT to the SET pin, as shown in Figure 3. A good quality, low leakage capacitor is recommended. This capacitor bypasses the voltage setting resistor, RSET, providing a low frequency noise pole. With the use of 10nF for CSET, output voltage noise decreases from 280VRMS to 40VRMS at 2.1A when the output voltage is set to 5V. IN VIN VIMON RMON OUT LT3086 SHDN IMON ILIM VOUT RSET CSET COUT SET GND 3086 F03 Figure 3. Feedforward Capacitor for Improved Transient Response Higher values of output voltage noise are often measured if care is not exercised with regard to circuit layout and testing. Crosstalk from nearby active signal traces may induce unwanted noise onto the LT3086's output. Power supply ripple rejection must also be considered. The LT3086 regulator does not have unlimited power supply rejection and will pass a small portion of the input noise to the output. Using a feedforward capacitor, CSET, has the added benefit of improving transient response for output voltages greater than 0.4V. With no feedforward capacitor, the settling time For more information www.linear.com/LT3086 3086fb 17 LT3086 Applications Information and output voltage transients increase as the output voltage is set above 0.4V. See Figure 4 and Transient Response curves in the Typical Performance Characteristics section. OUTPUT VOLTAGE DEVIATION (mV) 50 0 RMON CSET = 1nF -200 CSET = 0 3 VIN = 5.5V VOUT = 5V COUT = 10F IL = 210mA TO 2.1A 2 1 0 0 10 20 30 40 50 TIME (s) 60 70 80 3086 F04 Figure 4. Transient Response vs Feedforward Capacitor Start-up time is affected by the use of a CSET feedforward capacitor. Start-up time is directly proportional to the size of the feedforward capacitor and output voltage. Settling time to 1% is approximately: tSETTLE = 4.2 * VOUT *CSET 50A See the Start-Up Time vs CSET curve in the Typical Performance Characteristics section. If the LT3086 is configured for cable drop compensation, LTC does not recommend using a feedforward capacitor because CSET filters the CDC correction signal and transient response to load current changes degrades. Output Current Monitor and External Current Limit Current out of the IMON pin is typically equal to 1/1000 of the regulator's output current. The output current monitor maintains accuracy across the full input voltage range, even during dropout. A resistor, RMON, placed from IMON to ground, sets the voltage scale factor for use with analog-to-digital converters, as shown in Figure 5. For example, with 442 for RMON, VIMON is set for 0.663V when IOUT = 1.5A. External current limit activates if the voltage on the ILIM pin exceeds the typical 0.8V threshold. Tying the IMON and ILIM pins together allows the user to program a desired current limit based on the output current. An internal cur- VOUT RSET SET IOUT 1000 VIMON =IMON *RMON IMON = IMON/ILIM GND 3086 F05 -100 -250 LOAD CURRENT (A) VIMON CSET = 100pF -150 OUT LT3086 SHDN TO ADC CSET = 10nF -50 IN VIN ILIMIT = 1000 * 0.8V RMON Figure 5. Output Current Monitor and External Current Limit rent limit, typically 2.4A, is always active and limits output current even if the ILIM pin is grounded. In addition, internal current limit foldback overrides external current limit if the VIN - VOUT differential voltage becomes excessive. Note that the output current monitor represents not just the load current, but the current into the output capacitor as well. During startup and large load transients, the output current monitor indicates the current required to charge the output capacitor in addition to the load current. To prevent external current limit from engaging prematurely, set the external current limit above the maximum load current to allow the output capacitor to recover without being current limited. For external current limits set for less than 1A, connect a series 1k-10nF RC network from ILIM to ground to ensure current limit loop stability. Adding an RC network from ILIM to ground also delays the current monitor signal, allowing output currents higher than the external current limit for a limited duration. This is useful for applications with large output capacitance that would otherwise trigger external current limit during startup and large load transients, slowing output voltage recovery. To guarantee external current limit stability, ensure that the RC network from ILIM to GND has a capacitor value equal to or greater than 10nF and the resistor value is between 0.01* C-0.6 and 1k. C is the capacitor value in units of farads. LTC does not recommend an RC network other than the 1k-10nF combination if using the cable drop compensation and paralleling functions. To configure the output current monitor and external current limit correctly, decide on the necessary current limit and full-scale monitor output voltage. Voltage is limited to 0.8V if IMON is tied to ILIM. External current limit is typically set 10% to 20% above maximum load current to allow for 3086fb 18 For more information www.linear.com/LT3086 LT3086 Applications Information large transient events and ILIM threshold variations. For example, if the maximum load current is 1.5A and both IMON and ILIM pins are tied together, an RMON scaling resistor of 442 yields an external current limit of 1.8A. If higher output current monitor voltages are needed, the DFN package offers the ability to separate the IMON and ILIM pins with a resistor, as shown in Figure 6. To prevent saturation in the IMON output device, choose RMON so that VIMON is at least 0.6V less than VIN. If external current is not needed, ground the ILIM pin. Output current monitor accuracy for very low output currents is limited by the offset in the current monitor amplifier and parasitic current paths. The equivalent circuit of the parasitic current paths are shown in Figure 7. With zero output load current, the current into RMON is typically 11A when the IMON and ILIM pins are tied together. As a result, load currents between 0mA and 11mA typically cannot be measured. See Current Monitor Offset curves in the Typical Performance Characteristics section. Load Regulation and Cable Drop Compensation high current applications, small voltage drops appear due to the resistances of PCB traces or wires between the regulator and the load. These drops may be eliminated by connecting RSET directly to the output at the load as shown in Figure 8. Note that the voltage drop across ROUT and RRTN add to the dropout voltage of the regulator. The voltage drop across RGND should also be minimized to reduce output voltage error due to ground pin current. See GND Pin Current curves in the Typical Performance Characteristics section. The LT3086 has cable drop compensation (CDC) functionality that allows delivery of well regulated voltage to remote loads using only two wires of known fixed resistance. Compensation is user programmed by connecting a resistor, RCDC, between the SET and CDC pins, as shown in Figure 9. At zero load current, the CDC pin typically regulates to the same voltage as the SET pin. The voltage decreases at a rate equal to 1/3 of the change in IMON voltage. For example, if VIMON increases from 0 to 0.6V, VCDC decreases Output load regulation for the LT3086 is typically 0.1%. Optimal regulation is obtained when the RSET feedback resistor is connected to the OUT pin of the regulator. In IN LT3086 SHDN IN OUT LT3086 SHDN TO ADC VIMON ROPT (DFN PACKAGE ONLY) RLIM RMON SET ILIMIT = 1000 * 0.8V RLIM RMON ILIM 67k 3086 F08 3086 F06 IN IMON 300mV IMON NOT TIED TO ILIM 43k 480mV ILIM 600mV RMON SHDN IMON ILIM RMON LLINE1 RSET SET RCDC VIN IOUT/1000 RLINE1 OUT LT3086 LT3086 IN IOUT/1000 120k RGND Figure 8. Kelvin Sense Connection GND LT3086 IMON RSET RRTN Figure 6. Separate IMON and ILIM (DFN Package Only) IN GND RMON = RLIM +ROPT IMON ILIM IMON ILIM VOUT RSET SET ROUT LOAD VIN VIN OUT CDC GND CLOAD (OPTIONAL) LOAD COUT RESR (OPTIONAL) RLINE2 LLINE2 3086 F09 IMON TIED TO ILIM 3086 F07 Figure 7. Equivalent Circuits of IMON and ILIM RCDC = RMON *RSET 3000 *R WIRE R WIRE = RLINE1 +RLINE2 Figure 9. Cable Drop Compensation For more information www.linear.com/LT3086 3086fb 19 LT3086 Applications Information by 0.2V. As a result, the current that flows through RCDC is proportional to load current which increases the voltage across RSET, effectively increasing output voltage. RCDC is selected using the following equation so that the voltage at the OUT pin increases to cancel the voltage drop in the cables connected to the load. RCDC = RMON *RSET 3000 *R WIRE where RWIRE is the total resistance of the supply and return cabling connecting the LT3086 to the load. Figure 10 shows the transient response with cable drop compensation. With compensation, the output voltage at the load remains nearly constant. Note that the transient voltage droop in output voltage is about the same as the voltage droop with no compensation, but with the output voltage returning to the correct compensated voltage. 5.8 OUTPUT VOLTAGE (V) 5.6 VOUT WITH CDC 5.2 5.0 VLOAD WITH CDC 4.8 VIN = 6V VLOAD WITHOUT CDC RMON = 357 RWIRE = 0.24 RCDC = 46.4k RSET = 92k COUT = 10F ILOAD = 0.5A TO 1.5A CLOAD = 0 4.6 LOAD CURRENT (A) 4.4 4.2 2 1 0 80 160 240 320 400 480 560 640 720 800 TIME (s) 3086 F10 Figure 10. Transient Response with Cable Drop Compensation If long cables are used, an additional supply bypass capacitor, CLOAD, should be added directly to the load to handle large load transient conditions. COUT must still directly connect to the OUT pin to ensure stable operation of the LT3086, minimizing output capacitor ESR and ESL. Long cables have inductance where a resonance forms between the wire inductance, LWIRE and CLOAD. Damping is accomplished by adding series resistance, RESR, to CLOAD. The value of RESR is approximately: RESR = 2 * Noise from the current monitor output affects noise seen at the output. Filtering the current monitor output with an RC network from ILIM to ground is effective at reducing this noise source, especially at light loads. Consult the Output Current Monitor and External Current Limit section for more information Paralleling Multiple Regulators 5.4 0 There are limits to the amount of voltage drop that can be compensated using cable drop compensation. Using cable drop compensation subjects load regulation to the variability of the current monitor voltage output and the cabling resistance. LTC recommends limiting cable drop compensation to 20% of VOUT for applications needing good regulation. The limiting factor is variations in wire temperature as copper wire resistance changes about 19% for a 50C temperature change. If output regulation requirements are loose (e.g., when using a secondary regulator), cable drop compensation of up to 50% may be used. The LT3086 has been specifically designed to make paralleling multiple regulators together easy. Paralleling enables applications to increase total output current and to spread heat dissipated by the regulator over a wider area on the PCB. The parallel scheme is based on a master/slave principle, where one LT3086 is designated as master, and the other regulators act as slaves with active sharing of total load current, as shown in Figure 11. The slave's internal current tracking amplifier compares the current monitor output from the master with the current monitor output seen at the slave's ILIM pin, and servos the slave's output current to match the master's. VIN IN SHDN OUT VOUT LT3086 MASTER SET OUT SHDN IN RSET VTRACK = VILIM(MASTER) L WIRE CLOAD GND IMON ILIM RMON RMON LT3086 SLAVE(S) SET TRACK IMON ILIM GND 3086 F011 Figure 11. Master/Slave(s) Configuration for Paralleling 3086fb 20 For more information www.linear.com/LT3086 LT3086 Applications Information The master LT3086 is connected exactly the same as a single regulator where its output current monitor voltage seen at its ILIM pin is used as the common current tracking signal. The slave devices connect this signal to their TRACK pins to make their output current equal to the master's. The TRACK pin has an internal pull-up current that is typically 15A at 0.75V. When the TRACK pin is unused, the pin is pulled up and clamped at 1.25V, disabling the current tracking amplifier. When the TRACK pin is connected to the master current tracking signal, the TRACK pin voltage is pulled below the 1.2V threshold, enabling the current tracking amplifier and disabling the slave's 50A reference current, ISET. Disabling the reference current ensures that the master is the only device controlling the output voltage. Set the maximum master current tracking signal to less than 0.8V to prevent external current limit from triggering prematurely. To prevent the slave current tracking amplifier from ever being disabled, the slave TRACK pin must be tied to the master ILIM pin. The master ILIM pin has an internal 1V clamp that is below the slave 1.2V current tracking amplifier enable threshold. When multiple slaves are used, a smaller master RMON resistor should be used to compensate for the pull-up currents from all the TRACK pins of the slaves. For example, a master sourcing 2.1A typically has 0.697V at its ILIM pin with an RMON resistor of 332. Referring to the TRACK pin pull-up current curve in the Typical Performance Characteristics, with 0.697V on the TRACK pin, each slave typically adds 15A to the master's 2.1mA IMON output. For an application with 3 slaves connected, decrease RMON's value to: RMON = 0.697V = 325 [2.1mA + ( 3 *15A )] The closest 1% resistor value equals 324. All slave regulators must have their SET pins connected to the master SET pin. The TRACK amplifier operates by adjusting the slave internal reference voltage slightly as a function of the difference in master and slave current monitor voltages. This has a strong effect on the slave output current, which forces the slave output current to match the master. Mismatch between master and slave internal reference voltages and current monitor outputs, offset in the slave TRACK amplifier and TRACK pin pull-up currents all contribute to output current sharing error. In the case of negative offset, a slave runs less current than the master. At very light loads, negative offset enables the slave output overshoot pull-down circuit, forcing the master to supply current to keep the output voltage within regulation. As a result, quiescent current may increase for very light loads in the master/slave configuration. In some applications, multiple regulators may be spaced some distance apart to optimize heat distribution. That makes the use of low resistance traces important to connect each regulator to the local ground system and to avoid ground loops created by load currents. Ground currents can be as high as 30mA at 1.5A and 50mA at 2.1A, for each regulator. Limiting differential ground pin voltages to less than 10mV minimizes tracking errors. Ground trace resistance between master and slaves should be less than 10mV/30mA = 0.33 at 1.5A load, and 10mV/50mA = 0.2 for 2.1A load. Output Capacitance The LT3086 regulator is stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. Use a minimum output capacitor of 10F with an ESR of 0.1 or less to prevent oscillations. The output load transient response is a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. For applications with large load current transients, a low ESR ceramic capacitor in parallel with a bulk tantalum capacitor often provides an optimally damped response. For example, a 47F tantalum capacitor with ESR = 0.1 in parallel with the 10F ceramic capacitor with ESR < 0.01 reduces output deviation by about 2:1 for large transient loads and increases loop phase margin. Give extra consideration to the use of ceramic capacitors. Manufacturers make ceramic capacitors with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics 3086fb For more information www.linear.com/LT3086 21 LT3086 Applications Information provide high C-V products in a small package at low cost, but exhibit strong voltage and temperature coefficients, as shown in Figures 12 and 13. When used with a 5V regulator, a 16V 10F Y5V capacitor can exhibit an effective value as low as 1F to 2F for the DC bias voltage applied, and over the operating temperature range. The X5R and X7R dielectrics yield much more stable characteristics and are more suitable for use as the output capacitor. The X7R type works over a wider temperature range and has better temperature stability, while the X5R is less expensive and is available in higher values. Care still must be exercised when using X5R and X7R capacitors; the X5R and X7R codes only specify operating temperature range and maximum capacitance change over temperature. Capacitance changes due to DC bias is less with X5R and X7R capacitors, but can still be significant enough to drop capacitor values below appropriate levels. Capacitor DC 20 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10F CHANGE IN VALUE (%) 0 X5R -20 -40 -60 Y5V -80 -100 0 2 4 14 8 6 10 12 DC BIAS VOLTAGE (V) 16 3086 F12 Figure 12. Ceramic Capacitor DC Bias Characteristics 40 CHANGE IN VALUE (%) 20 X5R 0 -20 -40 Y5V -60 -80 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10F -100 -50 -25 50 25 75 0 TEMPERATURE (C) 100 125 3086 F13 Figure 13. Ceramic Capacitor Temperature Characteristics bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be verified. Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress is induced by vibrations in the system or thermal transients. The resulting voltages produced can cause appreciable amounts of noise. Input Capacitance Low ESR ceramic input bypass capacitors are acceptable for applications with short input and ground leads. However, applications connecting a power supply to the LT3086 using long wires are prone to voltage spikes, reliability concerns and application-specific board oscillations. The input wire inductance found in many battery-powered applications, combined with the low ESR ceramic capacitor, forms a high-Q LC resonant tank circuit. In some instances this resonant frequency beats against the output current dependent LDO bandwidth and interferes with proper operation. Simple circuit modifications are then required. This behavior is not indicative of LT3086 instability, but is a common application issue. The self-inductance, or isolated inductance, of a wire is directly proportional to its length. Wire diameter is not a major factor on its self-inductance. For example, the selfinductance of a 2-AWG isolated wire (diameter = 0.26") is about half the self-inductance of a 30-AWG wire (diameter = 0.01"). One foot of 30-AWG wire has approximately 465nH of self-inductance. Two methods can reduce wire self-inductance. One method divides the current flowing towards the LT3086 between two parallel conductors. In this case, the farther apart the wires are from each other, the more the self-inductance is reduced; up to a 50% reduction when placed a few inches apart. Splitting the wires connects two equal inductors in parallel, but placing them in close proximity creates mutual inductance adding to the self-inductance. The second and most effective way to reduce overall inductance is to place both forward 3086fb 22 For more information www.linear.com/LT3086 LT3086 Applications Information and return current conductors (the input and GND wires) in very close proximity. Two 30-AWG wires separated by only 0.02", used as forward- and return-current conductors, reduce the overall self-inductance to approximately one-fifth that of a single isolated wire. If a battery, mounted in close proximity, powers the LT3086, a 10F input capacitor suffices for stability. However, if a distant supply powers the LT3086, use a larger value input capacitor. Use a rough guideline of 1F (in addition to the 10F minimum) per 8 inches of wire length. The minimum input capacitance needed to stabilize the application also varies with power supply output impedance variations. Placing additional capacitance on the LT3086's output also helps. However, this requires an order of magnitude more capacitance in comparison with additional LT3086 input bypassing. Series resistance between the supply and the LT3086 input also helps stabilize the application; as little as 0.1 to 0.5 suffices. This impedance dampens the LC tank circuit at the expense of dropout voltage. A better alternative is to add additional input capacitance with higher ESR at the input, such as tantalum or electrolytic capacitors, or by adding resistance in series with a low ESR ceramic capacitor. Overload Recovery Like many IC power regulators, the LT3086 has safe operating area protection. The safe operating area protection decreases current limit as input-to-output voltage increases, and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. The LT3086 provides some output current at all values of input-to-output voltage up to the specified 45V operational maximum. Current limit foldback overrides external current limit (if used) if VIN - VOUT voltage differential becomes excessive. When power is first applied, the input voltage rises and the output follows the input; allowing the regulator to start-up into very heavy loads. During start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur wherein the removal of an output short will not allow the output to recover. Other regulators, such as the LT1083/LT1084/ LT1085 family and LT1764A also exhibit this phenomenon, so it is not unique to the LT3086. The problem occurs with a heavy output load when the input voltage is high and the output voltage is low. Common situations are immediately after the removal of a short-circuit or if the shutdown pin is pulled high after the input voltage is already turned on. The load line intersects the output current curve at two points creating two stable output operating points for the regulator. With this double intersection, the input power supply needs to be cycled down to zero and brought up again for the output to recover. Thermal Considerations The power handling capability of the LT3086 is limited by the maximum rated junction temperature (125C for LT3086E, LT3086I, LT3086MP or 150C for LT3086H). Three components comprise the power dissipated by the device: 1. Output current multiplied by the input/output voltage differential: IOUT * (VIN - VOUT), 2. GND pin current multiplied by the input voltage: IGND * VIN, and 3. Current monitor current multiplied by the input/current monitor voltage differential: IMON * (VIN - VIMON) GND pin current is determined using the GND Pin Current curves in the Typical Performance Characteristics section. Power dissipation equals the sum of the three components listed above. The LT3086 regulator has internal thermal limiting that protects the device during overload conditions. For continuous normal conditions, the maximum junction temperature of 125C (E-grade, I-grade, MP-grade) or 150C (H-grade) must not be exceeded. Carefully consider all sources of thermal resistance from junction-to-ambient including other heat sources mounted in proximity to the LT3086. The underside of the LT3086 DFN and TSSOP packages have exposed metal (10.5mm2) from the lead to the die attachment. These packages allow heat to directly transfer from the die junction to the printed circuit board metal. The dual-in-line pin arrangement allows metal to extend 3086fb For more information www.linear.com/LT3086 23 LT3086 Applications Information beyond the ends of the package on the topside (component side) of a PCB. Connect this metal to GND on the PCB. The multiple IN and OUT pins of the LT3086 also assist in spreading heat to the PCB. For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes also can spread the heat generated by power devices. Tables 2 and 3 list thermal resistance for several topside copper areas on a fixed board size. All measurements were taken in still air on a 4-layer FR-4 board with 1oz solid internal planes and 2oz top/bottom external trace planes with a total board thickness of 1.6mm. The four layers were electrically isolated with no thermal vias present. Achieving low thermal resistance necessitates attention to detail and careful PCB layout. For more information on thermal resistance and high thermal conductivity test boards, refer to JEDEC standard JESD51, notably JESD5112 and JESD51-7. The use of thermal vias, increased copper weight, and air flow, will improve the resultant thermal resistance. Table 2. Measured Thermal Resistance for DHD and FE Package COPPER AREA TOPSIDE* BACKSIDE BOARD AREA (mm2) (mm2) (mm2) 2500 2500 2500 1000 2500 2500 225 2500 2500 100 2500 2500 *Device is mounted on topside THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 25C/W 26C/W 28C/W 33C/W Table 3. Measured Thermal Resistance for R Package COPPER AREA TOPSIDE* BACKSIDE (mm2) (mm2) 2500 2500 1000 2500 225 2500 BOARD AREA (mm2) 2500 2500 2500 *Device is mounted on topside THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 15C/W 16C/W 19C/W Measured Thermal Resistance for T7 Package Thermal resistance (junction-to-case) = 3C/W. The LT3086 has the ability to check thermal performance by observing the output current and temperature monitor pins. The effects of heat sinking, the enclosure, and any air movement can be instantly analyzed without special instrumentation. Calculating Junction Temperature Example: Given an output voltage of 5V, an input voltage range of 6V 5%, a maximum output current range of 1A with 698 for RMON, and a maximum ambient temperature of 75C, what will the maximum junction temperature be? The power dissipated by the device equals: IOUT(MAX) * (VIN(MAX) - VOUT) + IGND * VIN(MAX) + IMON(MAX) * (VIN(MAX) - VIMON(MAX)) where, IOUT(MAX) = 1A VIN(MAX) = 6.3V IGND at (IOUT = 1A, VIN = 6.3V) = 11mA VIMON at (IOUT = 1A, RMON = 698) = 0.698V So: P = 1A * (6.3V - 5V) + 11mA * 6.3V + 1mA * (6.3V - 0.698V) = 1.38W Using a DFN package, the thermal resistance will be in the range of 25C/W to 33C/W depending on the topside copper area. So the junction temperature rise above ambient approximately equals: 1.38W * 30C/W = 41.4C The maximum junction temperature equals the maximum ambient temperature plus the maximum junction temperature rise above ambient or: TJMAX = 75C + 41.4C = 116.4C Protection Features The LT3086 regulator incorporates several protection features that make it ideal for use in battery-powered circuits. In addition to the normal protection features 3086fb 24 For more information www.linear.com/LT3086 LT3086 Applications Information The LT3086 incurs no damage if its output is pulled below ground. If the input is left open-circuit or grounded, the output can be pulled below ground by 36V. No current flows through the pass transistor from the output. However, current flows in (but is limited by) the feedback resistors RSET, that sets the output voltage, and RRPWRGD, that sets the power good threshold. Current flows from the internal clamps in the SET and RPWRGD pins to the external circuitry pulling OUT below ground. If the input is powered by a voltage source, the device protects itself by turning off the power device when the internal clamps activate. If Schottky diodes are used to prevent the SET and RPWRGD pins from activating their internal clamps, the output sources current equal to its current limit capability and the LT3086 protects itself by thermal limiting. In this case, grounding the SHDN pin turns off the device and stops the output from sourcing current. Reverse current flow follows the curve shown in Figure 14. The LT3086 incurs no damage if the SET and RPWRGD pins are pulled above ground up to 36V. If the input is left open-circuit or grounded, the SET pin performs like a large resistor (typically 80k) in series with a diode. In circuits where a secondary supply raises the output voltage above the regulated voltage set by RSET, the output overshoot circuitry pulls current from the output pin to ground as long as the output voltage is below the input voltage. Output overshoot current follows the curve shown REVERSE OUTPUT CURRENT (mA) The LT3086 IN pin withstands reverse voltages of 45V. The device limits current flow to less than 2mA (typically less than 1A) and no negative voltage appears at OUT. The device protects both itself and the load against batteries that are plugged in backwards. 0.6 TJ = 25C VIN = 0V 0.5 VOUT = VSET = VRPWRGD CURRENT FLOWS THROUGH PINS TO GROUND 0.4 0.3 SET 0.2 0.1 0 OUT, RPWRGD 0 4 8 12 16 20 24 OUTPUT VOLTAGE (V) 28 32 3086 F14 Figure 14. Reverse-Output Current 30 OUTPUT OVERSHOOT PULL-DOWN (mA) Current limit protection and thermal overload protection protect the device against current overload conditions at the output of the device. The typical thermal shutdown temperature is 165C and incorporates about 7C of hysteresis. For normal operation, do not exceed the maximum rated junction temperature of 125C (LT3086E, LT3086I, LT3086MP) or 150C (LT3086H). in Figure 15. When the output voltage is pulled above the input by typically 225mV, the LT3086 shuts down as shown in Figure 16 and the 15mA overshoot pull-down current source turns off. TJ = 25C VIN = 0V 25 VOUT = VSET = VRPWRGD CURRENT FLOWS THROUGH OUT PIN TO GND 20 15 10 5 0 0 4 8 12 16 20 24 28 OUTPUT VOLTAGE (V) 32 36 3086 F15 Figure 15. Output Overshoot Pull-Down Current OUT OVER IN SHUTDOWN THRESHOLD (mV) associated with monolithic regulators, such as current limiting and thermal limiting, the devices also protect against reverse-input voltages, reverse-output voltages, and reverse-output-to-input voltages. 300 275 250 ON TO OFF 225 200 175 150 OFF TO ON 125 100 75 50 25 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 3086 F16 Figure 16. OUT Over IN Shutdown Threshold 3086fb For more information www.linear.com/LT3086 25 LT3086 Typical Applications 2.5V Low Noise Regulator with Power Good VIN 3.1V TO 13V OUT IN 10F RSET 42.2k 1% LT3086 VTEMP 10mV/C 25C = 250mV SHDN SET TEMP RPWRGD IMON PWRGD CSET 10nF 10F RPGSET 37.4k 1% VOUT 2.5V AT 2.1A RPGD 100k VPWRGD HIGH WHEN VOUT > 90% of 2.5V ILIM GND 3086 TA09 1.2V, 1.5A Low Noise Regulator with 1.8A External Current Limit VIN 1.65V TO 16V IN OUT RSET 15.8k 1% LT3086 10F SHDN VTEMP 10mV/C 25C = 250mV VMON 0.8V AT 1.8A FULL-SCALE 10F CSET 10nF 200 1% TEMP VOUT 1.2V AT 1.5A SET IMON ILIM RMON 442 1% GND 3086 TA10 5 White LED Driver with PWM Dimming and LED Open Detection OUT IN VIN* 10F R4 100k 1% LT1004-1.2 LT3086 SET SHDN R2 3.32k 1% RMON 800 R3 9.09k 1% IMON RPWRGD ILIM PWRGD RSET ** 1% RPGSET ** 1% R1 1k C1 10nF RPGD 100k 1% VOUT 10F VPWRGD HIGH FOR OPEN LED CONDITION GND 3086 TA11 PWM NOTE: ADJUST RMON TO SET MAXIMUM LED CURRENT (SET TO 800 FOR 1A) DRIVE PWM LOW TO TURN OFF LED STRING (PULSE TO DIM) *INPUT VOLTAGE REQUIRED IS DEPENDENT ON THE LED STRING VOLTAGE **CHOOSE RSET AND RPGSET BASED ON LED STRING 3086fb 26 For more information www.linear.com/LT3086 LT3086 Typical Applications Adjustable Voltage Controlled Current Source 10F LT3086 OUT 10F SHDN IN 1F 400mV OUT LT6650 FB SET TRACK IMON GND 1F ILIM R1 1k C1 10nF VTRACK ADJUST FROM 0V TO 750mV FOR 0A TO 2.1A CONSTANT CURRENT LOAD IN VIN* GND RMON 357 1% 3086 TA12 *RESTRICT INPUT VOLTAGE RANGE TO LIMIT POWER DISSIPATION AND PREVENT FOLDBACK CURRENT LIMIT FROM INTERFERING WITH PROPER OPERATION Ensuring External Current Limit Stability for ILIM 1A VIN 12.5V TO 40V IN 10F OUT LT3086 SHDN VIMON 800mV at 250mA ADDITIONAL R-C NETWORK R1 1k C1 10nF SET RSET 232k 1% VOUT 12V AT 200mA CSET 10nF RLIM 3.24k 1% VIN 3V TO 19V IN 10F OUT LT3086 (DHD ONLY) SHDN IMON ILIM Increasing Current Monitor Output Voltage VIMON = 1V/A 10F GND ILIMIT = 1.5A SET RSET 41.2k 1% CSET 10nF IMON R1 464 1% ILIM RLIM 536 1% VOUT 2.5V AT 1.2A 10F GND 3086 TA04 3086 TA05 0.8V RLIM = *1000 I LIMIT Increasing Power Good Hysteresis (Ex: 2%) VIN 3.85V TO 18V IN OUT LT3086 10F SHDN SET RSET 57.6k 1% RPWRGD RMON 442 1% IMON ILIM RPGSET 51.1k 1% RHYS 3.65M 1% PWRGD GND 3086 TA06 RHYS = 10F VOUT 3.3V AT 1.5A RPGD 100k VPWRGD VX *100 (P * VOUT - 0.4V ) VOUT (H-HINT ) ( 50A ) WHERE, VX = RPGD TERMINATION VOLTAGE = VOUT P = POWER GOOD TRIP THRESHOLD (% OF VOUT ) H = DESIRED PERCENTAGE HYSTERESIS HINT = 0.6 (INTERNAL PERCENTAGE HYSTERESIS) 3086fb For more information www.linear.com/LT3086 27 LT3086 Typical Applications Load Current Monitoring Using Power Good VIN 3.85V TO 18V IN OUT SHDN IMON ILIM R1 169 1% ILIMIT = 1.6A 0.8V R1= *1000 -R2 ILIMIT RSET 57.6k 1% LT3086 10F SET VOUT 3.3V AT 1.5A RPGD 100k RPWRGD PWRGD GND VPWRGD HIGH WHEN ILOAD > 1.25A R2 324 1% 0.4V R2 = *1000 ILOAD 10F C1 (OPTIONAL, FOR POWERGOOD FLAG DELAY) 3086 TA03 Input Undervoltage Detector Using Power Good VIN 4V TO 18V IN OUT RSET 57.6k 1% LT3086 RPGSET 71.5k 1% 10F SHDN RPWRGD IMON ILIM RMON 442 1% SET 10F VOUT 3.3V AT 1.5A RPGD 100k PWRGD GND VPWRGD HIGH WHEN VIN > 4V 3086 TA07 Programming Thermal Limit Temperature VIN 2.4V TO 12V IN 10F VTEMP 100A LT3086 SHDN VTEMP 10mV/C 25C = 250mV 124C THERMAL LIMIT R TEMP = OUT SET RSET 28k 1% CSET 10nF 10F VOUT 1.8V AT 2.1A TEMP RTEMP 12.4k 1% RMON 332 1% IMON ILIM GND 3086 TA08 Paralleling Two Regulators for 5V, 4.2A VIN 5.7V TO 15V 10F VTEMP(MASTER) 10mV/C 25C = 250mV VOUT RPGD 100k VPWRGD VOUT 5V AT 4.2A IN SHDN OUT LT3086 MASTER 10F RPGSET 82.5k 1% TEMP RPWRGD RSET 90.9k 1% 1.1k 1% OUT SHDN IN 10F CSET 10nF SET IMON ILIM PWRGD GND VILIM(MASTER) 0.7V AT 4.2A RMON 332 1% RMON 332 1% LT3086 SLAVE TEMP 10F VTEMP(SLAVE) 10mV/C 25C = 250mV SET TRACK IMON ILIM GND 3086 TA02 3086fb 28 For more information www.linear.com/LT3086 LT3086 Package Description Please refer to http://www.linear.com/product/LT3086#packaging for the most recent package drawings. DHD Package 16-Lead Plastic DFN (5mm x 4mm) (Reference LTC DWG # 05-08-1707 Rev A) 0.70 0.05 4.50 0.05 3.10 0.05 2.44 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 4.34 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.00 0.10 (2 SIDES) 9 4.00 0.10 (2 SIDES) R = 0.115 TYP 0.40 0.10 16 2.44 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH 8 0.200 REF 1 0.25 0.05 0.50 BSC 0.75 0.05 0.00 - 0.05 (DHD16) DFN REV A 1113 4.34 0.10 (2 SIDES) BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJGD-2) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3086fb For more information www.linear.com/LT3086 29 LT3086 Package Description Please refer to http://www.linear.com/product/LT3086#packaging for the most recent package drawings. FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev K) Exposed Pad Variation BB 4.70 (.185) 3.58 (.141) DETAIL A 4.90 - 5.10* (.193 - .201) 0.56 (.022) REF 3.58 (.141) NOTE 5 16 1514 13 12 1110 9 NOTE 5 6.60 0.10 2.94 3.05 (.116) (.120) 4.50 0.10 DETAIL A SEE NOTE 4 2.94 6.40 (.116) (.252) BSC 0.53 (.021) REF DETAIL A IS THE PART OF THE LEAD FRAME FEATURE FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 1.05 0.10 0.65 BSC 0.45 0.05 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 - 4.50* (.169 - .177) 0.09 - 0.20 (.0035 - .0079) 0.25 REF 0.50 - 0.75 (.020 - .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT 1.10 (.0433) MAX 0 - 8 0.65 (.0256) BSC 0.195 - 0.30 (.0077 - .0118) TYP 0.05 - 0.15 (.002 - .006) FE16 (BB) TSSOP REV K 0913 5. BOTTOM EXPOSED PADDLE MAY HAVE METAL PROTRUSION IN THIS AREA. THIS REGION MUST BE FREE OF ANY EXPOSED TRACES OR VIAS ON PBC LAYOUT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3086fb 30 For more information www.linear.com/LT3086 LT3086 Package Description Please refer to http://www.linear.com/product/LT3086#packaging for the most recent package drawings. R Package 7-Lead Plastic DD Pak (Reference LTC DWG # 05-08-1462 Rev G) 0.25 0.02 (6.350 0.508) 0.06 0.01 (1.524 0.254) 0.30 0.02 (7.620 0.508) 0.06 0.01 (1.524 0.254) TYP 0.390 - 0.415 (9.906 - 10.541) 0.165 - 0.180 (4.191 - 4.572) 0.045 - 0.055 (1.143 - 1.397) 15 5 0.06 0.01 (1.524 0.254) 0.18 0.01 (4.572 0.254) 0.330 - 0.370 (8.382 - 9.398) 0.55 0.05 (13.970 1.270) 0.06 0.01 (1.524 0.254) TYP ( +0.008 0.004 -0.004 +0.203 0.102 -0.102 ) 0.095 - 0.115 (2.413 - 2.921) 0.085 0.01 (2.159 0.254) DETAIL A 0.30 0.02 (7.620 0.508) ( +0.012 0.143 -0.020 +0.305 3.632 -0.508 BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK 0.050 (1.270) 0.026 - 0.035 BSC (0.660 - 0.889) TYP ) 0.013 - 0.023 (0.330 - 0.584) 0.050 0.012 (1.270 0.305) DETAIL A 0 - 7 TYP 0.420 0.080 0.420 0 - 7 TYP 0.276 0.350 0.325 0.205 0.585 0.585 0.320 0.090 0.050 0.035 RECOMMENDED SOLDER PAD LAYOUT NOTE: 1. DIMENSIONS IN INCH/(MILLIMETER) 2. DRAWING NOT TO SCALE 0.090 0.050 0.035 RECOMMENDED SOLDER PAD LAYOUT FOR THICKER SOLDER PASTE APPLICATIONS R (DD7) 0416 REV G 3086fb For more information www.linear.com/LT3086 31 LT3086 Package Description Please refer to http://www.linear.com/product/LT3086#packaging for the most recent package drawings. T7 Package 7-Lead Plastic TO-220 (Standard) (Reference LTC DWG # 05-08-1422) .390 - .415 (9.906 - 10.541) .165 - .180 (4.191 - 4.572) .147 - .155 (3.734 - 3.937) DIA .045 - .055 (1.143 - 1.397) .230 - .270 (5.842 - 6.858) .460 - .500 (11.684 - 12.700) .570 - .620 (14.478 - 15.748) .330 - .370 (8.382 - 9.398) .620 (15.75) TYP .700 - .728 (17.780 - 18.491) SEATING PLANE .152 - .202 .260 - .320 (3.860 - 5.130) (6.604 - 8.128) BSC .050 (1.27) .026 - .036 (0.660 - 0.914) .135 - .165 (3.429 - 4.191) .095 - .115 (2.413 - 2.921) .155 - .195* (3.937 - 4.953) .013 - .023 (0.330 - 0.584) *MEASURED AT THE SEATING PLANE T7 (TO-220) 0801 3086fb 32 For more information www.linear.com/LT3086 LT3086 Revision History REV DATE DESCRIPTION A 6/14 Added MP-grade for TSSOP, DD-Pak, and TO-220 packages PAGE NUMBER Added EC Table line item for Minimum Load Current and Note 16 Added and modified two GND Pin Current curves, two PSRR at 1A curves, two Line Regulation curves and modified VOUT Noise curve Updated Thermal Resistance for DHD, FE and R packages B 8/16 2 to 4 3, 5 7 to 12 2, 24 Updated DHD Package Description 29 Added H-grade for TSSOP package 2 to 5, 23, 25 3086fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT3086 33 LT3086 Typical Application Paralleling Two Regulators for 5V, 4.2A with Cable Drop Compensation (CDC) CABLE RLINE1 10F VTEMP(MASTER) 10mV/C 25C = 250mV IN SHDN OUT LT3086 MASTER TEMP VOUT 10F SET 10F OUT SHDN IN RSET 90.9k + 1.1k 1% 10F RCDC 1% LT3086 SLAVE SET TEMP VTEMP(SLAVE) 10mV/C 25C = 250mV LOAD VIN 6.4V TO 15V FOR RWIRE = 0.2 VLOAD 5V AT 4.2A CDC GND IMON ILIM VILIM(MASTER) 0.7V AT 4.2A RMON 332 1% RMON 332 1% RCDC = TRACK IMON ILIM GND RLINE2 3086 TA13 RMON *RSET ( X +1) * 3000 *R WIRE R WIRE = RLINE1 +RLINE2 WHERE X = NUMBER OF SLAVES Related Parts PART NUMBER DESCRIPTION COMMENTS LT1764/ LT1764A 3A, Fast Transient Response, Low Noise LDO 340mV Dropout Voltage, Low Noise: 40VRMS, VIN: 2.7V to 20V, TO-220 and DD Packages, -A Version Stable Also with Ceramic Capacitors LT1963/ LT1963A 1.5A, Low Noise, Fast Transient Response LDO 340mV Dropout Voltage, Low Noise: 40VRMS, VIN: 2.5V to 20V, -A Version Stable with Ceramic Capacitors, TO-220, DD-Pak, SOT-223 and SO-8 Packages LT1965 1.1A, Low Noise, Low Dropout Linear Regulator 310mV Dropout Voltage, Low Noise: 40VRMS, VIN: 1.8V to 20V, VOUT: 1.2V to 19.5V, Stable with Ceramic Capacitors, TO-220, DD-Pak, MSOP and 3mm x 3mm DFN Packages LT3022 1A, Low Voltage VLDO Linear Regulator 145mV Dropout Voltage, VIN: 0.9V to 10V, VOUT: 0.2V to 9.5V, Stable with Low ESR, Ceramic Output Capacitors, 16-Pin DFN (5mm x 3mm) and 16-Lead MSOP Packages LT3070 5A, Low Noise, Programmable VOUT, 85mV Dropout Voltage, Digitally Programmable VOUT: 0.8V to 1.8V, Digital Output Margining: 85mV Dropout Linear Regulator with 1%, 3% or 5%, Low Output Noise: 25VRMS; Directly Parallelable, Stable with Low ESR Digital Margining Ceramic Output Capacitors (15F Minimum), 28-Lead 4mm x 5mm QFN Package LT3071 5A, Low Noise, Programmable VOUT, 85mV Dropout Voltage, Digitally Programmable VOUT: 0.8V to 1.8V, Analog Margining: 10%, Low 85mV Dropout Linear Regulator with Output Noise: 25VRMS; Directly Parallelable, IMON Output Current Monitor, Stable with Low ESR Analog Margining Ceramic Output Capacitors (15F Minimum), 28-Lead 4mm x 5mm QFN Package LT3080/ LT3080-1 1.1A, Parallelable, Low Noise, Low Dropout Linear Regulator LT3081 1.5A, Single Resistor Rugged Linear Extended Safe Operating Area, VIN: 1.2V to 36V, VOUT: 0V to 34.5V, Current-Based Reference, Regulator with Monitors Programmable Current Limit, Output Current and Temperature Monitors LT3083 3A, Parallelable, Low Noise, Low Dropout Linear Regulator 310mV Dropout Voltage (2-Supply Operation), Low Noise: 40VRMS, VIN: 1.2V to 23V, VOUT: 0V to 22.6V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable (No Op Amp Required), Stable with Ceramic Capacitors; TO-220, DD-Pak, TSSOP, 4mm x 4mm DFN-12 Packages LT3085 500mA, Parallelable, Low Noise, Low Dropout Linear Regulator 275mV Dropout (2-Supply Operation), Low Noise: 40VRMS, VIN: 1.2V to 36V, VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable (No Op Amp Required), Stable with Ceramic Capacitors; MS8E and 2mm x 3mm DFN-6 Packages 300mV Dropout Voltage (2-Supply Operation), Low Noise: 40VRMS, VIN: 1.2V to 36V, VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable (No Op Amp Required), Stable with Ceramic Capacitors; TO-220, DD-Pak, SOT-223, MSOP and 3mm x 3mm DFN-8 Packages; -1 Version Has Integrated Internal Ballast Resistor 3086fb 34 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT3086 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LT3086 LT 0816 REV B * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2013