LM48555 www.ti.com SNAS400B - MARCH 2007 - REVISED MAY 2013 LM48555 Boomer(R) Audio Power Amplifier Series Ceramic Speaker Driver Check for Samples: LM48555 FEATURES DESCRIPTION * * * * * The LM48555 is an audio power amplifier designed to drive ceramic speakers in applications such as cell phones, smart phones, PDAs and other portable devices. The LM48555 produces 15.7VP-P with less than 1% THD+N while operating from a 3.2V power supply. The LM48555 features a low power shutdown mode, and differential inputs for improved noise rejection. 1 2 Fully Differential Amplifier Externally Configurable Gain Soft Start Function Low Power Shutdown Mode Under Voltage Lockout APPLICATIONS * * * Mobile Phones PDA's Digital Cameras KEY SPECIFICATIONS * * * IDDQ (Boost Converter + Amplifier) at VDD = 5V: 7.5mA (typ) Output Voltage Swing VDD = 3.2V, THD 1%: 15.7VP-P (typ) Power Supply Rejection Ratio f = 217Hz 80dB (typ) The LM48555 includes advanced click and pop suppression that eliminates audible turn-on and turnoff transients. Additionally, the integrated boost regulator features a soft start function that minimizes transient current during power-up Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal number of external components. The LM48555 does not require bootstrap capacitors, or snubber circuits. The LM48555 is unity-gain stable and uses external gain-setting resistors. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2007-2013, Texas Instruments Incorporated LM48555 SNAS400B - MARCH 2007 - REVISED MAY 2013 www.ti.com Typical Application VDD L1 10 PH D1 CS 4.7 PF CO 10 PF D3 C1 VDD Bootstrap D2 SW VREF PWM D1 GND (SW) LM48555 Shutdown Control C2 SD C3 Soft Start B1 IN+ CSS 0.1 PF CIN+ RIN+ 0.47 PF 20 k: BIAS, SHUTDOWN, AND PROTECTION CIRCUITRY VAMP A2 OUT- A1 RO 20: CL 1 PF B3 CIN- RIN0.47 PF 20 k: OUT+ IN- A3 GND B2 RF+ 200 k: Ceramic Speaker Load CF+ * 82 pF RF200 k: CF* 82 pF * CF+ and CF- are optional. Refer to "SELECTING INPUT AND FEEDBACK CAPACITORS AND RESISTOR FOR AUDIO AMPLIFIER" section. Figure 1. Typical Audio Amplifier Application Circuit 2 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 LM48555 www.ti.com SNAS400B - MARCH 2007 - REVISED MAY 2013 Connection Diagram 1 2 3 A OUT- VAMP OUT+ B IN+ GND IN- C Bootstrap SD Soft Start D GND (SW) SW VDD Figure 2. Top View LM48555TL Bumps Down View Package Number YZR0012Z1A Figure 3. YZR0012 Package View (Bumps Up) These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 3 LM48555 SNAS400B - MARCH 2007 - REVISED MAY 2013 www.ti.com Absolute Maximum Ratings (1) (2) (3) Supply Voltage (VDD) 9.5V Storage Temperature -65C to +150C -0.3V to VDD + 0.3V Input Voltage Power Dissipation (4) Internally limited (5) 2000V ESD Susceptibility ESD Susceptibility (6) 200V Junction Temperature 150C JA (7) Thermal Resistance (1) (2) (3) (4) (5) (6) (7) 114C/W All voltages are measured with respect to the GND pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, JA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / JA or the given in Absolute Maximum Ratings, whichever is lower. Human body model, 100pF discharged through a 1.5k resistor. Machine Model, 220pF-240pF discharged through all pins. The value for JA is measured with the LM48555 mounted on a 3" x 1.5" (76.2mm x 3.81mm) four layer board. The copper thickness for all four layers is 0.5oz (roughly 0.18mm). Operating Ratings TMIN TA TMAX (1) Temperature Range -40C TA +85C 2.7V VDD 6.5V Supply Voltage (VDD) (1) The value for JA is measured with the LM48555 mounted on a 3" x 1.5" (76.2mm x 3.81mm) four layer board. The copper thickness for all four layers is 0.5oz (roughly 0.18mm). Electrical Characteristics (1) (2) The following specifications apply for VDD = 3.2V and the conditions shown in "Typical Audio Amplifier Application Circuit" (see Figure 1), unless otherwise specified. Limits apply for TA = 25C. Symbol Parameter Conditions LM48555 Typical (3) Limit (4) (5) Units (Limits) VIN = 0V, No Load Quiescent Power Supply Current in Boosted Ringer Mode IDD VDD = 5.0V 7.5 mA VDD = 3.6V 10 VDD = 3.2V 12 15 mA (max) SD = GND (6) 0.1 1 A (max) mA ISD Shutdown Current VLH Logic High Threshold Voltage 1.2 V (min) VLL Logic Low Threshold Voltage 0.4 V (max) RPULLDOWN Pulldown Resistor on SD pin 53 k (min) TWU Wake-up Time CSS = 0.1F Boost Converter Output Voltage Voltage on VAMP Pin 8.5 7.5 V (max) V (min) VAMP (1) (2) (3) (4) (5) (6) 4 80 100 8 ms All voltages are measured with respect to the GND pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25C and represent the parametric norm. Limits are specified to AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified by design, test, or statistical analysis. Shutdown current is measured in a normal room environment. The SD pin should be driven as close as possible to GND for minimum shutdown current. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 LM48555 www.ti.com SNAS400B - MARCH 2007 - REVISED MAY 2013 Electrical Characteristics(1)(2) (continued) The following specifications apply for VDD = 3.2V and the conditions shown in "Typical Audio Amplifier Application Circuit" (see Figure 1), unless otherwise specified. Limits apply for TA = 25C. Symbol Parameter Conditions LM48555 Typical (3) Limit (4) (5) Units (Limits) VOUT Output Voltage Swing THD = 1% (max); f = 1kHz 15.7 15 VP-P (min) THD+N Total Harmonic Distortion + Noise VOUT = 14VP-P, f = 1kHz 0.05 0.5 % (max) OS Output Noise A-Weighted Filter, VIN = 0V 70 PSRR Power Supply Rejection Ratio VRIPPLE = 200mVp-p, f = 217Hz, AV = 20dB 80 ISW Switch Current Limit VOS Output Offset Voltage CMRR Common Mode Rejection Ratio UVLO Under-Voltage Lock Out RDS(ON) Switch ON resistance 0.3 V 72 dB (min) 4.5 mV (max) 70 65 dB (min) 2.5 2.6 V (max) 2 0.5 Input referred A Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 5 LM48555 SNAS400B - MARCH 2007 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics THD+N vs Frequency VO = 4.95VRMS, VDD = 3.2V, ZL = 1F + 20 10 10 5 5 2 2 1 THD+N (%) 1 THD+N (%) THD+N vs Frequency VO = 4.95VRMS, VDD = 4.2V, ZL = 1F + 20 0.5 0.2 0.1 0.5 0.2 0.1 0.05 0.05 0.02 0.02 0.01 100 1k 300 2k 4k 0.01 100 10k FREQUENCY (Hz) 10 2k 1k 300 4k 10k FREQUENCY (Hz) Figure 4. Figure 5. THD+N vs Frequency VO = 4.95VRMS, VDD = 5V, ZL = 1F + 20 THD+N vs Output Voltage Swing VDD = 3.2V, ZL = 1F + 20 10 5 2 f = 10 kHz 1 f = 1 kHz THD+N (%) 1 THD+N (%) 0.5 0.2 0.1 0.05 0.1 0.01 0.02 0.01 100 f = 100 Hz 1k 300 2k 4k 10k 0.001 10m FREQUENCY (Hz) 1 Figure 6. Figure 7. THD+N vs Output Voltage Swing VDD = 4.2V, ZL = 1F + 20 THD+N vs Output Voltage Swing VDD = 5V, ZL = 1F + 20 f = 10 kHz f = 1 kHz 1 THD+N (%) 1 0.1 0.01 f = 10 kHz f = 1 kHz 0.1 0.01 f = 100 Hz 0.001 10m 100m f = 100 Hz 1 10 0.001 10m OUTPUT VOLTAGE SWING (VRMS) 100m 1 10 OUTPUT VOLTAGE SWING (VRMS) Figure 8. 6 10 10 10 THD+N (%) 100m OUTPUT VOLTAGE SWING (VRMS) Figure 9. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 LM48555 www.ti.com SNAS400B - MARCH 2007 - REVISED MAY 2013 Typical Performance Characteristics (continued) CMRR vs Frequency VDD = 4.2V, ZL = 1F + 20 VIN = 100mVP-P 0 0 -10 -10 -20 -20 -30 -30 -40 -40 CMRR (dB) CMRR (dB) CMRR vs Frequency VDD = 3.2V, ZL = 1F + 20 VIN = 100mVP-P -50 -60 -50 -60 -70 -70 -80 -80 -90 -90 -100 20 100 1k 5k -100 20 20k 100 Figure 11. CMRR vs Frequency VDD = 5V, ZL = 1F + 20 VIN = 100mVP-P PSRR vs Frequency VDD = 3.2V, ZL = 1F + 20 VRIPPLE = 200mVP-P 0 0 -10 -10 -20 -20 -30 -30 -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 -100 20 -100 20 100 1k 5k 20k 100 1k 5k Figure 13. PSRR vs Frequency VDD = 4.2V, ZL = 1F + 20 VRIPPLE = 200mVP-P PSRR vs Frequency VDD = 5V, ZL = 1F + 20 VRIPPLE = 200mVP-P 0 -10 -20 -20 -30 -30 -40 -40 PSRR (dB) 0 -10 -50 -60 -50 -60 -70 -70 -80 -80 -90 -90 -100 20 -100 20 1k 20k FREQUENCY (Hz) Figure 12. 100 20k FREQUENCY (Hz) FREQUENCY (Hz) PSRR (dB) 5k Figure 10. PSRR (dB) CMRR (dB) FREQUENCY (Hz) 1k 5k 20k FREQUENCY (Hz) 100 1k 5k 20k FREQUENCY (Hz) Figure 14. Figure 15. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 7 LM48555 SNAS400B - MARCH 2007 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Inductor Current vs Output Voltage Swing ZL = 1F + 20, f = 1kHz, VDD = 3V, 4.2V, 5V Supply Current vs Supply Voltage 16 120 SUPPLY CURRENT (mA) INDUCTOR CURRENT (mA) 14 100 80 60 40 20 0 10 8 6 4 2 0 1 2 3 4 5 6 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) OUTPUT VOLTAGE SWING (VRMS) Figure 16. 8 12 Figure 17. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 LM48555 www.ti.com SNAS400B - MARCH 2007 - REVISED MAY 2013 APPLICATION INFORMATION CHARACTERISTICS OF CERAMIC SPEAKERS Because of their ultra-thin profile piezoelectric ceramic speakers are ideal for portable applications. Piezoelectric materials have high dielectric constants and their component electrical property is like a capacitor. Therefore, piezoelectric ceramic speakers essentially represent capacitive loads over frequency. Because these speakers are capacitive rather than resistive, they require less current than traditional moving coil speakers. However, ceramic speakers require high driving voltages (approximately 15VP-P). To achieve these high output voltages in battery operated applications, the LM48555 integrates a boost converter with an audio amplifier. High quality piezoelectric ceramic speakers are manufactured by TayioYuden (www.t-yuden.com). Tayio Yuden's MLS-A Series Ceramic Speaker series is recommended. DIFFERENTIAL AMPLIFIER EXPLANATION The LM48555 includes a fully differential audio amplifier that features differential input and output stages. Internally this is accomplished by two circuits: a differential amplifier and a common mode feedback amplifier that adjusts the output voltages so that the average value remains VDD/2. When setting the differential gain, the amplifier can be considered to have "halves". Each half uses an input and feedback resistor (RIN_ and RF_) to set its respective closed-loop gain (see Figure 1). With RIN+ = RIN- and RF+ = RF-, the gain is set at -RF/RIN for each half. This results in a differential gain of AVD = -RF/RIN (1) It is extremely important to match the input resistors, as well as the feedback resistors to each other for best amplifier performance. A differential amplifier works in a manner where the difference between the two input signals is amplified. In most applications, this would require input signals that are 180 out of phase with each other. The LM48555 can be used, however, as a single-ended input amplifier while still retaining its fully differential benefits. In fact, completely unrelated signals may be placed at the input pins. The LM48555 simply amplifies the difference between them. The LM48555 provides what is known as a "bridged mode" output (bridge-tied-load, BTL). This results in output signals at OUT+ and OUT- that are 180 out of phase with respect to each other. Bridged mode operation is different from the traditional single-ended amplifier configuration that connects the load between the amplifier output and ground. A bridged amplifier design has advantages over the single-ended configuration: it provides differential drive to the load, thus doubling maximum possible output swing for a specific supply voltage. Up to four times the output power is possible compared with a single-ended amplifier under the same conditions. A bridged configuration, such as the one used in the LM48555, also creates a second advantage over singleended amplifiers. Since the differential outputs, OUT+ and OUT-, are biased at half-supply, no net DC voltage exists across the load. This assumes that the input resistor pair and the feedback resistor pair are properly matched. BTL configuration eliminates the output coupling capacitor required in single supply, single-ended amplifier configurations. If an output coupling capacitor is not used in a single-ended output configuration, the half-supply bias across the load would result in both increased internal IC power dissipation as well as permanent loudspeaker damage. BOOST CONVERTER POWER DISSIPATION At higher duty cycles, the increased ON-time of the switch FET means the maximum output current will be determined by power dissipation within the LM48555 FET switch. The switch power dissipation from ON-time conduction is calculated by Equation 2. PD(SWITCH) = DC x (IINDUCTOR(AVE))2 x RDS(ON) (W) where * DC is the duty cycle (2) There will be some switching losses in addition to the power loss calculated in Equation 2, so some derating needs to be applied when calculating IC power dissipation. See "MAXIMUM TOTAL POWER DISSIPATION" section. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 9 LM48555 SNAS400B - MARCH 2007 - REVISED MAY 2013 www.ti.com MAXIMUM AMPLIFIER POWER DISSIPATION Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation. Since the amplifier portion of the LM48555 has two operational amplifiers, the maximum internal power dissipation is 4 times that of a single-ended amplifier. The maximum power dissipation for a given BTL application can be derived from Equation 3. PDMAX(AMP) = (2VDD2) / (2RO) (W) (3) MAXIMUM TOTAL POWER DISSIPATION The total power dissipation for the LM48555 can be calculated by adding Equation 2 and Equation 3 together to establish Equation 4: PDMAX(TOTAL) = (2VDD2) / (2EFF2RO) (W) where * EFF = Efficiency of boost converter (4) The result from Equation 4 must not be greater than the power dissipation that results from Equation 5: PDMAX = (TJMAX - TA) / JA (W) (5) For the YZR0012Z1A, JA = 114C/W. TJMAX = 150C for the LM48555. Depending on the ambient temperature, TA, of the system surroundings, Equation 5 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 4 is greater than that of Equation 5, then either the supply voltage must be decreased, the load impedance increased or TA reduced. For typical applications, power dissipation is not an issue. Power dissipation is a function of output power and thus, if typical operation is not around the maximum power dissipation point, the ambient temperature may be increased accordingly. STARTUP SEQUENCE Correct startup sequencing is important for optimal device performance. Using the correct startup sequence will improve click and pop performance as well as avoid transients that could reduce battery life. The device should be in Shutdown mode when the supply voltage is applied. Once the supply voltage has been supplied the device can be released from Shutdown mode. SHUTDOWN FUNCTION In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry to provide a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch connected between VDD and Shutdown pins. BOOTSTRAP PIN The bootstrap pin provides a voltage supply for the internal switch driver. Connecting the bootstrap pin to VAMP (See Figure 1) allows for a higher voltage to drive the gate of the switch thereby reducing the RDS(ON). This configuration is necessary in applications with heavier loads. The bootstrap pin can be connected to VDD when driving lighter loads to improve device performance (IDD, THD+N, Noise, etc.). PROPER SELECTION OF EXTERNAL COMPONENTS Proper selection of external components in applications using integrated power amplifiers, and switching DC-DC converters, is critical for optimizing device and system performance. Consideration to component values must be used to maximize overall system quality. The best capacitors for use with the switching converter portion of the LM48555 are multi-layer ceramic capacitors. They have the lowest ESR (equivalent series resistance) and highest resonance frequency, which makes them optimum for high frequency switching converters. When selecting a ceramic capacitor, only X5R and X7R dielectric types should be used. Other types such as Z5U and Y5F have such severe loss of capacitance due to effects of temperature variation and applied voltage, they may provide as little as 20% of rated capacitance in many typical applications. Always consult capacitor manufacturer's data curves before selecting a capacitor. High-quality ceramic capacitors can be obtained from Taiyo-Yuden and Murata. 10 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 LM48555 www.ti.com SNAS400B - MARCH 2007 - REVISED MAY 2013 POWER SUPPLY BYPASSING As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. The capacitor location on both V1 and VDD pins should be as close to the device as possible. SELECTING INPUT AND FEEDBACK CAPACITORS AND RESISTOR FOR AUDIO AMPLIFIER Special care must be taken to match the values of the feedback resistors (RF+ and RF-) to each other as well as matching the input resistors (RIN+ and RIN-) to each other (see Typical Application). Because of the balanced nature of differential amplifiers, resistor matching differences can result in net DC currents across the load. This DC current can increase power consumption, internal IC power dissipation, reduce PSRR, and possibly damage the loudspeaker. To achieve best performance with minimum component count, it is highly recommended that both the feedback and input resistors match to 1% tolerance or better. The input coupling capacitors, CIN, forms a first order high pass filter which limits low frequency response. This value should be chosen based on needed frequency response. High value input capacitors are both expensive and space hungry in portable designs. A certain value capacitor is needed to couple in low frequencies without severe attenuation. Ceramic speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 100Hz to 150Hz. Thus, using a high value input capacitor may not increase actual system performance. In addition to system cost and size, click and pop performance is affected by the value of the input coupling capacitor, CIN. A high value input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally 1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable. Thus, by minimizing the capacitor value based on desired low frequency response, turn-on pops can be minimized. The LM48555 is unity-gain stable which gives the designer maximum system flexibility. However, to drive ceramic speakers, a typical application requires a closed-loop differential gain of 10V/V. In this case, feedback capacitors (CF+, CF-) may be needed as shown in Figure 1 to bandwidth limit the amplifier. If the available input signal is bandwith limited, then capacitors CF+ and CF- can be eliminated. These feedback capacitors create a low pass filter that eliminates possible high frequency noise. Care should be taken when calculating the -3dB frequency (from Equation 6) because an incorrect combination of RF and CF will cause rolloff before the desired frequency. f-3dB = 1 / 2RF*CF (6) SELECTING OUTPUT CAPACITOR (CO) FOR BOOST CONVERTER A single 4.7F to 10F ceramic capacitor will provide sufficient output capacitance for most applications. If larger amounts of capacitance are desired for improved line support and transient response, tantalum capacitors can be used. Aluminum electrolytics with ultra low ESR such as Sanyo Oscon can be used. Typical electrolytic capacitors are not suitable for switching frequencies above 500 kHz because of significant ringing and temperature rise due to self-heating from ripple current. An output capacitor with excessive ESR can also reduce phase margin and cause instability. In general, if electrolytics are used, it is recommended that they be paralleled with ceramic capacitors to reduce ringing, switching losses, and output voltage ripple. SELECTING A POWER SUPPLY BYPASS CAPACITOR A supply bypass capacitor is required to serve as an energy reservoir for the current which must flow into the coil each time the switch turns on. This capacitor must have extremely low ESR, so ceramic capacitors are the best choice. A nominal value of 4.7F is recommended, but larger values can be used. Since this capacitor reduces the amount of voltage ripple seen at the input pin, it also reduces the amount of EMI passed back along that line to other circuitry. SELECTING A SOFT-START CAPACITOR (CSS) The soft-start function charges the boost converter reference voltage slowly. This allows the output of the boost converter to ramp up slowly thus limiting the transient current at startup. Selecting a soft-start capacitor (CSS) value presents a trade off between the wake-up time and the startup transient current. Using a larger capacitor value will increase wake-up time and decrease startup transient current while the apposite effect happens with a smaller capacitor value. A general guideline is to use a capacitor value 1000 times smaller than the output capacitance of the boost converter (CO). A 0.1uF soft-start capacitor is recommended for a typical application. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 11 LM48555 SNAS400B - MARCH 2007 - REVISED MAY 2013 www.ti.com SELECTING DIODES The external diode used in Figure 1 should be a Schottky diode. A 20V diode such as the MBR0520 from Fairchild Semiconductor or ON Semiconductor is recommended. The MBR05XX series of diodes are designed to handle a maximum average current of 0.5A. For applications exceeding 0.5A average but less than 1A, a Microsemi UPS5817 can be used. OUTPUT VOLTAGE OF BOOST CONVERTER The output voltage is set using two internal resistors. The output voltage of the boost converter is set to 8V (typ). DUTY CYCLE The maximum duty cycle of the boost converter determines the maximum boost ratio of output-to-input voltage that the converter can attain in continuous mode of operation. The duty cycle for a given boost application is defined by Equation 7: Duty Cycle = (VAMP+VDIODE -VDD)/(VAMP+VDIODE-VSW) (7) This applies for continuous mode operation. INDUCTANCE VALUE Inductor value involves trade-offs in performance. Larger inductors reduce inductor ripple current, which typically means less output voltage ripple (for a given size of output capacitor). Larger inductors also mean more load power can be delivered because the energy stored during each switching cycle is: E = L/2 x IP2 where * "lP" is the peak inductor current (8) The LM48555 will limit its switch current based on peak current. With IP fixed, increasing L will increase the maximum amount of power available to the load. Conversely, using too little inductance may limit the amount of load current which can be drawn from the output. Best performance is usually obtained when the converter is operated in "continuous" mode at the load current range of interest, typically giving better load regulation and less output ripple. Continuous operation is defined as not allowing the inductor current to drop to zero during the cycle. Boost converters shift over to discontinuous operation if the load is reduced far enough, but a larger inductor stays continuous over a wider load current range. INDUCTOR SUPPLIERS The recommended inductors for the LM48555 are the Taiyo-Yuden NR4012, NR3010, and CBC3225 series and Murata's LQH3NPN series. When selecting an inductor, the continuous current rating must be high enough to avoid saturation at peak currents. A suitable core type must be used to minimize core (switching) losses, and wire power losses must be considered when selecting the current rating. CALCULATING OUTPUT CURRENT OF BOOST CONVERTER (IAMP) The load current of the boost converter is related to the average inductor current by the relation: IAMP = IINDUCTOR(AVE) x (1 - DC) (A) where * "DC" is the duty cycle of the application (9) The switch current can be found by: ISW = IINDUCTOR(AVE) + 1/2 (IRIPPLE) (A) (10) Inductor ripple current is dependent on inductance, duty cycle, supply voltage and frequency: IRIPPLE = DC x (VDD-VSW) / (f x where * f = switching frequency = 1MHzL) (A) (11) combining all terms, we can develop an expression which allows the maximum available load current to be calculated: 12 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 LM48555 www.ti.com SNAS400B - MARCH 2007 - REVISED MAY 2013 IAMP(max) = (1-DC)x[ISW(max)-DC(V-VSW)]/2fL (A) (12) The equation shown to calculate maximum load current takes into account the losses in the inductor or turn-off switching losses of the FET and diode. DESIGN PARAMETERS VSW AND ISW The value of the FET "ON" voltage (referred to as VSW in Equation 9 thru Equation 12) is dependent on load current. A good approximation can be obtained by multiplying the on resistance (RDS(ON) of the FET times the average inductor current. The maximum peak switch current the device can deliver is dependent on duty cycle. EVALUATION BOARD AND PCB LAYOUT GUIDELINES For information on the LM48555 demo board and PCB layout guidelines refer to Application Notes AN-1611 (Literature Number SNAA041). Revision History Rev Date Description 1.0 03/15/07 Initial Web Release. 1.01 07/27/12 Deleted the Murata references on Application Information. B 05/02/2013 Changed layout of National Data Sheet to TI format. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48555 13 PACKAGE OPTION ADDENDUM www.ti.com 29-Aug-2015 PACKAGING INFORMATION Orderable Device Status (1) LM48555TL/NOPB ACTIVE Package Type Package Pins Package Drawing Qty DSBGA YZR 12 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) TBD Call TI Call TI Op Temp (C) Device Marking (4/5) -40 to 85 G I4 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. 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