Semiconductor Components Industries, LLC, 2001
September, 2000 – Rev. 2 1Publication Order Number:
BCP56T1/D
BCP56T1 Series
Preferred Devices
NPN Silicon
Epitaxial Transistor
These NPN Silicon Epitaxial transistors are designed for use in
audio amplifier applications. The device is housed in the SOT-223
package, which is designed for medium power surface mount
applications.
•High Current: 1.0 Amp
•The SOT-223 package can be soldered using wave or reflow. The
formed leads absorb thermal stress during soldering, eliminating the
possibility of damage to the die
•Available in 12 mm Tape and Reel
Use BCP56T1 to order the 7 inch/1000 unit reel
Use BCP56T3 to order the 13 inch/4000 unit reel
•PNP Complement is BCP53T1
•Device Marking
BCP56T1–10 = BH
BCP56–10T1 = BH–10
BCP56–16T1 = BH–16
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating Symbol Value Unit
Collector-Emitter Voltage VCEO 80 Vdc
Collector-Base Voltage VCBO 100 Vdc
Emitter-Base Voltage VEBO 5 Vdc
Collector Current IC1 Adc
Total Power Dissipation
@ TA = 25°C (Note 1.)
Derate above 25°C
PD1.5
12 Watts
mW/°C
Operating and Storage
Temperature Range TJ, Tstg –65 to 150 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance
Junction-to-Ambient
(surface mounted)
RθJA 83.3 °C/W
Maximum Temperature for
Soldering Purposes
Time in Solder Bath
TL260
10 °C
Sec
1. Device mounted on a FR-4 glass epoxy printed circuit board 1.575 in. x
1.575 in. x 0.0625 in.; mounting pad for the collector lead = 0.93 sq. in.
Device Package Shipping
ORDERING INFORMATION
SOT–223, TO–261AA
CASE 318E
STYLE 1
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BCP56T1 SOT–223 1000/Tape & Reel
MARKING DIAGRAM
BHxxx
BHxxx = Device Code
xxx = –10 or –16
Preferred devices are recommended choices for future use
and best overall value.
COLLECTOR 2,4
BASE
1
EMITTER
3
MEDIUM POWER
NPN SILICON
HIGH CURRENT
TRANSISTOR
SURFACE MOUNT
123
4
BCP56T3 SOT–223 4000/Tape & Reel
BCP56–10T1 SOT–223 1000/Tape & Reel
BCP56–16T1 SOT–223 1000/Tape & Reel
BCP56–16T3 SOT–223 4000/Tape & Reel
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristics Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Collector-Base Breakdown Voltage
(IC = 100 µAdc, IE = 0) V(BR)CBO 100 – – Vdc
Collector-Emitter Breakdown Voltage
(IC = 1.0 mAdc, IB = 0) V(BR)CEO 80 – – Vdc
Emitter-Base Breakdown Voltage
(IE = 10 µAdc, IC = 0) V(BR)EBO 5.0 – – Vdc
Collector-Base Cutoff Current
(VCB = 30 Vdc, IE = 0) ICBO – – 100 nAdc
Emitter-Base Cutoff Current
(VEB = 5.0 Vdc, IC = 0) IEBO – – 10 µAdc
ON CHARACTERISTICS (Note 2.)
DC Current Gain
(IC = 5.0 mA, VCE = 2.0 V) All Part Types
(IC = 150 mA, VCE = 2.0 V) BCP56T1
BCP56-10T1
BCP56-16T1
(IC = 500 mA, VCE = 2.0 V) All Types
hFE 25
40
63
100
25
–
–
–
–
–
–
250
160
250
–
–
Collector-Emitter Saturation Voltage
(IC = 500 mAdc, IB = 50 mAdc) VCE(sat) – – 0.5 Vdc
Base-Emitter On Voltage
(IC = 500 mAdc, VCE = 2.0 Vdc) VBE(on) – – 1.0 Vdc
DYNAMIC CHARACTERISTICS
Current-Gain – Bandwidth Product
(IC = 10 mAdc, VCE = 5.0 Vdc, f = 35 MHz) fT– 130 – MHz
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
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TYPICAL ELECTRICAL CHARACTERISTICS
hFE, DC CURRENT GAIN
100
10 1000100101
IC, COLLECTOR CURRENT (mA)
Figure 1. DC Current Gain
IC, COLLECTOR CURRENT (mA)
Figure 2. Current-Gain – Bandwidth Product
f, CURRENTGAIN  BANDWIDTH PRODUCT (MHz)
T
1000
100
10 100101.0 1000
C, CAPACITANCE (pF)
80
60
40
20
10
8.0
6.0
4.0
VR, REVERSE VOLTAGE (VOLTS)
Figure 3. Capacitance
0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100
IC, COLLECTOR CURRENT (mA)
Figure 4. “On” Voltages
1.0
0.4
01001.00.5 500
1.0
0.8
0.6
0.4
0.2
0
IC, COLLECTOR CURRENT (mA)
Figure 5. Collector Saturation Region
0.05 0.1 0.2 0.5 2.0 5.0 10 20 50
VCE, COLLECTOREMITTER VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
0.8
0.6
0.2
2.0 5.0 10 20 50 200 1.0
VBE(on) @ VCE = 1.0 V
VCE(sat) @ IC/IB = 10
VBE(sat) @ IC/IB = 10
TJ = 125°C
TJ = 25°C
TJ = -55°C
TJ = 25°C
50
mA
100mA
TJ = 25°C
250mA 500mA
IC = 10mA
TJ = 25°C
Cibo
Cobo
1000
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PD = TJ(max) – TA
RθJA
PD = 150°C – 25°C
83.3°C/W = 1.50 watts
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
SOT–223 POWER DISSIPATION
The power dissipation of the SOT–223 is a function of
the pad size. This can vary from the minimum pad size for
soldering t o the pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
mined b y T J(max), the maximum rated junction temperature
of the die, RθJA, the thermal resistance from the device
junction t o ambient; and the operating temperature, TA. Us-
ing the values provided on the data sheet for the SOT–223
package, PD can be calculated as follows.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one
can calculate the power dissipation of the device which in
this case is 1.5 watts.
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.079
2.0
0.15
3.8
0.248
6.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
0.091
2.3
mm
inches
0.091
2.3
SOT–223
0.8 Watts
1.25 Watts* 1.5 Watts
R , Thermal Resistance, Junction
to Ambient (C/W)
θ
JA
°
A, Area (square inches)
0.0 0.2 0.4 0.6 0.8 1.0
160
140
120
100
80
Figure 6. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
Board Material = 0.0625″
G10/FR4, 2 oz Copper
TA = 25°C
*Mounted on the DPAK footprint
The 83.3°C/W for the SOT-223 package assumes the
use of the recommended footprint on a glass epoxy
printed circuit board to achieve a power dissipation of 1.5
watts. There are other alternatives to achieving higher
power dissipation from the SOT-223 package. One is to
increase the area of the collector pad. By increasing the
area of the collector pad, the power dissipation can be
increased. Although the power dissipation can almost be
Another alternative would be to use a ceramic substrate
or an aluminum core board such as Thermal Clad. Using
a board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
doubled with this method, area is taken up on the printed
circuit board which can defeat the purpose of using
surface mount technology. A graph of RθJA versus collec-
tor pad area is shown in Figure 6.
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•The soldering temperature and time should not exceed
260°C for more than 10 seconds.
•When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
•After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
•Mechanical stress or shock should not be applied dur-
ing cooling
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•Always preheat the device.
•The delta temperature between the preheat and
soldering should be 100°C or less.*
•When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference should be a maximum of 10°C.
For any given circuit board, there will be a group of
control settings that will give the desired heat pattern. The
operator must set temperatures for several heating zones,
and a figure for belt speed. Taken together, these control
settings make up a heating “profile” for that particular
circuit board. On machines controlled by a computer, the
computer remembers these profiles from one operating
session t o the next. Figure 7 shows a typical heating profile
for use when soldering a surface mount device to a printed
circuit board. This profile will vary among soldering
systems but it is a good starting point. Factors that can
affect the profile include the type of soldering system in
use, density and types of components on the board, type of
solder used, and the type of board or substrate material
being used. This profile shows temperature versus time.
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the surface mounted package
should be the same as the pad size on the printed circuit
board, i.e., a 1:1 registration.
TYPICAL SOLDER HEATING PROFILE
The line on the graph shows the actual temperature that
might be experienced on the surface of a test board at or
near a central solder joint. The two profiles are based on a
high density and a low density board. The Vitronics
SMD310 convection/infrared reflow soldering system was
used to generate this profile. The type of solder used was
62/36/2 Tin Lead Silver with a melting point between
177–189°C. When this type of furnace is used for solder
reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because i t has a lar ge surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
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STEP 1
PREHEAT
ZONE 1
RAMP"
STEP 2
VENT
SOAK"
STEP 3
HEATING
ZONES 2 & 5
RAMP"
STEP 4
HEATING
ZONES 3 & 6
SOAK"
STEP 5
HEATING
ZONES 4 & 7
SPIKE"
STEP 6
VENT
STEP 7
COOLING
200°C
150°C
100°C
50°C
TIME (3 TO 7 MINUTES TOTAL) TMAX
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
205° TO 219°C
PEAK AT
SOLDER JOINT
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
100°C
150°C
160°C
140°C
Figure 7. Typical Solder Heating Profile
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
170°C
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PACKAGE DIMENSIONS
SOT–223
(TO–261AA)
PLASTIC PACKAGE
CASE 318E–04
ISSUE H
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
H
S
F
A
B
D
G
L
4
123
0.08 (0003)
C
MK
J
DIM
A
MIN MAX MIN MAX
MILLIMETERS
0.249 0.263 6.30 6.70
INCHES
B0.130 0.145 3.30 3.70
C0.060 0.068 1.50 1.75
D0.024 0.035 0.60 0.89
F0.115 0.126 2.90 3.20
G0.087 0.094 2.20 2.40
H0.0008 0.0040 0.020 0.100
J0.009 0.014 0.24 0.35
K0.060 0.078 1.50 2.00
L0.033 0.041 0.85 1.05
M0 10 0 10
S0.264 0.287 6.70 7.30

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
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without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular
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