IRFF110 Data Sheet March 1999 3.5A, 100V, 0.600 Ohm, N-Channel Power MOSFET * 3.5A, 100V * rDS(ON) = 0.600 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Formerly developmental type TA17441. Ordering Information IRFF110 Symbol PACKAGE TO-205AF 1562.3 Features This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. PART NUMBER File Number BRAND D IRFF110 NOTE: When ordering, use the entire part number. G S Packaging JEDEC TO-205AF SOURCE DRAIN (CASE) GATE 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 IRFF110 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFF110 100 100 3.5 14 20 15 0.12 19 -55 to 150 UNITS V V A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC TC = 25oC, Unless Otherwise Specified Electrical Specifications MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER SYMBOL BVDSS VGS = 0V, ID = 250A (Figure 10) 100 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250A 2.0 - 4.0 V - - 25 A - - 250 A 3.5 - - A Zero Gate Voltage Drain Current IDSS TEST CONDITIONS VDS = Rated BVDSS, VGS = 0V VDS = 100V, VGS = 0V, TJ = 125oC On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time rDS(ON) 100 nA 0.5 0.600 1.0 1.5 - S VDD 0.5 x Rated BVDSS, ID 3.5A, RG = 9.1 VGS = 10V, RL = 13 (Figures 17, 18), RL = 14 for VDS = 50V, RL = 23 for VDS = 80V, MOSFET Switching Times are Essentially Independent of Operating Temperature - 10 20 ns - 15 25 ns - 15 25 ns Qg(TOT) Gate to Source Charge - - VDS > ID(ON) x rDS(ON)MAX, ID = 1.5A (Figure 12) tf Total Gate Charge (Gate to Source + Gate to Drain) - VGS = 10V, ID = 1.5A (Figures 8, 9) gfs td(OFF) Fall Time VGS = 20V td(ON) tr Turn-Off Delay Time VDS > ID(ON) x rDS(ON)MAX , VGS = 10V Qgs - 10 20 ns - 5.0 7.5 nC - 2.0 - nC 3.0 - nC 135 - pF VGS = 10V, ID = 3.5A, VDS = 0.8 x Rated BVDSS , IG(REF) = 1.5mA (Figures 14, 19, 20), Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - Gate to Drain "Miller" Charge Qgd Input Capacitance CISS Output Capacitance COSS - 80 - pF Reverse Transfer Capacitance CRSS - 20 - pF - 5.0 - nH - 15 - nH - - 8.33 oC/W - - 175 oC/W Internal Drain Inductance LD Measured from the Drain Lead, 5.0mm (0.2in) from Header to Center of Die Internal Source Inductance LS Measured from the Source Lead, 5.0mm (0.2in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D LD G LS S Thermal Resistance, Junction to Case RJC Thermal Resistance, Junction to Ambient RJA 2 Free Air Operation IRFF110 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISM TEST CONDITIONS MIN TYP MAX UNITS - - 3.5 A - - 14 A TJ = 25oC, ISD = 3.5A, VGS = 0V (Figure 13) - - 2.5 V TJ = 150oC, ISD = 3.5A, dISD/dt = 100A/s TJ = 150oC, ISD = 3.5A, dISD/dt = 100A/s - 200 - ns - 1.0 - C Intrinsic Turn-On Time is Negligible. Turn-On Speed is Substantially Controlled by LS + LD - - - - Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier D G S Source to Drain Diode Voltage (Note 2) VSD Reverse Recovery Time trr Reverse Recovery Charge QRR Forward Turn-On Time tON NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 5V, starting TJ = 25oC, L = 2.3mH, RG = 25, peak IAS = 3.5A. See Figures 15, 16. Typical Performance Curves Unless Otherwise Specified 5 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 0 50 100 4 3 2 1 0 25 150 50 TC , CASE TEMPERATURE (oC) 75 100 150 125 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 2 1 ZJC, NORMALIZED THERMAL IMPEDENCE POWER DISSIPATION MULTIPLIER 1.2 0.5 0.2 PDM 0.1 0.1 0.05 0.02 0.01 0.01 10-5 t1 t2 SINGLE PULSE 10-4 DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 10-3 10-2 10-1 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 1 10 IRFF110 Typical Performance Curves Unless Otherwise Specified (Continued) 8.0 30.0 80s PULSE TEST VGS = 10V VGS = 9V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10s 10.0 100s 1ms 1.0 OPERATION IN THIS AREA LIMITED BY rDS(ON) 10ms 100ms VGS = 8V 6.4 4.8 VGS = 7V 3.2 VGS = 6V 1.6 VGS = 5V VGS = 4V DC 0.1 0 1 10 VDS, DRAIN SOURCE VOLTAGE (V) 100 0 200 10 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 6.4 VGS = 9V 4.8 VGS = 8V VGS = 7V 3.2 VGS = 6V 1.6 VGS = 5V ID(ON), ON-STATE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 40 50 8.0 VGS = 10V 80s PULSE TEST VGS = 4V VDS > ID(ON) x rDS(ON)MAX 0 2.0 1.0 3.0 4.0 6.4 25oC 4.8 -55oC 3.2 1.6 0 5.0 0 2 VDS, DRAIN TO SOURCE VOLTAGE (V) 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 6. SATURATION CHARACTERISTICS 2.0 125oC 80s PULSE TEST 0 FIGURE 7. TRANSFER CHARACTERISTICS 2.50 2s PULSE TEST NORMALIZED DRAIN TO SOURCE ON RESISTANCE ON RESISTANCE () 30 FIGURE 5. OUTPUT CHARACTERISTICS 8.0 rDS(ON), DRAIN TO SOURCE 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 1.5 VGS = 10V 1.0 VGS = 20V 0.5 0 VGS = 10V ID = 1.5A 2.00 1.50 1.00 0.50 0 0 5 10 15 ID, DRAIN CURRENT (A) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4 20 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRFF110 Typical Performance Curves 500 ID = 250A 1.15 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD 400 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.25 Unless Otherwise Specified (Continued) 1.05 0.95 0.85 300 200 CISS 100 COSS CRSS 0.75 -40 0 40 80 0 120 10 1 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE ISD, SOURCE TO DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) VDS > ID(ON) x rDS(ON)MAX 80s PULSE TEST 3.2 -55oC 2.4 25oC 1.6 125oC 0.8 0 1.6 3.2 4.8 6.4 150oC VGS, GATE TO SOURCE (V) 25oC 0.1 8.0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSD, SOURCE TO DRAIN VOLTAGE (V) FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE ID = 3.5A VDS = 50V 15 VDS = 20V VDS = 80V 10 5 0 2 4 6 8 10 Qg(TOT) , TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 50 1.0 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 0 40 10 ID , DRAIN CURRENT (A) 20 30 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 4.0 0 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 2.0 IRFF110 Test Circuits and Waveforms VDS BVDSS tP VDS L IAS VARY tP TO OBTAIN VDD + RG REQUIRED PEAK IAS - VDD DUT VGS tP 0V 0 IAS tAV 0.01 FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr VDS RL 90% 90% + RG - VDD 10% 10% 0 90% DUT VGS VGS 0 FIGURE 17. SWITCHING TIME TEST CIRCUIT 0.2F 50% PULSE WIDTH 10% FIGURE 18. RESISTIVE SWITCHING WAVEFORMS VDS (ISOLATED SUPPLY) CURRENT REGULATOR 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50k Qgd 0.3F VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 6 IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRFF110 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. 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