74F259
Latch
Product specification
IC15 Data Handbook
1989 Apr 11
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74F259Latch
2
1989 Apr 11 853–0362 06316
FEATURES
•Combines demultiplexer and 8-bit latch
•Serial-to-parallel capability
•Output from each storage bit available
•Random (addressable) data entry
•Easily expandable
•Common reset input
•Useful as 1-of-8 active-High decoder
DESCRIPTION
The 74F259 addressable latch has four distinct modes of operation
which are selectable by controlling the Master Reset (MR) and
Enable (E) inputs (see Function Table). In the addressable latch
mode, data at the Data inputs is written into the addressed latches.
The addressed latches will follow the Data input with all
unaddressed latches remaining in their previous states. In the store
mode, all latches remain in their previous states and are unaffected
by the Data or Address inputs. To eliminate the possibility of entering
erroneous data in the latches, the enable should be held High
(inactive) while the address lines are changing. In the 1-of-8
decoding or demultiplexing mode (MR=E=Low), addressed outputs
will follow the level of the Data input, with all other outputs Low. In
the Master Reset mode, all outputs are Low and unaffected by the
Address and Data inputs.
PIN CONFIGURATION
16
15
14
13
12
11
107
6
5
4
3
2
1
98
VCC
A0
A1
A2
Q0
Q1
Q2
Q3
GND
MR
E
D
Q7
Q6
Q5
Q4
SF00823
TYPE TYPICAL
PROPAGATION
DELAY
TYPICAL SUPPLY
CURRENT (TOTAL)
74F259 7.5ns 31mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
PKG DWG #
16-pin plastic DIP N74F259N SOT38-4
16-pin plastic SO N74F259D SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION 74F (U.L.)
HIGH/LOW LOAD VALUE
HIGH/LOW
DData input 1.0/1.0 20µA/0.6mA
A0, A1, A2 Address inputs 1.0/1.0 20µA/0.6mA
EEnable input (active Low) 1.0/1.0 20µA/0.6mA
MR Master Reset inputs (active Low) 1.0/1.0 20µA/0.6mA
Q0 – Q7 Data outputs 50/33 1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
Philips Semiconductors Product specification
74F259Latch
1989 Apr 11 3
LOGIC SYMBOL
VCC = Pin 16
GND = Pin 8
E
MR
14
15
SF00824
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
45679101112
13 3
DA3
1
A0
2
A1
IEC/IEEE SYMBOL
G8
14
13
15 Z10
SF00825
Z9
1
2
3
9, 10D
10m 0R
00
7
2
4
5
6
7
9
10
11
12
9, 10D
10m 1R
9, 10D
10m 2R
9, 10D
10m 3R
9, 10D
10m 4R
9, 10D
10m 5R
9, 10D
10m 6R
9, 10D
10m 7R
8M
FUNCTION TABLE
INPUTS OUTPUTS
OPERATING MODE
MR E D A0 A1 A2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
OPERATING
MODE
L H X X X L L L L L L L L L Master Reset
L L d L L L Q=d L L L L L L L
L L d H L L L Q=d L L L L L L
L L d L H L L L Q=d L L L L L
Demulti
p
lex
• • • • • • • • • • • • • •
Demulti lex
(active-High decoder
hDH)
• • • • • • • • • • • • • • w
h
en
D
=
H)
• • • • • • • • • • • • • •
L L d H H H L L L L L L L Q=d
H H X X X X q0 q1 q2 q3 q4 q5 q6 q7 Store (do nothing)
H L d L L L Q=d q1 q2 q3 q4 q5 q6 q7
H L d H L L q0 Q=d q2 q3 q4 q5 q6 q7
H L d L H L q0 q1 Q=d q3 q4 q5 q6 q7
• • • • • • • • • • • • • • Addressable Latch
• • • • • • • • • • • • • •
• • • • • • • • • • • • • •
H L d H H H q0 q1 q2 q3 q4 q5 q6 Q=d
H = High voltage level
L = Low voltage level
X = Don’t care
d = High or Low data one setup time prior to the Low-to-High Enable transition
q = Lower case letters indicate the state of the referenced output established during the last cycle in which it was addressed or cleared.
Philips Semiconductors Product specification
74F259Latch
1989 Apr 11 4
LOGIC DIAGRAM
VCC = Pin 16
GND = Pin 8
SF00826
12
11
10
9
7
6
5
4
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
D13
14
15
3
2
1
A0
A1
MR
E
A2
Philips Semiconductors Product specification
74F259Latch
1989 Apr 11 5
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL PARAMETER RATING UNIT
VCC Supply voltage –0.5 to +7.0 V
VIN Input voltage –0.5 to +7.0 V
IIN Input current –30 to +5 mA
VOUT Voltage applied to output in High output state –0.5 to VCC V
IOUT Current applied to output in Low output state 40 mA
Tamb Operating free-air temperature range 0 to +70 °C
Tstg Storage temperature range –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
MIN NOM MAX
VCC Supply voltage 4.5 5.0 5.5 V
VIH High-level input voltage 2.0 V
VIL Low-level input voltage 0.8 V
IIK Input clamp current –18 mA
IOH High-level output current –1 mA
IOL Low-level output current 20 mA
Tamb Operating free-air temperature range 0 70 °C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL PARAMETER TEST LIMITS UNIT
CONDITIONS1MIN TYP2MAX
VOH High-level output voltage VCC = MIN, VIL = MAX, ±10%VCC 2.5 V
VIH = MIN, IOL = MAX ±5%VCC 2.7 3.4 V
VOL Low-level output voltage VCC = MIN, VIL = MAX, ±10%VCC 0.35 0.50 V
VIH = MIN, IOL = MAX ±5%VCC 0.35 0.50 V
VIK Input clamp voltage VCC = MIN, II = IIK –0.73 –1.2 V
IIInput current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
IIH High-level input current VCC = MAX, VI = 2.7V 20 µA
IIL Low-level input current VCC = MAX, VI = 0.5V –0.6 mA
IOS Short-circuit output current3 VCC = MAX –60 –150 mA
ICC Supply current (total) ICCH VCC = MAX 24 46 mA
ICCL 37 75 mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. To reduce the effect of external noise during test.
4. Not more than one output should be shorted at a time. For testing IOS, the use of High-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
Philips Semiconductors Product specification
74F259Latch
1989 Apr 11 6
AC ELECTRICAL CHARACTERISTICS
LIMITS
Tamb = +25°C Tamb = 0°C to +70°C
SYMBOL PARAMETER TEST VCC = +5V VCC = +5V ± 10% UNIT
CONDITION CL = 50pF, RL = 500ΩCL = 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
tPLH
tPHL Propagation delay
D to Qn Waveform
NO TAG 4.0
3.0 7.0
5.0 9.0
7.0 4.0
2.5 10.0
7.5 ns
tPLH
tPHL Propagation delay
E to Qn Waveform
NO TAG 4.5
3.0 8.0
5.0 10.5
7.0 4.5
3.0 12.0
8.0 ns
tPLH
tPHL Propagation delay
An to Qn Waveform
NO TAG 5.0
4.0 10.0
8.5 14.0
9.5 5.0
4.0 14.5
10.0 ns
tPHL Propagation delay
MR to Qn Waveform
NO TAG 5.0 7.0 9.0 4.5 10.0 ns
AC SETUP REQUIREMENTS
LIMITS
Tamb = +25°C Tamb = 0°C to +70°C
SYMBOL PARAMETER TEST VCC = +5.0V VCC = +5.0V ± 10% UNIT
CONDITION CL = 50pF, RL = 500ΩCL= 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
ts(H)
ts(L) Setup time, High or Low
D to E Waveform
NO TAG 3.0
6.5 3.0
7.0 ns
th(H)
th(L) Hold time, High or Low
D to E Waveform
NO TAG 0
00
0ns
ts(H)
ts(L) Setup time, High or Low
An to E1Waveform
NO TAG 2.0
2.0 2.0
2.0 ns
th(H)
th(L) Hold time, High or Low
An to E2Waveform
NO TAG 0
00
0ns
tw(L) E Pulse width, Low W aveform
NO TAG 7.5 8.0 ns
tw(L) MR Pulse width, Low W aveform
NO TAG 3.0 3.0 ns
NOTES:
1. The Address to Enable setup time is the time before the High-to-Low Enable transition that the Address must be stable so that the correct
latch is addressed and the other latches are not affected.
2. The Address to Enable hold time is the time before the Low-to-High Enable transition that the Address must be stable so that the correct
latch is addressed and the other latches are not affected.
Philips Semiconductors Product specification
74F259Latch
1989 Apr 11 7
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
tPHL
VM
VM
E
QnVMVM
tPLH
SF00827
tW(L)
VM
D
W aveform 1. Propagation Delay,
Enable Input to Output, Enable Pulse Width
VM
VM
tPLH
tPHL
Qn
An
SF00811
VM
VM
W aveform 2. Propagation Delay Address to Output
VM
tPHL
Qn
MR
SF00812
VM
VM
tW(L)
W aveform 3. Master Reset Pulse W idth and
Master Reset to Output Delay
VMVMVMVM
VMVM
ts(L) th(L)ts(H) th(H)
D
Qn
SF00828
E
Q=D Q=D
W aveform 4. Data Setup and Hold Times
VM
VM
An
ts
E
VM
SF00814
VM
th
Address Stable
W aveform 5. Address Setup and Hold Times
Philips Semiconductors Product specification
74F259Latch
1989 Apr 11 8
TEST CIRCUIT AND WAVEFORMS
tw90%
VM
10%
90%
VM10%
90%
VM10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0V
0V
tTHL (tf )
INPUT PULSE REQUIREMENTS
rep. rate twtTLH tTHL
1MHz 500ns 2.5ns 2.5ns
Input Pulse Definition
VCC
family
74F
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN VOUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
RL= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
CL= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
RT= Termination resistance should be equal to ZOUT of
pulse generators.
tTHL (tf )
tTLH (tr )
tTLH (tr )AMP (V)
amplitude
3.0V 1.5V
VM
SF00006
Philips Semiconductors Product specification
74F259Latch
1989 Apr 11 9
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
Philips Semiconductors Product specification
74F259Latch
1989 Apr 11 10
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
Philips Semiconductors Product specification
74F259Latch
1989 Apr 11 11
NOTES
Philips Semiconductors Product specification
74F259Latch
yyyy mmm dd 12
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may af fect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98
Document order number: 9397-750-05109
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition [1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.
