INTEGRATED CIRCUITS DIVISION
DS-IXD_604-R09 www.ixysic.com 1
Features
•4A Source/Sink Drive Current
•Wide Operating Voltage Range: 4.5V to 35V
•-40°C to +125°C Extended Operating Temperature
Range
•Logic Input Withstands Negative Swing of up to 5V
•Outputs Ma y be Connected in Parallel for Higher
Drive Current
•Matched Rise and Fall Times
•Low Propaga tion Delay Time
•Low, 10A Supply Current
•Low Output Impedance
Applications
•Efficient Power MOSFET and IGBT Switching
•Switch Mode Power Supplies
•Motor Controls
•DC to DC Converters
•Class-D Switching Amplifiers
•Pulse Transf ormer Driver
Description
The IXDD604/IXDF604/IXDI604/IXDN604 dual
high-speed gate driv ers are especially w ell suited for
driving the latest IXYS MOSFETs and IGBTs. Each of
the two outputs can source and sink 4A of current
while producing v oltage rise and fall times of less than
10ns. The input of each driv er is virtually immune to
latch up, and proprietary circuitry eliminates cross
conduction and current “shoot -throu gh.” Low
propagation dela y and fast, matched rise and fall times
make t he IXD_604 f amily ideal for high-frequency and
high-pow er applications.
The IXDD604 is a dual non-inv e rting driver with an
enable. The IXDN604 is a dual non-inverting driver,
the IXDI604 is a dual in verting driver , and the IXDF604
has one inverting driver and one non-inverting driver.
The IXD_604 family is a vailable in a standard 8-pin
DIP (PI), 8-pin SOIC (SIA), 8-pin Pow er SOIC with an
e xpo sed met al back (SI), and an 8-pin DFN (D2)
package.
Ordering Information
Part Number Logic
Configuration Package Type Packing
Method Quantity
IXDD604D2TR 8-Pin DFN Tape & Reel 2000
IXDD604PI 8-Pin DIP Tube 50
IXDD604SI 8-Pin Power SOIC with Exposed Metal Back Tube 100
IXDD604SITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel 2000
IXDD604SIA 8-Pin SOIC Tube 100
IXDD604SIATR 8-Pin SOIC Tape & Reel 2000
IXDF604PI 8-Pin DIP Tube 50
IXDF604SI 8-Pin Power SOIC with Exposed Metal Back Tube 100
IXDF604SITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel 2000
IXDF604SIA 8-Pin SOIC Tube 100
IXDF604SIATR 8-Pin SOIC Tape & Reel 2000
IXDI604PI 8-Pin DIP Tube 50
IXDI604SI 8-Pin Power SOIC with Exposed Metal Back Tube 100
IXDI604SITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel 2000
IXDI604SIA 8-Pin SOIC Tube 100
IXDI604SIATR 8-Pin SOIC Tape & Reel 2000
IXDN604PI 8-Pin DIP Tube 50
IXDN604SI 8-Pin Power SOIC with Exposed Metal Back Tube 100
IXDN604SITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel 2000
IXDN604SIA 8-Pin SOIC Tube 100
IXDN604SIATR 8-Pin SOIC Tape & Reel 2000
ENA
INA
ENB
INB
OUTA
OUTB
A
B
INA
INB
A
B
OUTA
OUTB
INA
INB
A
B
OUTA
OUTB
INA
INB
OUTA
OUTB
A
B
IXD_604
4-Ampere Dual Low-Side
Ultrafast MOSFET Drivers
INTEGRATED CIRCUITS DIVISION
IXD_604
2www.ixysic.com R09
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.5 Electrical Characteristics: TA = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.6 Electrical Characteristics: -40°C < TA < +125°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.7 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2. IXD_604 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Characteristics Test Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. Block Diagrams & Truth Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 IXDD604 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 IXDI604 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 IXDF604. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.4 IXDN604 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
INTEGRATED CIRCUITS DIVISION
IXD_604
R09 www.ixysic.com 3
1 Specifications
1.1 Pin Configurations 1.2 Pin Definitions
1.3 Absolute Maximum Ratings
Absolute maximum electrical ratings are at 25°C
Absolute maximum ratings are stress r a tings. Stresses in excess of these ratings can cause permanent damage to the device.
Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not
implied.
1.4 Recommended Operating Conditions
IXDD604PI/SI/SIA
ENA
INA
GND
INB
ENB
OUTA
VCC
OUTB
1
4
3
2
8
5
6
7
A
B
IXDF604PI/SI/SIA
NC
INA
GND
INB
NC
OUTA
VCC
OUTB
1
4
3
2
8
5
6
7
A
B
IXDI604PI/SI/SIA
NC
INA
GND
INB
NC
OUTA
VCC
OUTB
1
4
3
2
8
5
6
7
A
B
IXDN604PI/SI/SIA
NC
INA
GND
INB
NC
OUTA
VCC
OUTB
1
4
3
2
8
5
6
7
A
B
IXDD604D2
ENA
INA
INB
ENB
OUTA
GND
VCC
OUTB
A
1
4
3
2
8
5
6
7
B
Pin Name Description
INA Channel A Logic Input
INB Channel B Logic Input
ENA
Channel A Enable Input -
Drive pin low to disable Channel A and force
Channel A Output to a high impedance state
ENB
Channel B Enable Input -
Drive pin low to disable Channel A and force
Channel A Output to a high impedance state
OUTA
OUTA
Channel A Output - Sources or sinks current to
turn-on or turn-off a discrete MOSFET or IGBT
OUTB
OUTB
Channel B Output - Sources or sinks current to
turn-on or turn-off a discrete MOSFET or IGBT
VCC Supply Voltage - Provides power to the device
GND Ground - Common ground reference for the
device
Parameter Symbol Minimum Maximum Units
Supply Voltage VCC -0.3 40 V
Input Voltage VINx , VENx -5 VCC+0.3 V
Output Current IOUT -±4A
Output Pulsed Current (0.5s) Iout_pulsed -±5 A
Junction Temperature TJ-55 +150 °C
Storage Temperature TSTG -65 +150 °C
Parameter Symbol Range Units
Supply Voltage VCC 4.5 to 35 V
Operating Temperature Range T
A-40 to +125 °C
INTEGRATED CIRCUITS DIVISION
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IXD_604
1.5 Electrical Ch ara ct e ri st ic s: TA = 25°C
Test Conditions: 4.5V < VCC < 35V, one channel (unless otherwise noted).
1.6 Electrical Ch ara ct e ri st ic s: -40°C < TA < +125°C
Test Conditions: 4.5V < VCC < 35V, one channel (unless otherwise noted).
Parameter Conditions Symbol Minimum Typical Maximum Units
Input Voltage, High 4.5V < VCC < 18V VIH 3.0 - - V
Input Voltage, Low 4.5V < VCC < 18V VIL --0.8
Input Current 0V < VIN < VCC IIN --±10A
High EN Input Voltage IXDD604 only VENH 2/3VCC --
V
Low EN Input Voltage IXDD604 only VENL --
1/3VCC
Output Voltage, High - VOH VCC-0.025 --
V
Output Voltage, Low - VOL - - 0.025
Output Resistance, High State VCC=18V, IOUT=-10mA ROH -1.32.5
Output Resistance, Low State VCC=18V, IOUT=10mA ROL -1.12
Output Current, Continuous Limited by package power
dissipation IDC --±1A
Rise Time VCC=18V, CLOAD=1000pF tr-916
ns
Fall Time VCC=18V, CLOAD=1000pF tf-814
On-Time Propagation Delay VCC=18V, CLOAD=1000pF tondly -2950
Off-Time Propagation Delay VCC=18V, CLOAD=1000pF toffdly -3550
Enable to Output-High Delay Time IXDD604 only, VCC=18V tENOH -3555
Disable to High Impedance State Delay Time IXDD604 only, VCC=18V tDOLD -4055
Enable Pull-Up Resistor - REN -200-k
Power Supply Current
VCC=18V, VIN=3.5V
ICC
-13mA
VCC=18V, VIN=0V -<110
A
VCC=18V, VIN=VCC -<110
Parameter Conditions Symbol Minimum Maximum Units
Input Voltage, High 4.5V < VCC < 18V VIH 3.3 - V
Input Voltage, Low 4.5V < VCC < 18V VIL -0.65
Input Current 0V < VIN < VCC IIN -10 10 A
Output Voltage, High - VOH VCC-0.025 -V
Output Voltage, Low - VOL -0.025
Output Resistance, High State VCC=18V, IOUT=-10mA ROH -3
Output Resistance, Low State VCC=18V, IOUT=10mA ROL -2.5
Output Current, Continuous Limited by package power
dissipation IDC -±1A
Rise Time VCC=18V, CLOAD=1000pF tr-16
ns
Fall Time VCC=18V, CLOAD=1000pF tf-14
On-Time Propagation Delay VCC=18V, CLOAD=1000pF tondly -65
Off-Time Propagation Delay VCC=18V, CLOAD=1000pF toffdly -65
Enable to Output-High Delay Time IXDD604 only, VCC=18V tENOH -65
Disable to High Impedance State Delay Time IXDD604 only, VCC=18V tDOLD -65
Power Supply Current
VCC=18V, VIN=3.5V
ICC
-3.5mA
VCC=18V, VIN=0V -150
A
VCC=18V, VIN=VCC -150
INTEGRATED CIRCUITS DIVISION
IXD_604
R09 www.ixysic.com 5
1.7 Thermal Characteristics
2 IXD_604 Performance
2.1 Timing Diagrams
2.2 Characteristics Test Diagram
Package Parameter Symbol Rating Units
D2 (8-Pin DFN)
Thermal Resistance, Junction-to-Ambient JA
35
°C/W
PI (8-Pin DIP) 125
SI (8-Pin Power SOIC) 85
SIA (8-Pin SOIC) 120
SI (8-Pin Power SOIC) Thermal Resistance, Junction-to-Case JC 10 °C/W
10%
90%
t
ondly
t
offdly
t
f
t
r
V
IH
V
IL
INx
OUTx
10%
90%
t
ondly
t
offdly
t
r
t
f
V
IH
V
IL
INx
OUTx
ENA
ENB
INAOUTA
GND
VCC
INB
VCC
+
-
VIN
0.1μF10μFOUTB
CLOAD
Tektronix
Current Probe
6302
Tektronix
Current Probe
6302
CLOAD
VCC
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IXD_604
3 Block Diagrams & Truth Tab les
3.1 IXDD604
3.2 IXDI604
3.3 IXDF604
3.4 IXDN604
INXENXOUTX
0 1 or open 0
1 1 or open 1
00
Z
10
Z
INXOUTX
01
10
200kΩ
ENA
INA
GND
INB
ENB
OUTA
V
CC
OUTB
V
CC
V
CC
IXDD604
200kΩ
V
CC
INA
GND
INB
OUTA
VCC
OUTB
VCC
IXDI604
INA OUTA
01
10
INB OUTB
00
11
INXOUTX
00
11
INA
GND
INB
OUTA
VCC
OUTB
VCC
IXDN604
INTEGRATED CIRCUITS DIVISION
IXD_604
R09 www.ixysic.com 7
4 Typical Performance Characteristics
Load Capacitance (pF)
0 2000 4000 6000 8000 10000
Rise Time (ns)
0
20
40
60
80
100
120
A&B Rise Time vs. Load Capacitance
at V arious VCC Levels
VCC=4.5V
VCC=8V
VCC=12V
VCC=18V
VCC=24V
VCC=35V
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Rise & Fall Times (ns)
4
5
6
7
8
9
10
A&B Rise and Fall Times
vs. Temperature
(Input=0-5V, VCC=18V, CL=1nF)
tr
tf
Supply V oltage (V)
0 5 10 15 20 25 30 35 40
Fall Time (ns)
0
20
40
60
80
100
120
A&B Fall Times vs. Supply Voltage
(Input=0-5V, f=10kHz, TA=25ºC)
CL=10nF
CL=1nF
CL=470pF
Supply V oltage (V)
0 5 10 15 20 25 30 35 40
Rise Time (ns)
0
20
40
60
80
100
120
A&B Rise Times vs. Supply Voltage
(Input=0-5V, f=10kHz, TA=25ºC)
CL=10nF
CL=1nF
CL=470pF
Load Capacitance (pF)
0 2000 4000 6000 8000 10000
Fall Time (ns)
0
20
40
60
80
100
120
A&B Fall Time vs. Load Capacitance
at V arious VCC Levels
VCC=4.5V
VCC=8V
VCC=12V
VCC=18V
VCC=24V
VCC=35V
Supply V oltage (V)
0 5 10 15 20 25 30 35
Input Threshold (V)
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2 Input Threshold vs. Supply Voltage
VIH
VIL
Temperature (ºC)
-40 -20 0 20 40 60 80100120140
Input Threshold V oltage (V)
1.7
1.9
2.1
2.3
2.5
2.7
2.9
Input Threshold V oltage
vs. Temperature
(VCC=18V, CL=1nF)
Min VIH
Max VIL
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Propagation Delay (ns)
20
25
30
35
40
45
50 Propagation Delay vs. Temperature
toffdly
tondly
Input V oltage (V)
246810 12
Propagation Delay (ns)
20
30
40
50
60
70
Propagation Delay vs. Input Voltage
(VCC=15V, CL=1nF)
tondly
toffdly
Supply V oltage (V)
0 5 10 15 20 25 30 35
Propagation Delay (ns)
20
40
60
80
100
120
140
160
Propagation Delay vs. Supply Voltage
(VIN=0-5V, CL=1nF, f=1kHz)
toffdly
tondly
Supply V oltage (V)
0 5 10 15 20 25 30 35
Enable Threshold (V)
0
2
4
6
8
10
12
14
16
18
20
22 Enable Threshold vs. Supply Voltage
VENH
VENL
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IXD_604
Frequency (kHz)
1 10 100 1000 10000
Supply Current (mA)
1
10
100
1000
Supply Current vs. Frequency
Both Outputs Active
(VCC=35V)
CL=10nF
CL=1nF
CL=470pF
Load Capacitance (pF)
100 1000 10000
Supply Current (mA)
0
50
100
150
200
250
300
350
Supply Current vs. Load Capacitance
Both Outputs Active
(VCC=8V)
f=2MHz
f=1MHz
f=500kHz
f=100kHz
f=50kHz
Load Capacitance (pF)
100 1000 10000
Supply Current (mA)
0
50
100
150
200
250
300
350
400
Supply Current vs. Load Capacitance
Both Outputs Active
(VCC=12V)
f=2MHz
f=1MHz
f=500kHz
f=100kHz
f=50kHz
Load Capacitance (pF)
100 1000 10000
Supply Current (mA)
0
50
100
150
200
250
300
350
400
Supply Current vs. Load Capacitance
Both Outputs Active
(VCC=18V)
f=1MHz
f=500kHz
f=100kHz
f=50kHz
f=2MHz
Load Capacitance (pF)
100 1000 10000
Supply Current (mA)
1
10
100
1000
Supply Current vs. Load Capacitance
Both Outputs Active
(VCC=35V)
f=2MHz
f=1MHz
f=500kHz
f=100kHz
f=50kHz
f=10kHz
Frequency (kHz)
1 10 100 1000 10000
Supply Current (mA)
0.1
1
10
100
1000
Supply Current vs. Frequency
Both Outputs Active
(VCC=18V)
CL=10nF
CL=1nF
CL=470pF
Supply V oltage (V)
0 5 10 15 20 25 30 35
Output Source Current (A)
0
-2
-4
-6
-8
-10
Output Source Current
vs. Supply Voltage
(CL=10nF)
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Supply Current (mA)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Dynamic Supply Current
vs. Temperature
(VCC=18V, VIN=5V, f=1khz, CL=1nF)
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Supply Current (mA)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Quiescent Supply Current
vs. Temperature
(VCC=18V)
VIN=3.5V
VIN=5V
VIN=10V
VIN=0V & 18V
Frequency (kHz)
1 10 100 1000 10000
Supply Current (mA)
0.01
0.1
1
10
100
1000
Supply Current vs. Frequency
Both Outputs Active
(VCC=8V)
CL=10nF
CL=1nF
CL=470pF
Frequency (kHz)
1 10 100 1000
Supply Current (mA)
0.01
0.1
1
10
100
1000
Supply Current vs. Frequency
Both Outputs Active
(VCC=12V)
CL=10nF
CL=1nF
CL=470pF
Supply V oltage (V)
0 5 10 15 20 25 30 35
Output Sink Current (A)
0
2
4
6
8
10
Output Sink Current
vs. Supply Voltage
(CL=10nF)
INTEGRATED CIRCUITS DIVISION
IXD_604
R09 www.ixysic.com 9
Supply V oltage (V)
0 5 10 15 20 25 30 35
Resistance (Ω)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
High State Output Resistance
vs. Supply Voltage
(IOUT= -10mA)
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Output Sink Current (A)
2
3
4
5
6
Output Sink Current
vs. Temperature
(VCC=18V, CL=10nF)
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Output Source Current (A)
2
3
4
5
6
Output Source Current
vs. Temperature
(VCC=18V, CL=10nF)
Supply V oltage (V)
0 5 10 15 20 25 30 35
Resistance (Ω)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Low State Output Resistance
vs. Supply Voltage
(IOUT= +10mA)
INTEGRATED CIRCUITS DIVISION
10 www.ixysic.com R09
IXD_604
5 Manufacturing Information
5.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moistur e ing r ession. IXYS Integrated
Circuits Division classifies its plastic encapsulated devices for moistu re se nsitivity according to the latest
v ersion o f the joint indust ry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation.
We test all of our products to t he maximum conditions set forth in the standard, and guarantee proper
operation of our devices when handled according to the limitations and information in that standard as well as to any
limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operab le life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled
according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
5.2 ESD Sensitivi ty
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
5.3 Soldering Profile
Provided in the table below is the Classification Temperature (TC) of this product and the maximum dwell time the
body temperature of this device may be (TC - 5) ºC or greater. The classification temperature sets the Maximum Bo dy
Temperature allow ed for this device during lead-free ref low processes. For through-hole de vices, and any other
processes, the guidelines of J-STD- 020 must be observed.
5.4 Board Was h
IXYS Integr ated Circu it s Division recommends t he use of no-clean f lux formulations. Board washing to reduce or
remove flux residue following the solder reflow process is accep table provided proper precautions ar e taken to
pre vent damage to the device. These pr ecautions include but are not limited to: using a lo w pressure wash and
providing a follow up bak e cycle suff icien t to remove any moistur e trapped within the device due to the washing
process. Due to the v ariability of the wash par ameters used to clean the board, determination of the bake temper ature
and duration necessary to remove the moisture trapped within the package is the responsibility of the user
(assembler) . Cleaning or drying methods that employ ultrasonic energy ma y damage the de vice and should not be
used. Additionally, the device must not be exposed to flux or solvents that are Chlorine- or Fluorine-based
Device Moisture Sensitivity Level (MSL) Classification
IXD_604 All Versions MSL 1
Device Classification Temperature (TC)Dwell Time (tp)Max Reflow Cycles
IXD_604SI / IXD_604SIA / IXD_604D2 260°C 30 seconds 3
IXD_604PI 250°C 30 seconds -
INTEGRATED CIRCUITS DIVISION
IXD_604
R09 www.ixysic.com 11
5.5 Mechanical Dimensions
5.5.1 SIA (8-Pin SOIC)
5.5.2 SI (8-Pin Power SOIC with Exposed Metal Back)
Dimensions
MIN / MAX
1.75 MAX
(0.069 MAX)
1.25 MIN
(0.049 MIN)
0.10 / 0.25
(0.004 / 0.010)
0.10
(0.004)
4
4.80 / 5.00
(0.189 / 0.197)
TOP VIEW
PIN #1
5.80 / 6.20
(0.228 / 0.244)
5
3.80 / 4.00
(0.150 / 0.157)
0.31 / 0.51
(0.012 / 0.020)
8x
SEATING PLANE
GAUGE PLANE
8°- 0°
0.10 / 0.25
(0.004 / 0.010)
0.40 / 1.27
(0.016 / 0.050)
A
0.25
(0.010)
PCB Land Pattern
1.55
(0.061)
0.60
(0.024)
3.75
(0.148)
A
Notes:
1. Controlling dimension: millimeters.
2. All dimensions are in mm (inches).
3. This package conforms to JEDEC Standard MS-012, variation AA, Rev. F.
4. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per end.
5. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side.
6. Lead thickness includes plating.
6x
1.27
0.05
Dimensions
MIN / MAX
1.70 MAX
(0.067 MAX)
1.25 MIN
(0.049 MIN)
0 / 0.15
(0 / 0.006)
0.10
(0.004)
4
4.80 / 5.00
(0.189 / 0.197)
TOP VIEW
PIN #1
5.80 / 6.20
(0.228 / 0.244)
5
3.80 / 4.00
(0.150 / 0.157)
0.31 / 0.51
(0.012 / 0.020)
8x
BOTTOM VIEW
2.05 / 2.41
(0.081 / 0.095)
2.81 / 3.30
(0.111 / 0.130)
SEATING PLANE
GAUGE PLANE
8°- 0°
0.10 / 0.25
(0.004 / 0.010)
0.40 / 1.27
(0.016 / 0.050)
A
0.25
(0.010)
PCB Land Pattern
1.55
(0.061)
0.60
(0.024)
3.85
(0.152) 2.23
(0.088)
3.055
(0.120)
A
6x
1.27
0.05
Notes:
1. Controlling dimension: millimeters.
2. All dimensions are in mm (inches).
3. This package conforms to JEDEC Standard MS-012, variation BA, Rev. F.
4. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per end.
5. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side.
6. The exposed metal pad on the back of the package should be connected to GND. It is not suitable for carrying current.
7. Lead thickness includes plating.
INTEGRATED CIRCUITS DIVISION
12 www.ixysic.com R09
IXD_604
5.5.3 Tape & Reel Information for SI and SIA Packages
5.5.4 PI (8-Pin DIP)
Dimensions
mm
(inches)
NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2
Embossment
Embossed Carrier
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
330.2 DIA.
(13.00 DIA.)
K0= 2.10
(0.083)
W=12.00
(0.472)
B0=5.30
(0.209)
User Direction of Feed
A0=6.50
(0.256) P1=8.00
(0.315)
Dimensions
mm
(inches)
PCB Hole Pattern
2.540 ± 0.127
(0.100 ± 0.005)
6.350 ± 0.127
(0.250 ± 0.005) 9.144 ± 0.508
(0.360 ± 0.020)
0.457 ± 0.076
(0.018 ± 0.003)
9.652 ± 0.381
(0.380 ± 0.015)
7.239 TYP.
(0.285)
7.620 ± 0.254
(0.300 ± 0.010)
4.064 TYP
(0.160)
0.813 ± 0.102
(0.032 ± 0.004)
8-0.800 DIA.
(8-0.031 DIA.) 2.540 ± 0.127
(0.100 ± 0.005)
7.620 ± 0.127
(0.300 ± 0.005)
7.620 ± 0.127
(0.300 ± 0.005)
3.302 ± 0.051
(0.130 ± 0.002)
Pin 1
0.254 ± 0.0127
(0.010 ± 0.0005)
INTEGRATED CIRCUITS DIVISION
IXD_604
R09 www.ixysic.com 13
5.5.5 D2 (8-Pin DFN)
5.5.6 Tape & Reel Information for D2 Package
Dimensions
mm MIN / mm MAX
(inches MIN / inches MAX)
5.00 BSC
(0.197 BSC)
4.00 BSC
(0.157 BSC)
0.80 / 1.00
(0.031 / 0.039)
0.10
(0.004)
0.95 BSC
(0.037 BSC)
0.74 / 0.83
(0.029 / 0.033)
0.30 / 0.45
(0.012 / 0.018)
3.03 / 3.10
(0.119 / 0.122)
2.53 / 2.60
(0.100 / 0.102)
0.35 / 0.45 x 45º
(0.014 / 0.018 x 45º)
Pin 1
Pin 1 Pin 8
0.20 REF
(0.008 REF)
Recommended PCB Land Pattern
4.50
(0.177)
0.45
(0.018)
1.20
(0.047)
3.10
(0.122)
2.60
(0.102)
0.95
(0.037)
0.35 x 45º
(0.014 x 45º)
NOTE:
The exposed metal pad on the back of the D2 package should
be connected to GND. Pad is not suitable for carrying current.
K0=1.90 ± 0.10
B0=5.40 ± 0.10
5º MAX
A0=4.25 ± 0.10
5º MAX
0.30 ± 0.05
(0.05)
(0.05)
R0.75 TYP
P1=8.00 ± 0.10
2.00 ± 0.05
4.00 ± 0.10 See Note #2
12.00 ± 0.30
5.50 ± 0.05
1.75 ± 0.10
∅1.50 (MIN)
∅1.55 ± 0.05
NOTES:
1. A0 & B0 measured at 0.3mm above base of pocket.
2. 10 pitches cumulative tol. ± 0.2mm
3. ( ) Reference dimensions only.
4. Unless otherwise specified, all dimensions in millimeters.
Embossment
Embossed Carrier
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
330.2 DIA.
(13.00 DIA.)
For additional information please visit our website at: www.ixysic.com
IXYS Integrated Circuits Division makes no representati ons or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated
Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatso ever, and disclaims any express or implied warranty, relating to its
products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
Specification: DS-IXD_604-R09
©Copyright 2017, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
10/25/2017