June 2014
©2013 Fairchild Semiconductor Corporation
FDMC86139P Rev.C2 www.fairchildsemi.com
1
FDMC86139P P-Channel PowerTrench® MOSFET
Bottom
D
D
D
S
S
G
Top
Pin 1
MLP 3.3x3.3
S
D
S
S
S
G
D
D
D
D
FDMC86139P
P-Channel PowerTrench® MOSFET
-100 V, -15 A, 67 mΩ
Features
Max rDS(on) = 67 mΩ at VGS = -10 V, ID = -4.4 A
Max rDS(on) = 89 mΩ at VGS = -6 V, ID = -3.6 A
Very low RDS-on mid voltage P channel silicon technology
optimised for low Qg
This product is optimised for fast switching applications as
well as load switch applications
100% UIL Tested
RoHS Compliant
General Description
This P-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced PowerTrench® technology. This
very high density process is especially tailored to minimize
on-state resistance and optimized for superior switching
performance.
Applications
Active Clamp Switch
Load Switch
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
VDS Drain to Source Voltage -100 V
VGS Gate to Source Voltage ±25 V
ID
Drain Current -Continuous TC = 25 °C -15 A -Continuous TA = 25 °C (Note 1a) -4.4
-Pulsed -30
EAS Single Pulse Avalanche Energy (Note 3) 121 mJ
PDPower Dissipation TC = 25 °C 40 W
Power Dissipation TA = 25 °C (Note 1a) 2.3
TJ, TSTG Operating and Storage Junction Temperature Range -55 to + 150 °C
RθJC Thermal Resistance, Junction to Case 3.1 °C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 53
Device Marking Device Package Reel Size Tape Width Quantity
FDMC86139P FDMC86139P Power 33 13 ’ 12 mm 3000 units
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©2013 Fairchild Semiconductor Corporation
FDMC86139P Rev.C2
FDMC86139P P-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
Off Characteristics
On Characteristic s
Dynamic Characterist ic s
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V -100 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = -250 μA, referenced to 25 °C -63 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = -80 V, VGS = 0 V -1 μA
IGSS Gate to Source Leakage Current VGS = ±25 V, VDS = 0 V ±100 nA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA-2-3-4V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient ID = -250 μA, referenced to 25 °C 7 mV/°C
rDS(on) Static Drain to Source On Resistance VGS = -10 V, ID = -4.4 A 56 67 mΩVGS = -6 V, ID = -3.6 A 69 89
VGS = -10 V, ID = -4.4 A,TJ = 125 °C 87 104
gFS Forward Transconductance VDS = -10 V, ID = -4.4 A 12 S
Ciss Input Capacitance VDS = -50 V, VGS = 0 V,
f = 1 MHz
1001 1335 pF
Coss Output Capacitance 178 240 pF
Crss Reverse Transfer Capacitance 10 15 pF
RgGate Resistance 0.1 1.6 3.2 Ω
td(on) Turn-On Delay Time VDD = -50 V, ID = -4.4 A,
VGS = -10 V, RGEN = 6 Ω
11 20 ns
trRise Time 2.5 10 ns
td(off) Turn-Off Delay Time 17 30 ns
tfFall Time 410ns
Qg(TOT) Total Gate Charge VGS = 0 V to -10 V VDD = -50 V,
ID = -4.4 A
16 22 nC
Qg(TOT) Total Gate Charge VGS = 0 V to -6 V 9.8 14 nC
Qgs Total Gate Charge 4.5 nC
Qgd Gate to Drain “Miller” Charge 3.2 nC
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = -4.4 A (Note 2) -0.84 -1.3 V
VGS = 0 V, IS = -1.9 A (Note 2) -0.79 -1.2 V
trr Reverse Recovery Time IF = -4.4 A, di/dt = 100 A/μs 70 112 ns
Qrr Reverse Recovery Charge 141 225 nC
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1. 5 in. board of FR-4 material . RθJC is guar anteed by desig n while RθCA is determ ined by
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting TJ = 25 °C; P-ch: L = 3 mH, IAS = -9 A, VDD = -100 V, VGS = -10 V. 100% test at L = 0.1 mH, IAS = -28 A.
G
DF
DS
SF
SS
a) 53 °C/W when mounte d on
a 1 in2 pad of 2 oz copper
G
DF
DS
SF
SS
b) 125 °C/W when mounted on a
minimum pad of 2 oz copper
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3
©2013 Fairchild Semiconductor Corporation
FDMC86139P Rev.C2
FDMC86139P P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
Figure 1.
012345
0
10
20
30
VGS = -6 V VGS = -5.5 V
VGS = - 4 .5 V
PULSE DU R ATION = 80 μs
DUTY CYCLE = 0.5% MA X
VGS = -5 V
VGS = -10 V
-ID, DRAIN CURRENT (A)
-VDS, DRA IN TO SOURCE VOLTAGE (V)
On Region Characteristics Figure 2.
0102030
0
1
2
3
4
5
VGS = -5.5 V
PULSE D U RATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
VGS = -6 V
VGS = -4.5 V VGS = -5 V
VGS = -10 V
Normalized On-Resistance
vs Drain Current and Gate Voltage
Figure 3. Normalized On Resistance
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ID = -4.4 A
VGS = -10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
TJ, JUNCTION TEMPE R ATURE (oC)
vs Junction Te mperature Figure 4.
45678910
0
50
100
150
200
250
TJ = 125 oC
ID = -4.4 A
TJ = 25 oC
-VGS, G A TE TO SOUR C E VOL TA GE (V)
rDS(on), DR AIN TO
SOURCE ON-RESISTANCE (mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
On-Resistance vs Gate to
Source Voltage
Figure 5. Transfer Characteristics
234567
0
10
20
30
TJ = 150 oC
VDS = -5 V
PULSE D U RATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
-ID, DRAIN CURRENT (A)
-VGS, GATE TO SO U RC E V OLTAGE (V)
Figure 6.
0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
10
50
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
-IS, REVERSE DRAIN CURRENT (A)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Source to Drain Diode
Forward Voltage vs Source Current
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©2013 Fairchild Semiconductor Corporation
FDMC86139P Rev.C2
FDMC86139P P-Channel PowerTrench® MOSFET
Figure 7.
0481216
0
2
4
6
8
10
ID = -4.4 A
VDD = -50 V
VDD = -75 V
-VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = -25 V
Gate Charge Characteristics Figure 8.
Capacitance vs Drain
to Source Voltage
Figure 9.
0.001 0.01 0.1 1 10 50
1
10
50
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVAL ANC HE (m s)
-IAS, AVALA NCHE CURRENT (A)
Unc l amp e d Ind u ctiv e
Switching Capability Figure 10.
25 50 75 100 125 150
0
5
10
15
20
Limited by Package VGS = -10 V
RθJC = 3.1 oC/W
VGS = -6 V
-ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
Maximum Continuous Drain
Current vs Case Temperature
Figure 11. Forward Bias Safe
Operating Area
0.1 1 10 100 400
0.005
0.01
0.1
1
10
40
10 s
CURVE BENT TO
MEASURED DATA
100 μs
10 ms
DC
1 s
100 ms
1 ms
-ID, DRAIN CURRENT (A)
-VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AR EA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MA X RA TED
RθJA = 125 oC/W
TA = 25 oC
Figure 12. Single Pulse Maximum
Power Dissipation
10-4 10-3 10-2 10-1 110
100 1000
0.5
1
10
100
1000
2000
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
P(PK), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (sec)
Typical Characteristics TJ = 25 °C unless otherwise noted
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©2013 Fairchild Semiconductor Corporation
FDMC86139P Rev.C2
FDMC86139P P-Channel PowerTrench® MOSFET
Figure 13.
10-4 10-3 10-2 10-1 110
100 1000
0.0005
0.001
0.01
0.1
1
2
SINGLE PULSE
DUTY CYCLE-DESCENDING ORDER
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.0 5
0.0 2
0.0 1
PDM
t1t2
NOTES:
ZθJA(t) = r(t) x RθJA
RθJA = 125 oC/W
Duty Cycle, D = t1 / t2
Peak TJ = PDM x ZθJA(t) + TA
Junction-to-Ambient Transient Thermal Response Curve
Typical Characteristics TJ = 25 °C unless otherwise noted
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©2013 Fairchild Semiconductor Corporation
FDMC86139P Rev.C2
FDMC86139P P-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
Package drawings are provided as a service to customers considering Fair child components. Drawings may change in any manner
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_MLDEU-C08
FDMC86139P P-Channel PowerTrench® MOSFET
©2013 Fairchild Semiconductor Cor poration 7 www.fairchildsemi.com
FDMC86139P Rev.C2
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Definition of Terms
AccuPower™
AX-CAP®*
BitSiC™
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CTL™
Current Transfer Logic™
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®*
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仙童
®
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